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| Number | Title | Issue Date |
| 7430264 | Method to reduce transient current swings during mode transitions of high frequency/high power chips A method, an apparatus, and a computer program are provided to reduce transient current swings during mode transitions. Traditionally, transient supply voltage fluctuations on a chip account for a large portion of the power supply. The number of series inductances a... | 09/30/2008 |
| 7426254 | Shift register comprising electrical fuse and related method A shift register including an electrical fuse and a method of operating the shift register are disclosed. The shift register includes a register flip-flop group circuit and a plurality of output circuits respectively receiving a plurality of enable signals. Each out... | 09/16/2008 |
| 7406146 | Shift register circuit A shift register circuit includes a shift register unit and a buffer. The buffer is coupled to the output terminal of the shift register unit to delay the output signal from the shift register unit. The overlapped voltage of two output signals from two adjacent shif... | 07/29/2008 |
| 7342568 | Shift register circuit A shift register circuit having shift registers comprising a first transistor having a gate and a first source/drain for receiving an output signal of a pre-stage shift register, a second transistor having a gate coupled to a second source/drain of the first transis... | 03/11/2008 |
| 7317780 | Shift register circuit A shift registers circuit having a series of cascading shift registers comprises a first transistor coupling to an output signal of a pre-stage shift register, a second transistor coupling to the first transistor, an output and a first clock signal, and a pull-down ... | 01/08/2008 |
| 7292218 | Shift-register circuit A shift-register circuit. The shift-register circuit has a plurality of shift-register units connected in series. Each of the shift-register units generates first and second pulse signals, wherein the first pulse signal is an output signal of the shift-register circ... | 11/06/2007 |
| 7245690 | Shift register and electronic device using the same The invention provides a shift register which can function normally even with an abnormal register or a broken register while suppressing the manufacturing cost as little as possible. The shift register of the invention includes n regular registers (SR(1) to ... | 07/17/2007 |
| 7176740 | Level conversion circuit A level conversion circuit that prevents the operation speed from decreasing when the power supply voltage decreases while appropriately performing level conversion. The level conversion circuit includes first and second PMOS transistors. A first NMOS transistor is ... | 02/13/2007 |
| 7133017 | Shift register and display device using same A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between a... | 11/07/2006 |
| 7103038 | Systems and methods for converting a packet/cycle datapath to a packet/cycle datapath A packet processing system converts a wide bus carrying P packets to a narrower bus that can carry only Q packets, where Q | 09/05/2006 |
| 7005675 | Light-emitting device, method for driving light-emitting device and element board A current-input light-emitting device of the invention converts a current corresponding to a given video signal to a voltage by passing the current between two nodes of four nodes of a multi-terminal transistor, converts the voltage to a current again by shorting th... | 02/28/2006 |
| 6996203 | Bidirectional shift register and display device incorporating same The present invention includes: a shift register section, including multiple-stage flip-flops operating in synchronism with a clock signal, for switching a shift direction in accordance with an externally supplied direction instruct signal; a waveform change section... | 02/07/2006 |
| 6940300 | Integrated circuits for testing an active matrix display array A device for use in a display system including an array of pixel cells formed on a substrate. Each pixel cell being coupled to at least one gate line of a plurality of gate lines formed on the substrate and at least one data line of a plurality of data lines being f... | 09/06/2005 |
| 6919874 | Shift register using M.I.S. transistors and supplementary column A display device has an active matrix that includes a plurality of scanners for selection lines, a plurality of scanners for columns, and a supplementary conductive column crossing over the selection lines is capacitively coupled to each of the selection lines in su... | 07/19/2005 |
| 6904115 | Current register unit and circuit and image display device using the current register unit A current register unit. A first transistor of a first type, second to sixth transistors of a second type, and first and second capacitors are provided, and an image current signal is stored in the current register unit when a control signal is at a first logic leve... | 06/07/2005 |
| 6891916 | Shift register with built-in level shifter A shift register having a built-in level shifter includes a buffer outputting a shift pulse using a first clock signal and a first supply voltage via voltages at first and second nodes; a first controller controlling the voltage of the first node via the start pulse... | 05/10/2005 |
| 6829321 | High speed and compact overflow detection for shifters This invention describes a unique high-speed implementation for overflow detection logic to be used in high performance shifter functions. The overflow logic makes use of parallelism in combining shift value decoding and mask generation logic with the logic necessar... | 12/07/2004 |
| 6778627 | Shift-register circuit A shift-register circuit. The PMOS transistor includes a first gate for receiving an inverted output signal output from a previous stage shift-register unit, a first source for receiving an output signal from the previous stage shift-register unit, and a first drain... | 08/17/2004 |
| 6765506 | Scrambler, de-scrambler, and related method A scrambler includes a linear shift register having logic suitable for generating a scrambling sequence according to a predetermined generator sequence, a plurality of logic gates that allow for parallel input to the shift register, and a multiplexer for switching i... | 07/20/2004 |
| 6630920 | Pel drive circuit, combination pel-drive-circuit/pel-integrated device, and liquid crystal display device To readily realize a reduction in pel pitch and an increase in the number of pels, a V shift register is configured such that one pulse transfer stage is provided so as to correspond to two horizontal pel lines constituting a pel section of a liquid cryst... | 10/07/2003 |
| 6611248 | Shift register and electronic apparatus Each of stages RS(1), RS(2), . . . of a shift register is constituted by six TFTs. A ratio of a channel width and a channel length (W/L) of each of these TFTs 1 to 6 is set in accordance with a transistor characteristic of each TFT in such a manner that t... | 08/26/2003 |
| 6556646 | Shift register A shift register for driving a pixel row in a liquid crystal display device. In the shift register, a plurality of stages are connected to a high level voltage source, a low level voltage source and a phase-delayed clock signal generator, connected to row... | 04/29/2003 |
| 6556647 | Phase locked loop clock divider utilizing a high speed programmable linear feedback shift register with a two stage pipeline feedback path An apparatus and method is disclosed for providing a phase locked loop clock divider circuit utilizing a high speed linear feedback shift register with a two stage pipeline in its feedback path. A plurality of "pre-load" flip flop (PLFF) circuits and mult... | 04/29/2003 |
| 6542569 | Memory device command buffer apparatus and method and memory devices and computer systems using same A command buffer for use in packetized DRAM includes a four stage shift register for shifting for sequentially storing four 10-bit command words. The shift register combines the four 10-bit command words into a single 40-bit command word and transfer the ... | 04/01/2003 |
| 6501817 | Area efficient redundancy multiplexer circuit technique for integrated circuit devices providing significantly reduced parasitic capacitance An improved integrated circuit area efficient redundancy multiplexer circuit technique provides similar functionality to conventional CMOS transmission, or "pass" gates while concomitantly reducing circuit complexity, the die area necessary to support red... | 12/31/2002 |
| 6449328 | Method and apparatus for shifting data from registers Disclosed is a method and apparatus for shifting data from registers. Bits from N registers are shifted as input to a first set of M multiplexors. Control signals are sent into each of the first set of M multiplexors to select bits inputted from one of th... | 09/10/2002 |
| 6381295 | Shifter with overflow detection mechanism An apparatus that performs a left shift operation includes a shifter unit that contains the value to be shifted, a flag having an input coupled to the left-most bit of the shifter unit for receiving sign bit information for the value to be shifted, an ove... | 04/30/2002 |
| 6345085 | Shift register A shift register for driving a pixel array is adapted to prevent a defect due to a short of a capacitor. In each stage of the shift register, an output circuit is provided with a pull-up transistor having a first input electrode for receiving a first cloc... | 02/05/2002 |
| 6339631 | Shift register A shift register that is suitable for reducing the required number of clock signals as well as simplifying the configuration of an external control circuit uses a plurality of stages connected, in series, to a start pulse input line. In each stage, an out... | 01/15/2002 |
| 6324239 | Method and apparatus for a 1 of 4 shifter The present invention comprises a multi-function shifter that uses N-nary logic and includes an operation selection and various 1-of-N multiplexers to support a variety of shift modes. The shift modes include rotates, logical shifts in which 0 is shifted ... | 11/27/2001 |
| 6072849 | Shift counter device A programmable n stage shift counter divider circuit includes a plurality of n flip-flops arranged in cascade from a first stage to an nth stage. The data inputs of each of the flip flops are coupled with the output of the next preceding stage through cor... | 06/06/2000 |
| 5995579 | Barrel shifter, circuit and method of manipulating a bit pattern The present invention provides for a circuit comprising: an input operable to receive a bit pattern; a bit-operator configured to selectively transpose the bit pattern; a shifter configured to shift the bit pattern following the transposition of the bit p... | 11/30/1999 |
| 5949398 | Select line driver for a display matrix with toggling backplane When a given row in an array of a liquid crystal display having a toggling backplane voltage is de-selected, the row select line voltage also toggles to prevent capacitive current in the pixel capacitance. The row select line driver includes a pair of tra... | 09/07/1999 |
| 5881067 | Flip-flop design and technique for scan chain diagnosis A modification to conventional scan chain design is disclosed which can identify whether any connection in the scan chain is shorted to the supply voltage or ground (i.e., shorted to a logical 1 or logical 0) and the precise location of the short. Circuit... | 03/09/1999 |
| 5828256 | Multiplexer comprising an N-stage shift register with each stage composed of a dual output D F/F with one output used for multiplexing and the other for next stage For time division multiplexing N bit-parallel circuit input signals at a high bit rate such as higher than 2.4 Gb/s, where N represents a predetermined integer greater than one, a multiplexer circuit comprises an N-stage shift register (11) for shifting a... | 10/27/1998 |
| 5818894 | High speed barrel shifter A high speed barrel shifter in which fill input data is especially added. The high speed barrel shifter comprises: a first multiplexer having a first and a second input terminals for receiving double word and input data, thereby producing fill data at a f... | 10/06/1998 |
| 5771268 | High speed rotator with array method A high-speed rotator array for shifting input data a specified amount. The rotator array includes a plurality of straight shift control lines extending across the array for receiving shift data representative of shift values, and a plurality of input term... | 06/23/1998 |
| 5761266 | Shifter circuit that emulates a barrel shifter A shifting circuit operates on a plurality of input sub-words, that collectively constitute an input data word, to generate a plurality of result sub-words that collectively represent the input data word, shifted. The shifting circuit receives, during eac... | 06/02/1998 |
| 5719913 | Pseudo-random number generating circuit and bidirectional shift register The scale of a pseudo-random number generating circuit that can select normal or reverse order in which pseudo-random numbers are generated is reduced. The outputs of first and second NOR circuits are selected by a selecting circuit and sent to a parity c... | 02/17/1998 |
| 5708689 | Circuit for detecting a synchronization byte of a transport stream A circuit for detecting a synchronization byte when a decoder of a MPEG 2 system performs a parsing on a transport stream. The circuit includes a shift register for receiving a transport packet, 1 byte at a time whenever a clock signal is received, and fo... | 01/13/1998 |
