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| Number | Title | Issue Date |
| 7292177 | Counter circuit, AD conversion method, AD converter, semiconductor device for detecting distribution of physical quantities, and electronic apparatus An asynchronous counter that is capable of switching count mode includes flip-flops, and three-input single-output tri-value switches respectively provided between the adjacent pairs of the flip-flops. The tri-value switches switch among three values, namely, non-in... | 11/06/2007 |
| 7026849 | Reset circuit having synchronous and/or asynchronous modules There is provided a reset circuit for reducing current consumption during resetting. A reset circuit 20 is constituted in such a manner that a pulse generation circuit 22 for generating a reset pulse signal (PRSTN) 50 from a reset signal input t... | 04/11/2006 |
| 7013795 | Grind and brew coffee apparatus A grind and brew coffee making apparatus for providing freshly brewed coffee and having a number of features for easy cleaning, more efficient maintenance and improved safety. The coffee making apparatus has a housing assembly with an upper separable top cover, a gr... | 03/21/2006 |
| 7003067 | High-speed synchronous counters with reduced logic complexity Described are fast synchronous counters with reduced combinatorial logic. In one embodiment, a four-bit shift register is configured in a ring and preset with a data pattern (e.g., 1000). The register is then rapidly shifted into any of four unique states. Combinato... | 02/21/2006 |
| 6956423 | Interleaved clock signal generator having serial delay and ring counter architecture The interleaved clock generator generates N interleaved clock signals in response to an input clock signal. The interleaved clock generator comprises an interleaved clock generator of a first type for receiving the input clock signal and for generating M interleaved... | 10/18/2005 |
| 6707874 | Multiple-output counters for analog-to-digital and digital-to-analog conversion A machine used for digital counting which can provide multiple output counts. The machine is particularly useful in analog-to-digital (A/D) converters and in digital-to-analog (D/A) converters. The multiple output counts can change in different directions or in the ... | 03/16/2004 |
| 6700946 | System and method for automatic generation of an at-speed counter Methods and systems for automatic generation of an at-speed binary counter are described. The binary counter includes a slow counter that increments when a fast counter overflows to keep up with a fast clock. A framework to automatically generate a Hardwa... | 03/02/2004 |
| 6449327 | Counter circuit A system and method are presented for providing a multi-stage counter. In one embodiment, a signal propagates from the most significant bit of the counter to the least significant bit of the counter that indicates that all "more significant" stages of the... | 09/10/2002 |
| 6097781 | Shared counter A shared counter performs multiple counting functions in an electronic circuit, such as a memory integrated circuit. An input selection circuit selects one of M input data sets at a given time to be provided as counter initialization data. A counter circu... | 08/01/2000 |
| 6064712 | Autoreload loop counter There is disclosed a loop counter reload circuit loads an initial count value into a counter and a shadow register. A count value output from the counter is changed by a predetermined displacement resulting in a changed count value. The count value from t... | 05/16/2000 |
| 6055289 | Shared counter A shared counter performs multiple counting functions in an electronic circuit, such as a memory integrated circuit. An input selection circuit selects one of M input data sets at a given time to be provided as counter initialization data. A counter circu... | 04/25/2000 |
| 5923718 | Binary counter reading circuit An asynchronous reading circuit improves reliability of data read from a binary counter. Count data generated by a binary counter 101 according to a counting clock is converted into a gray code by a gray encoder. The count data represented by the gray cod... | 07/13/1999 |
| 5878250 | Circuitry for emulating asynchronous register loading functions Circuitry is provided that allows a register without an asynchronous loading capability to be asynchronously loaded. Logic gates are provided before and after the register. The logic gates are driven by an output signal from a storage circuit such as a la... | 03/02/1999 |
| 5596616 | Burst address sequence generator for addressing static random-access-memory devices A burst address sequence generator includes a counter, a latch and an exclusive-OR gate. The counter is controlled by a mode signal for generating count values. The latch generates pre-address signals. The count values and the pre-address signals are rece... | 01/21/1997 |
| 5561674 | Synchronous counter and method for propagation carry of the same A synchronous counter performing a count operation in response to an input of a clock having a fixed frequency. The synchronous counter including a first transmission gate receiving a counter initialization signal and transferring the counter output signa... | 10/01/1996 |
| 5539795 | Sector pulse generating apparatus for multiple zone recording of a disk memory A sector pulse generating apparatus for multiple zone recording includes only first and second counters. The first counter counts reference clock pulses and outputs a present position signal. The second counter is incremented in response to a increment si... | 07/23/1996 |
| 5526391 | N+1 frequency divider counter and method therefor An N+1 frequency divider counter (20) has a binary counter (22), ones detect circuitry (26), control logic (24), and an output flip-flop (28). The binary counter (22) counts from an initial value to a final value for each half of an output clock signal. I... | 06/11/1996 |
| 5512846 | Signal selecting device controlled by a serially transmitted mode signal requiring but one terminal In a signal selecting device, a mode determination portion 61 comprises a shift register 11, a clock generating portion 20 and decoder 51. The clock generating portion 20 receives a mode signal M and generates a clock signal CK1 used for decoding the mode... | 04/30/1996 |
| 5506878 | Programmable clock having programmable delay and duty cycle based on a user-supplied reference clock An input clock delay circuit includes an up counter for estimating the approximate number of internal clock cycles that occur during one cycle of the input clock signal and another up counter for determining the portion of each cycle of the input clock si... | 04/09/1996 |
| 5477179 | Apparatus for generating a modulated pulse signal A device for printing an image onto a surface, such as food containers, employs a laser that is scanned across a surface to produce a latent image on a charged photosensitive surface formed on the surface. The surface is moved relative to the laser source... | 12/19/1995 |
| 5430781 | Variable pulse width generator circuit A comparator is provided in the counter circuit to compare the counted value of clocks by a counter with the value of a register in which a target changing value of a comparison register which sets a value to be compared with the counted value of the coun... | 07/04/1995 |
| 5426387 | Device for generating an electrical voltage of predetermined waveform, iontophoresis apparatus for transdermally administering medicinal products and electrical stimulation apparatus, which apparatuses are equipped with such a device The device comprises a switched-mode power supply (1) equipped with an electronic switching member (T1), the closing of which controls the power supply to an inductor (L1) which discharges, when the member reopens, into a capacitor (... | 06/20/1995 |
| 5410582 | Reference-signal generating apparatus A reference signal generator that operates in response to a digital control signal has an increased resolving power without the requirement for increasing the basic clock rate or increasing the bit capacity of a down counter by thinning a pulse from the b... | 04/25/1995 |
| 5402009 | Pulse generator for generating a variable-width pulse having a small delay A pulse generator has a presetting clock synchronous counter having a count enable terminal, the counter which counts up input data using a clock signal whose basic unit of time width corresponds to its one period. The output from said counter is decoded ... | 03/28/1995 |
| 5398270 | Data coincidence detecting circuit A data coincidence detecting circuit including a register for receiving n-bit data, a counter for counting up until 2n to compare the n-bit data with it, a comparator for comparing the outputs of the register and the outputs of the counter, res... | 03/14/1995 |
| 5390224 | Clock control apparatus A clock control apparatus having a basic period clock and a plurality of clocks with different phases from the basic period clock by t/N period, is used with an information processing unit. The apparatus comprising a clock signal generating portion for ge... | 02/14/1995 |
| 5383230 | Reload-timer/counter circuit A reload-timer/counter circuit provides a reload-timer function and a counter function commonly and selectively. The circuit is comprised of first, second, third, and fourth registers. The third and fourth registers act as a control status register and a ... | 01/17/1995 |
| 5381454 | Circuit and method of resetting a data compressor/decompressor A data compressor generates codewords representative of the location and length of a string match between an input data stream and a CAM array vocabulary table. A data decompressor looks up the codewords for a string match in its vocabulary table. The CAM... | 01/10/1995 |
| 5376834 | Initialization circuit for automatically establishing an output to zero or desired reference potential A circuit for initializing the output voltage of an analog circuit includes a switch operative to connect an input of the analog circuit to a first reference potential during an initializing period. A comparator is connected to compare the output voltage ... | 12/27/1994 |
| 5371770 | Pulse generating circuit for microcomputers The invention provides a pulse generating circuit including a single timer or counter which conducts both a event base count and a subsequent time base count according to clock signals about the event and time base counts, any one of which is selected by ... | 12/06/1994 |
| 5371773 | Driving circuit for solid-state image sensor and counter circuit used therein A counter circuit includes counting stages of n bits where n is a natural number. The counter circuit also includes a logic decoding circuit for determining the inputs of the counting stages, a logic circuit for adjusting the number of simultaneous change... | 12/06/1994 |
| 5355397 | Clock start up stabilization for computer systems Utilization circuits, such as logic chip circuits, are prevented from receiving the initial one or more pulses of a train of clock pulses produced after the master system clock is started, while the pulses of that train occurring thereafter are coupled to... | 10/11/1994 |
| 5349621 | Method and circuit arrangement for transmitting data blocks through a bus system In the transmission of variable length data blocks, where data and addresses share the same bus lines, one of the other signals, which are present anyway (chip-select, CS-, read, write), indicates the block length. The first time slot following the settin... | 09/20/1994 |
| 5347559 | Apparatus and method of data transfer between systems using different clocks According to one aspect of the invention, an apparatus includes a first processor coupled to a first system bus to provide data to a cache and a memory, and a second processor coupled to the first system bus and a second abbreviated system bus to receive ... | 09/13/1994 |
| 5347182 | Device for indicating that an optional component is mounted on a board The invention concerns a device for indicating the presence of optional components (01-04) that can be inserted on a microprocessor board, each component having a first pin (10) associated to a first contact (11) of the board connected to a first voltage ... | 09/13/1994 |
| 5339345 | Frequency divider circuit A frequency divider state machine synchronously divides an input clock's frequency by 1.5. The clock divider circuit includes two storage elements which are clocked on different edges of the input clock signal. The outputs of the two storage elements are ... | 08/16/1994 |
| 5325411 | Display driving circuit A display driving circuit includes a latch circuit provided with a resetting terminal for receiving a pulse signal having a constant period and a setting terminal, a logic product circuit for receiving an output signal of the latch circuit and the pulse s... | 06/28/1994 |
| 5313509 | Pulse counter with arbitrary output characteristic A pulse counter has a programmable prescaler that divides the frequency of an input clock pulse signal by a factor designated by a code signal. A counter counts the prescaled clock pulse signal output by the programmable prescaler to generate a count outp... | 05/17/1994 |
| 5309494 | Circuit configuration for generating logical butterfly structures A circuit configuration includes k linking cells each generating one of k output states from two of k input states. Each of the linking cells have two counters. Each of the counters have a serial data input, a serial data output, and a serial counting wid... | 05/03/1994 |
| 5303279 | Timer circuit An n-bit input count value is split into high-order n-1 bits and a low-order one bit so that the overflow signal 3a of the n-1 bit counter 2 for counting the high-order n-1 bits and the output signal 4a which is obtained by delaying the overflow signal 3a... | 04/12/1994 |
