...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 7372759 | Power supply control circuit and controlling method thereof The present invention provides a power supply control circuit and a control method thereof, capable of securing an accurate operation of a GIO in a burst data transmission having a high compression rate. The power supply control circuit of a semiconductor memory dev... | 05/13/2008 |
| 7366275 | Output calibrator with dynamic precision An integrated circuit device having an output driver circuit and a control circuit. The output driver circuit outputs a first signal having a signal level according to a control value. The control circuit is coupled to receive the first signal from the output driver... | 04/29/2008 |
| 7292177 | Counter circuit, AD conversion method, AD converter, semiconductor device for detecting distribution of physical quantities, and electronic apparatus An asynchronous counter that is capable of switching count mode includes flip-flops, and three-input single-output tri-value switches respectively provided between the adjacent pairs of the flip-flops. The tri-value switches switch among three values, namely, non-in... | 11/06/2007 |
| 7277510 | Adaptation algorithm based on signal statistics for automatic gain control An adaptation process for automatic gain control is adapted to obtains the statistical characteristics of the received signal to estimate the input signal power level. The estimated input signal power level is used to adjust the gain of a variable gain amplifier for... | 10/02/2007 |
| 7256724 | Image sensor including variable ramping slope and method An image sensor an image sensor includes an image sensing element which converts incident light into an analogue signal, a voltage generator which includes a variable resistor circuit and which generates a ramping voltage, where a slope of the ramping voltage is var... | 08/14/2007 |
| 7190756 | Hybrid counter with an asynchronous front end Integrated circuit counting apparatuses are described. More particularly, a hybrid counter (203) including an asynchronous counter (310) front end and a synchronous counter (311) back end is described. The asynchronous counter (310) inclu... | 03/13/2007 |
| 7172358 | Counting pen An apparatus and method provide a writing device including a button pressed by a user, wherein the button engages a mechanism used to move a writing tip between stowed and operative positions. A counter receives at least one indication each time the button is presse... | 02/06/2007 |
| 7170325 | Circuit for controlling a delay time of input pulse and method of controlling the same Provided is directed to a circuit of controlling a pulse width and a method of controlling the same, which can remove failure possible to be generated during operations of a DRAM or a DDR in a high frequency by guaranteeing read and write operations of a stabilized ... | 01/30/2007 |
| 7119602 | Low-skew single-ended to differential converter A single-ended to differential converter uses a cross-coupled latch that maximizes the output zero-crossing symmetry and is self compensating over PVT variations. An in-phase driving signal is provided by an always-on transmission gate coupled to the input. An out-o... | 10/10/2006 |
| 7005898 | Programmable divider with built-in programmable delay chain for high-speed/low power application A programmable divider includes a synchronous counter configured to process an input clock signal and produce first output signals in response the input clock signal. A number of logic devices are coupled to the synchronous counter and configurable to receive the fi... | 02/28/2006 |
| 6961402 | High-speed synchronous counters with reduced logic complexity Described are fast synchronous counters with reduced combinatorial logic. In one embodiment, a four-bit shift register is configured in a ring and preset with a data pattern (e.g., 1000). The register is then rapidly shifted into any of four unique states. Combinato... | 11/01/2005 |
| 6950034 | Method and apparatus for performing diagnostics on a downhole communication system A method for performing diagnostics on a wired drill pipe telemetry system of a downhole drilling system is provided. The method includes passing a signal through a plurality of drill pipe in the wired drill pipe (WDP) telemetry system, receiving the signal from the... | 09/27/2005 |
| 6937688 | State machine, counter and related method for gating redundant triggering clocks according to initial state A state machine, a counter, and related method for gating redundant triggering clocks according to the initial states is provided. The state machine includes a plurality of state units and a clock gating circuit. Each of the state unit is triggered by a clock to gen... | 08/30/2005 |
| 6700946 | System and method for automatic generation of an at-speed counter Methods and systems for automatic generation of an at-speed binary counter are described. The binary counter includes a slow counter that increments when a fast counter overflows to keep up with a fast clock. A framework to automatically generate a Hardwa... | 03/02/2004 |
| 6097781 | Shared counter A shared counter performs multiple counting functions in an electronic circuit, such as a memory integrated circuit. An input selection circuit selects one of M input data sets at a given time to be provided as counter initialization data. A counter circu... | 08/01/2000 |
| 6055289 | Shared counter A shared counter performs multiple counting functions in an electronic circuit, such as a memory integrated circuit. An input selection circuit selects one of M input data sets at a given time to be provided as counter initialization data. A counter circu... | 04/25/2000 |
| 5808478 | Digitally controlled output buffer to incrementally match line impedance and maintain slew rate independent of capacitive output loading An output buffer with a slew rate that is load independent is comprised of an output buffer (14) that is connected to an output terminal (12). The output buffer (14) is controlled such that it can drive a load (18) with different drive levels by changing ... | 09/15/1998 |
| 5737381 | Counting device The invention provides a counting device and a direct memory access system using the counting device. In the counting device, a carry/borrow signal to be supplied from a predetermined one-bit counter among a plurality of one-bit counters to another one-bi... | 04/07/1998 |
| 5708688 | High speed programmable burst address generation circuit A programmable burst sequence counter is described. The counter is capable of counting sequences of binary numbers in a linear burst sequence or interleaved burst sequence starting from a initial binary number that is presented to the inputs of the counte... | 01/13/1998 |
| 5594765 | Interleaved and sequential counter A counter system has a first counter seeded by several input signals and a second counter seeded by at least a first output from the first counter. A selection signal is input to the second counter to select the use of either an interleaved count sequence... | 01/14/1997 |
| 5561674 | Synchronous counter and method for propagation carry of the same A synchronous counter performing a count operation in response to an input of a clock having a fixed frequency. The synchronous counter including a first transmission gate receiving a counter initialization signal and transferring the counter output signa... | 10/01/1996 |
| 5521952 | Pulse counter circuit and pulse signal changeover circuit therefor A pulse counter circuit has an invertor which inverts a pulse signal input thereto to form an inverted signal. One of the pulse signal and the inverted signal is selected in response to a selecting signal, and the selected signal is delivered as an output... | 05/28/1996 |
| 5506878 | Programmable clock having programmable delay and duty cycle based on a user-supplied reference clock An input clock delay circuit includes an up counter for estimating the approximate number of internal clock cycles that occur during one cycle of the input clock signal and another up counter for determining the portion of each cycle of the input clock si... | 04/09/1996 |
| 5487097 | Period measuring device It is an object to accurately obtain the period of the horizontal synchronizing signal in the video signal. The number of internal pulses are measured in a predetermined measurement period defined by the horizontal synchronizing signal. It is assumed that... | 01/23/1996 |
| 5483566 | Method and apparatus for modifying the contents of a register via a command bit A method and apparatus as provided that simplifies the software required for modifying the contents of a register. By adding one gate to the register, a single command can be written to the register to modify the states of multiple bits. The system reduce... | 01/09/1996 |
| 5481581 | Programmable binary/interleave sequence counter A counter circuit selectively generates counting sequences in binary and interleave counting modes. A counter is formed by 3 toggle flip-flops. The toggle signals are provided by a toggle control circuit which contains logic gates that are enabled or disa... | 01/02/1996 |
| 5469483 | Timer with a compensation value to increment or decrement a count value of a counter A timer has a function of compensation calculation and includes a compensation value register 1 for holding a compensation value and an arithmetic unit 2 which adds or subtracts a compensation value "" held in the compensation value register 1 and ... | 11/21/1995 |
| 5452336 | Memory device for recording a time factor A memory device for recording a time factor of data includes a threshold element, coupling capacitance, an RC-circuit, and a digital counter. A reference voltage is input to the RC-circuit. The output of the RC-circuit and an input voltage are each input ... | 09/19/1995 |
| 5442671 | Circuit and method of detecting actuator movement An actuator movement detector (10) indicates proper engagement of a solenoid (12). The current flowing through a field coil (16) is converted to a sense voltage that exponentially increases and then follows a dip before increases again to a steady state v... | 08/15/1995 |
| 5432830 | High speed counter for alternative up/down counting of pulse trains and method therefor An asynchronous counter includes a plurality of flip-flops, cascade connected to one another, the plurality of flip-flops serially receiving successive pulse trains having varying numbers of pulses per pulse train. Switching circuitry, coupled to the plur... | 07/11/1995 |
| 5404386 | Programmable clock for an analog converter in a data processor and method therefor A data processing system (10) includes a programmable clock signal for an analog converter (28). A duty cycle of the programmable clock signal is programmed by an external user in a prescaler rate selection register (16). A counter subsequently counts for... | 04/04/1995 |
| 5383230 | Reload-timer/counter circuit A reload-timer/counter circuit provides a reload-timer function and a counter function commonly and selectively. The circuit is comprised of first, second, third, and fourth registers. The third and fourth registers act as a control status register and a ... | 01/17/1995 |
| 5381451 | Trigger signal generating circuit with extraneous pulse prevention during accelerated pulse counting A signal generating circuit includes a counter for counting up input clock pulses to output a trigger signal when counting up to a predetermined number of pulses, a CPU for outputting a mask request of a first trigger signal, a first flip-flop for storing... | 01/10/1995 |
| 5371773 | Driving circuit for solid-state image sensor and counter circuit used therein A counter circuit includes counting stages of n bits where n is a natural number. The counter circuit also includes a logic decoding circuit for determining the inputs of the counting stages, a logic circuit for adjusting the number of simultaneous change... | 12/06/1994 |
| 5371770 | Pulse generating circuit for microcomputers The invention provides a pulse generating circuit including a single timer or counter which conducts both a event base count and a subsequent time base count according to clock signals about the event and time base counts, any one of which is selected by ... | 12/06/1994 |
| 5355396 | Circuitry and method for modularized single transition counting A method and circuitry are provided for modularized single transition counting. A count signal is provided on a count line (436). A single transition count is modified in response to the count signal. The single transition count has a plurality of bits (4... | 10/11/1994 |
| 5349621 | Method and circuit arrangement for transmitting data blocks through a bus system In the transmission of variable length data blocks, where data and addresses share the same bus lines, one of the other signals, which are present anyway (chip-select, CS-, read, write), indicates the block length. The first time slot following the settin... | 09/20/1994 |
| 5339343 | Counter circuit with or gates interconnecting stages to provide alternate testing of odd and even stages during test mode A counter circuit includes a plurality of one-bit counters connected in series. The counter circuit includes first and second input terminals which are supplied with a predetermined signal, respectively, in an operational test mode. The counter circuit fu... | 08/16/1994 |
| 5325411 | Display driving circuit A display driving circuit includes a latch circuit provided with a resetting terminal for receiving a pulse signal having a constant period and a setting terminal, a logic product circuit for receiving an output signal of the latch circuit and the pulse s... | 06/28/1994 |
| 5309494 | Circuit configuration for generating logical butterfly structures A circuit configuration includes k linking cells each generating one of k output states from two of k input states. Each of the linking cells have two counters. Each of the counters have a serial data input, a serial data output, and a serial counting wid... | 05/03/1994 |