Quotables
"For a list of all the ways technology has failed to improve the quality of life, please press three."
Alice Kahn
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7365654 | Absolute angle detection apparatus In an absolute angle detection apparatus, sectors are obtained by dividing 360° by an even number, each sector having combinations of first and second code lines. The first code lines are Gray codes including third code lines that do not appear the same even when a... | 04/29/2008 |
| 7336756 | Reprogrammable bi-directional signal converter A signal converter is comprised of a plurality of counters (“macro-counters”). In turn, each of the macro-counters is comprised of a plurality of single-bit counters (“micro-counters”) that are adapted to receive configuration data in the form of bit fields.... | 02/26/2008 |
| 7256713 | Absolute angle detecting device An absolute angle detecting device is provided. The absolute angle detecting device is composed of a first detecting element group that outputs a Gray code string for angle detection that detects a rotating angle in one sector of the multi-rotation body at required ... | 08/14/2007 |
| 7210078 | Error bit method and circuitry for oscillation-based characterization A method for evaluating an output of a sequential circuit 2 by storing a series of output pulses from the sequential circuit 2 and determining whether the output pulses 4 toggled as desired. Also a circuit 1 for evaluating an output 4 | 04/24/2007 |
| 7203265 | Synchronous counting circuit A M by N bit synchronous counter for use in advanced applications is provided. The M by N bit synchronous counter comprises an M by N register configured to receive and store data corresponding to at least one word integrated with a N bit counter configured to seque... | 04/10/2007 |
| 7199409 | Device for subtracting or adding charge in a charge-coupled device The present invention provides an apparatus for adding or subtracting an amount charge to or from a charge packet in a CCD as the packet traverses the CCD. The apparatus uses a “wire transfer” device structure to perform the addition or subtraction of charge dur... | 04/03/2007 |
| 7113886 | Circuit and method for distributing events in an event stream A circuit and related method for distributing events in an event stream (i.e., an electronic signal having a plurality of rising edge transitions and falling edge transitions). The circuit distributes the events in a primary event stream across multiple secondary ev... | 09/26/2006 |
| 7109762 | Frequency-dividing circuit arrangement and phase locked loop employing such circuit arrangement A frequency-dividing circuit arrangement is disclosed that includes a divider chain having a plurality of frequency divider stages. The frequency dividers can be changed over between the division ratios 2 and 3. At least that frequency divider that is arranged on th... | 09/19/2006 |
| 7047432 | Method and system for synchronizing output from differently timed circuits Synchronizing output from timed circuits includes receiving a first clock signal having a first frequency at a first timed circuit. A first sequence of first circuit values is retrieved from the first timed circuit, and first count values are periodically inserted i... | 05/16/2006 |
| 7035369 | Apparatus and method for a programmable clock generator A gateless digital circuit and method for generating a second clock with a frequency of N/M of the frequency of a first clock, wherein N and M are integers, N≦M/2. The gateless digital circuit having a modulo M function, a register and a adder operable connected t... | 04/25/2006 |
| 7006702 | Image coding device The image coding device comprises data adding means for adding specific data to input image data at the end of image data, and arithmetic coding unit not issuing remaining output code of code register after coding of final input data. In this constitution, increase ... | 02/28/2006 |
| 7005898 | Programmable divider with built-in programmable delay chain for high-speed/low power application A programmable divider includes a synchronous counter configured to process an input clock signal and produce first output signals in response the input clock signal. A number of logic devices are coupled to the synchronous counter and configurable to receive the fi... | 02/28/2006 |
| 6947077 | Fast and accurate adjustment of gain and exposure time for image sensors A proportional counting circuit generates count values for use in variably adjusting gain and exposure time of an image sensor array. The count values are adjusted in proportion to the current count value. This technique allows for fast and accurate adjustment of ga... | 09/20/2005 |
| 6937290 | Method and apparatus using the Bresenham algorithm to synthesize a composite SYNC signal A method and circuit for generating a train of synthesized sync pulses in accordance with the Bresenham algorithm in response to an input clock having frequency Fi, such that the leading edges of the pulses occur at least nearly periodically, with time-av... | 08/30/2005 |
| 6922456 | Counter system and method A system and method for performing counting operations for a plurality of components is disclosed. A memory stores a plurality of counts from different components. The memory is coupled to a counter and the plurality of counts are accessible to the adder for adding ... | 07/26/2005 |
| 6914463 | Frequency output generation through alternating between selected frequencies Techniques are described for producing a signal having a desired frequency. The desired frequency can be produced to a very high precision, even when the desired frequency is very high. The techniques, in one example, represent an intermediate, otherwise non-availab... | 07/05/2005 |
| 6909767 | Logic circuit Circuit for selecting a second set of binary inputs according to the number of high input signals applied to a first input set. A first subcircuit has the first input set, logic generating control output signals, each control output signal represents whether the fir... | 06/21/2005 |
| 6907098 | Gray code counter A Gray code counter includes a holding circuit, first and second conversin circuit and an operation circuit. The holding circuit stores gray code signals and outputs the stored gray code signals in response to a clock signal. The first conversion circuit receives th... | 06/14/2005 |
| 6757352 | Real time clock with a power saving counter for embedded systems A real time clock counter includes a serially connected plurality of register units, each register unit having a bit register for storing clock data, a half adder for incrementing the clock data stored in the bit register, and an activation circuit for activating th... | 06/29/2004 |
| 6695475 | Temperature sensing circuit and method A method and circuit are disclosed for measuring temperature. An exemplary embodiment of the present invention includes a first oscillator circuit that generates a first signal having a frequency that is dependent upon a sensed temperature. Difference cir... | 02/24/2004 |
| 6466890 | Device for detecting rotational position deviation The present invention relates to a detecting device of rotational position deviation, which detects deviation of the rotational position of machine axes driven by electric motors with pulse signals outputted from pulse generators, which are attached to at... | 10/15/2002 |
| 6208705 | Electronic counter for a non-volatile memory device integrated on a semiconductor An electronic counter for a semconductor-integrated non-volatile memory device includes a single count cell connected with its output to at least one storage element The count cell comprises a summing block of the half-adder type and a master portion of a... | 03/27/2001 |
| 6175607 | Pulse counter The pulse counter counts high speed pulses and detects an absolute phase difference among a plurality of electric motors. Pulse outputs 5 and 6 from pulse generators 3 and 4 are inputted into integrating counters 15 and 16 through pulse converters 9 and 11 and... | 01/16/2001 |
| 6144714 | Programmable fractional frequency digital frequency synthesizer for synchronous residual time stamp service clock regenerator phase locked loop A service clock regenerator regenerates a local clock from time stamps of a remote clock transmitted over a network by determining the slope of (or difference between current and previous) time stamps of the remote clock and the slope of time stamps of th... | 11/07/2000 |
| 6094100 | PLL synthesizer apparatus Disclosed herein is a fractional N-type PLL frequency synthesizer apparatus. A fractional N-type control circuit employed therein for varying N values for each reference cycle is constructed of a combination of a frequency divider (comprising D flip-flops... | 07/25/2000 |
| 6076096 | Binary rate multiplier A rate multiplier for rate multiplying a pulse train comprising: an accumulator, a multiplexer for selecting one of a first and a second number of different signs to feed to the accumulator, and a pulse train gate for providing or blocking the pulse train... | 06/13/2000 |
| 6021171 | Multiplexing decoder/counter circuit for monitoring quadrature position encoders A multiplexing decoder/counter circuit for monitoring quadrature position encoders. The system includes an edge detector, a position counter, a position latch, a capture latch, and compare management means. Addressable memory blocks are used throughout th... | 02/01/2000 |
| 5940467 | Counting circuit Quality requirements on a counter may set a limit to the highest frequency that can be applied to the counter. This will also limit the resolution. A counter is provided including a generator for generating, in response to a first clock frequency, M secon... | 08/17/1999 |
| 5899570 | Time-based temperature sensor system and method therefor A time-based digital temperature sensing system has a first oscillator which is temperature sensitive. The first oscillator has a temperature coefficient which allows the first oscillator to generate an output signal which varies linearly as a function of... | 05/04/1999 |
| 5892405 | PLL synthesizer apparatus Disclosed herein is a fractional N-type PLL frequency synthesizer apparatus. A fractional N-type control circuit employed therein for varying N values for each reference cycle is constructed of a combination of a frequency divider (comprising D flip-flops... | 04/06/1999 |
| 5638418 | Temperature detector systems and methods A temperature detector comprises temperature sensing circuitry calibration circuitry, and power regular circuitry. The temperature sensing circuitry has an output that varies with a temperature to create a temperature variation. The calibration circuitry ... | 06/10/1997 |
| 5617458 | Clock divider The invention discloses a method and an apparatus for implementing an L phase clock in conjuction with L counters, where L is an integer, to count at a frequency scalable by L.... | 04/01/1997 |
| 5615241 | Programmable rate generator A rate generator for use in a video server or other computer system requiring the generation of multiple timing signals from a single fixed frequency clock signal is disclosed. The rate generator stores a count value, a subtrahend value and a preload valu... | 03/25/1997 |
| 5513235 | Integrated circuit thermometer An integrated circuit temperature detector (thermometer) uses a temperature dependent oscillator to count up to a fixed number and thereby generate a time interval indicative of the temperature (a temperature-to-time converter). The time-to-number convert... | 04/30/1996 |
| 5481582 | Rapidly resettable counting device A rapidly resettable counting device is described, which is particularly suitable for use in signal processors and which comprises a counter (1) receiving a clock signal at an input and supplying its output signal to a first register (2) clocked by the cl... | 01/02/1996 |
| 5469483 | Timer with a compensation value to increment or decrement a count value of a counter A timer has a function of compensation calculation and includes a compensation value register 1 for holding a compensation value and an arithmetic unit 2 which adds or subtracts a compensation value "" held in the compensation value register 1 and ... | 11/21/1995 |
| 5438601 | Reference clock frequency divider A reference clock frequency divider feasible for a motor drive IC (Integrated Circuit), optical disk drive, hard disk drive or similar apparatus. The frequency divider is capable of setting not only integral frequency division ratios but also decimal freq... | 08/01/1995 |
| 5422923 | Programmable time-interval generator A programmable time-intervals generator comprising first and second digital counters, a memory, a digital divider and a digital adder. On the occurrence of a first event, the first counter starts counting, and on the occurrence of a second event, only the... | 06/06/1995 |
| 5394450 | Circuit for performing arithmetic operations A race-free arithmetic operation circuit is disclosed. The circuit comprises a register file array, an arithmetic logic unit (ALU), and apparatus for controlling the input and/or the output signal of the ALU. The apparatus for controlling can be two level... | 02/28/1995 |
| 5390223 | Divider circuit structure A divider circuit provides an output signal having a frequency which is equal to the frequency of an input signal divided by an odd integer. This is achieved by feeding back the output from a binary counter through an AND gate, delay flip-flop and an OR g... | 02/14/1995 |
