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| Number | Title | Issue Date |
| 7319852 | Apparatus and method for DC offset compensation in a direct conversion receiver An apparatus for coarse compensation of a direct current (DC) offset in a direct to baseband receiver architecture utilizes a serial analog to digital converter (ADC), such as a Delta-Sigma converter, to convert the received signal to digital form. The output of the... | 01/15/2008 |
| 7312590 | Model railroad velocity controller Control over velocity of a model train may be determined based upon the speed of rotation of a control knob. A processor receives electronic pulses indicating rotation of the knob beyond a predetermined increment of angular distance. The processor calculates the amo... | 12/25/2007 |
| 7176979 | Synchronization pulse detection circuit A synchronization pulse detector includes an absolute value independent shape detector for processing samples of an input signal having a synchronization pulse and a plurality of non-synchronization pulses to determine whether such samples have a predetermined seque... | 02/13/2007 |
| 7161476 | Electronic tire management system An electronic tire maintenance system is provided for measuring a parameter of a device at a first location. The system includes a sensor for measuring the device parameter and generating a data signal representing the measured parameter. The system also includes a ... | 01/09/2007 |
| 7092480 | High-speed synchronous counters with reduced logic complexity Described are fast synchronous counters with reduced combinatorial logic. In one embodiment, a four-bit shift register is configured in a ring and preset with a data pattern (e.g., 1000). The register is then rapidly shifted into any of four unique states. Combinato... | 08/15/2006 |
| 6804562 | Method and apparatus for overload-free driving of an actuator The invention relates to a method for overload-free driving of an actuator, in which an activation counter is incremented or decremented each time an activation request signal occurs, in which, depending on each occurrence of an activation request signal, a drive si... | 10/12/2004 |
| 6735270 | Asynchronous up-down counter and method for operating the same An asynchronous up-down counter includes a plurality of counter blocks. Each of the counter blocks has a counter output, an up-down control output, and an up-down control input. A counter signal output from each of the counter blocks has at least two bits. The async... | 05/11/2004 |
| 6639963 | Up/down gray code counter and solid-state image sensor provided with such a counter A conventional up/down Gray code counter has both a logic circuit section for up counting and a logic circuit section for down counting, and thus has a large circuit scale. To overcome this inconvenience, an up/down Gray code counter of the invention has ... | 10/28/2003 |
| 6556643 | Majority filter counter circuit An improved DDLL containing a majority filter counter circuit is disclosed. The majority filter counter circuit is located between the phase detector and the shift register of the DDLL. The majority filter counter circuit receives shifting commands from t... | 04/29/2003 |
| 6327547 | Method for counting the number of people crossing an entry barrier A method for counting a number of objects passing through an entry threshold, comprising the steps of disposing a sensor (11) having a matrix of sensing points in an area of the entry threshold, identifying successive complete footprints of the same objec... | 12/04/2001 |
| 6215838 | Apparatus and method for cumulatively eliminating noise An apparatus for eliminating noise is disclosed. The present invention includes a counter, which counts in a first direction when an input signal is active, and in a second direction otherwise. A determining device is used to determine a predetermined fir... | 04/10/2001 |
| 6205197 | Programmable supervisory circuit and applications therefor The invention herein provides a supervisory circuit which is adapted to monitor an input signal and produce as an output signal, a parametric signal corresponding to the input signal. The circuit includes an input for receiving the input signal, and a sto... | 03/20/2001 |
| 6018560 | Up/down counter The counter of the present invention includes an input unit, a sampling unit and a determiner unit. The input unit receives a plurality of control signal including a mode selection signal, a clock signal and a reset signal. The sampling unit receives outp... | 01/25/2000 |
| 5808478 | Digitally controlled output buffer to incrementally match line impedance and maintain slew rate independent of capacitive output loading An output buffer with a slew rate that is load independent is comprised of an output buffer (14) that is connected to an output terminal (12). The output buffer (14) is controlled such that it can drive a load (18) with different drive levels by changing ... | 09/15/1998 |
| 5708453 | Ramp signal producing method, ramp signal producing apparatus, and liquid crystal drive/display apparatus In a ramp signal producing apparatus, a ramp signal is produced under low clock signal frequency in a compact circuit arrangement. Luminance control and a white balance control are carried out by the ramp signal in a liquid crystal display. The ramp signa... | 01/13/1998 |
| 5479466 | Zigzag scanning address generator and method therefor A zigzag scanning address generator includes a row address generator for generating a row address signal which stops, increases or decreases a present state in response to an enabling signal, and a column address generator for generating a column address ... | 12/26/1995 |
| 5428654 | Up/down counter apparatus An apparatus for counting occurrences of a particular input during a plurality of succeeding periods. The apparatus comprises an input terminal for receiving the input, a toggle signal generating circuit for generating a periodic toggle signal to mark the... | 06/27/1995 |
| 5365181 | Frequency doubler having adaptive biasing A frequency doubler having adaptive biasing includes one shot circuits 10 and 12, which are responsive to particular transitions of an input signal for generating pulsed signals at each such transition. The widths of the pulses are determined by the magni... | 11/15/1994 |
| 5363254 | Tape recorder capable of varying tape speed A tape recorder comprises a reproducer for reproducing an information signal recorded on a tape-shaped recording medium, a transporter for transporting the tape-shaped recording medium, a dial and a controller for setting a transport speed of the tape-sha... | 11/08/1994 |
| 5323436 | Apparatus of and method for counting a number of revolutions of a servo motor A revolution counting circuit for performing such an operation includes a pulse multiplying unit for multiplying signal pulses generated by an encoder and a pulse dividing unit for dividing the multiplied signal pulses by a divided value set up by a micro... | 06/21/1994 |
| 5321463 | Linear time counter indicating tape running amount A linear time counter for calculating a tape running amount on the basis of a reel rotation number, comprises a reel rotation pulse detection mechanism for detecting the number of reel rotation pulses or reel rotation pulse edges, and a count and calculat... | 06/14/1994 |
| 5309420 | Discriminator for detecting signal presence on optical media To sense the presence of written data on an optical disk, the readback signal from the disk is detected, and the intervals between detected signal events are measured. That signal event occurring at an expected time delta after the preceding signal event ... | 05/03/1994 |
| 5257300 | Digital anti-slosh system The input voltage from a fuel tank level sender is processed by an anti-slosh circuit which has a short time constant during a fast acquire operation and a longer time constant during normal operation. The slew rate of the output voltage provided to a gau... | 10/26/1993 |
| 5208842 | Precision digitally-controlled variable attenuation circuit A precise digitally-controlled variable attenuation circuit for adjusting e attenuation of a signal in an external circuit includes a signal magnitude detector, a resistance adjustment control, and a resistance divider network. The signal magnitude detect... | 05/04/1993 |
| 5206890 | Counter circuit with direction of count indication A counter circuit comprises a signal detector for providing an up/down indication signal and a count clock signal according to an up/down signal and a reference clock signal. A n-bit counter for providing up/down count data of "n" bits according to the up... | 04/27/1993 |
| 5199052 | Reload timer circuit A reload timer circuit comprises an n-bit up/down counter circuit for receiving input data of n bits and providing up/down count data of n bits; an n-bit timer circuit for receiving the n-bit up/down count data and providing timer data of n bits; and a ti... | 03/30/1993 |
| 5193949 | Arrangement for driving a rotary tool An arrangement for driving a rotary tool is provided in which the tool shank is engaged and frictionally driven by the engagement of three or more drive rollers. Axial movement of the tool is accomplished by tilting the axes of the rollers as permitted by... | 03/16/1993 |
| 5193122 | High speed halftone detection technique A simple technique for determining and indicating, in real times as an image is scanned, the presence of halftones within a page. in brief, the technique contemplates monitoring a pixel stream, typically on a line basis, determining the proportion of pixe... | 03/09/1993 |
| 5146479 | Up/down counter for counting binary data stored in flip flops An updown counter up-counts binary data stored in respective flip-flops in an up-count mode, and down-counts the binary data stored in the respective flip-flops in a down-count mode. When a command for an up-count mode is applied by an up/down control sig... | 09/08/1992 |
| 5103185 | Clock jitter suppressing circuit A clock jitter suppressing circuit includes a control circuit, a delay circuit, and a selection circuit. The delay circuit sequentially delays a clock signal at time intervals sufficiently shorter than the period of the clock signal. The selection circuit... | 04/07/1992 |
| 5097491 | Modular gray code counter A Gray Code counter is provided having synchronous, modular circuits for each of the three types of bit positions, i.e., least significant bit ("LSB"), most significant bit ("MSB") and middle bit ("MB"). One LSB and MSB circuit each are used with as many ... | 03/17/1992 |
| 5079549 | Digital resolver with a synchronous multiple count generation A digital resolver is provided that accepts an analog representation of an angular or linear displacement within a reticle modulation cycle of a rotatable or translatable member, and provides a highly accurate output digital representation of the displace... | 01/07/1992 |
| 5063580 | Apparatus for conditioning a control signal Apparatus for controlling the time constant of a signal includes an up/down counter for counting pulses of a clock signal. The count value is utilized as output signal. The output signal is compared with the input signal to provide a first control signal ... | 11/05/1991 |
| 5058145 | System for determining the position of movable machine parts A system for determining the position of movable machine parts including an incremental pulse generator for generating angular-speed pulses includes a computer. At least one counting circuit via which the incremental pulse generator is connected to the co... | 10/15/1991 |
| 5003564 | Digital signal clamp circuitry A digital signal clamp circuit is realized using an adder and an up/down counter. The digital signal is coupled to one input of the adder and the counter output is coupled to a second input of the adder. The up/down counter is enabled to count only during... | 03/26/1991 |
| 4982413 | Method and device for evaluating signals of an incremental pulse generator A method and device for evaluating signals of an incremental pulse generator for generating at least two mutually phase-shifted angular speed signals includes counting the angular speed signals only if a permissible combination of the angular speed signal... | 01/01/1991 |
| 4965816 | Digital logic circuit for incremental encoders A digital logic circuit for use with an incremental positioning encoder is presented. The circuit converts two quadrature pulse train signals, generated by an incremental position type encoder, to a counting CLOCK signal and an UP/DOWN count signal. The s... | 10/23/1990 |
| 4961014 | Filter circuit utilizing reversible counter for generating a satisfactory hysteresis A filter circuit uses a reversible counter to eliminate noise from an input signal which changes between high and low levels. The input signal is sampled in response to a clock signal of selected frequency and the reversible counter is incremented by a sa... | 10/02/1990 |
| 4955041 | Electronic pulse counter for simultaneous downward and upward counting An electronic pulse counter includes a given number of shift registers each having a different number of memory elements, an input, an output and a clocking line. Each of the shift registers is countercoupled by a negation between the input and the output... | 09/04/1990 |
| 4951300 | Precision position detection device This invention relates to a precise position device, particularly to such device in which an insensitive zone of an absolute signal consisting of a stepped analog signal formed on the basis of the two-phase incremental position detection signal obtained f... | 08/21/1990 |
