Did You Know...
...that the video game, Pong, was invented by a guy who graduated at the bottom of his engineering class? Nolan Bushnell spent more time running the games at a local amusement park than he did on his studies at the University of Utah. His dreams of working for Disney's amusement empire were dashed when the company wouldn't hire him. Taking a boring job, Nolan daydreamed about electronic versions of popular games. He invented Pong, the first video game, and went on to found Atari Co.
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| Number | Title | Issue Date |
| 7304545 | High latency timing circuit A phase locked loop (PLL) circuit, comprises a frequency integrator circuit that receives a target signal, a phase shift signal and a frequency gain correction parameter and that selectively disables tracking frequency offset based on a value of the frequency gain c... | 12/04/2007 |
| 7263139 | Phase correction for a phase modulated signal with mutually interfering symbols A circuit and method for correcting phase of a received phase modulated (PM) signal. The method uses k most recently received data bits, which alternate between in-phase I and quadrature Q bits, as an address for a lookup table 60. The lookup table outputs a ... | 08/28/2007 |
| 7233632 | Symbol timing correction for a phase modulated signal with mutually interfering symbols A circuit and method for correcting timing of a received phase modulated signal. The method uses k most recently received data bits as an address for a lookup table 60. The lookup table includes reconstructed waveforms from which a timing weighing factor is d... | 06/19/2007 |
| 7227920 | Circuit and method for correcting clock duty cycle Disclosed is a circuit for controlling the duty cycle and jitter of a clock signal. The circuit has an input node for receiving the clock signal and an output node for outputting a processed clock signal having a first edge that is synchronized to an edge of the clo... | 06/05/2007 |
| 7205800 | Clock frequency divider circuit A clock frequency divider circuit including: a storing section for storing an input signal in synchronism with an input clock signal; a supplying section for supplying, as the input signal, one of a first value obtained by adding a value stored by the storing sectio... | 04/17/2007 |
| 7123679 | Counter having improved counting speed A counter having enhanced counting speed is provided. The counter includes first through N-th output signal generators. The first output signal generator responds to a clock signal and outputs a first output signal in which a low level and a high level are output on... | 10/17/2006 |
| 7049896 | High latency timing circuit A phase locked loop circuit includes a frequency integrator responsive to a received signal. A phase integrator is responsive to the frequency integrator and a phase shift measurement circuit is responsive to the phase integrator and in communication with the freque... | 05/23/2006 |
| 7031539 | Coding of concentric information A method for coding in frequency, module and phase a digital representation, in the space field, of a ring-shaped element, including the steps of: applying to any point of the element a polar conversion at constant angle, whereby the element is unfolded in rectangul... | 04/18/2006 |
| 6924684 | Counter-based phase shifter circuits and methods with optional duty cycle correction Phase shifter circuits and methods use counters to define the positions of the output clock edges. A plurality of counters are each clocked by a count clock relatively much faster than the input clock. A first counter counts for one input clock period, and a delay v... | 08/02/2005 |
| 6459751 | Multi-shifting shift register A multi-shifting shift register is adapted for outputting a selected address signal to a memory unit, and includes a control circuit for outputting a number (i) of shift signals and a timing pulse signal. One of the shift signals is at an enabled state an... | 10/01/2002 |
| 5754616 | Two-phase counter circuit A counter operated on the 2-phase clock which divides a lag time occurring in shift circuits into two parts, one being on the basis of a first clock and the other being on the basis of a second clock, the lag time in each part being independently accumula... | 05/19/1998 |
| 5568071 | Pulse phase difference encoding circuit A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality o... | 10/22/1996 |
| 5525899 | Physical quantity change detection device which detects change by detecting a phase difference between two pulses An object of the present invention is to provide an A/D conversion device capable of compensating for quantizing errors occurring as a result of variations in operating conditions and a physical quantity detection device using this A/D conversion device. ... | 06/11/1996 |
| 5504790 | Digital data phase detector A digital phase detector that stores four sequential digital samples in a shift register. The contents of the shift register is evaluated at one half the clock frequency which generated the digital samples. The digital phase detectors predicts what the va... | 04/02/1996 |
| 5289135 | Pulse phase difference encoding circuit A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality o... | 02/22/1994 |
| 5128624 | Pulse phase difference encoding circuit A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality o... | 07/07/1992 |
| 5113086 | Polarotator pulse generator circuit for a receiver of satellite broadcasting A polarotator pulse generator circuit is disclosed in which a sine-to-square converter converts a sine wave of AC power supply to a square wave, a clock synchronizer synchronizes the square ware of the sine-to-square converter with a high frequency clock ... | 05/12/1992 |
| 5111206 | Velocity deception apparatus A velocity deception apparatus utilizes a serrodynable digital phase shifter of the Schiffman type where each cell of the phase shifter is driven by an output of a multi-bit counter whose clock input in turn is driven by a voltage-to-frequency converter w... | 05/05/1992 |
| 5058145 | System for determining the position of movable machine parts A system for determining the position of movable machine parts including an incremental pulse generator for generating angular-speed pulses includes a computer. At least one counting circuit via which the incremental pulse generator is connected to the co... | 10/15/1991 |
| 5048063 | Machine position detecting apparatus A machine position detecting apparatus according to the invention detects the absolute position of a machine by a pulse coder or the like attached to a movable element. Whenever the movable element of the machine is stopped, a check is performed to determ... | 09/10/1991 |
| 5033066 | Event tagging time delay A time delay circuit for providing a delayed replica of a digital input signal including first and second counters for providing first and second count outputs offset relative to each other by a predetermined value indicative of a predetermined delay, and... | 07/16/1991 |
| 4982413 | Method and device for evaluating signals of an incremental pulse generator A method and device for evaluating signals of an incremental pulse generator for generating at least two mutually phase-shifted angular speed signals includes counting the angular speed signals only if a permissible combination of the angular speed signal... | 01/01/1991 |
| 4961207 | Synchronization of digital signals with alternating current A circuit for synchronizing digital signals with alternating current includes a first counter that repetitively starts a first counting sequence at a predetermined phase point in each AC line cycle and effects the sequence at a high frequency rate thereby... | 10/02/1990 |
| 4952883 | Phase detector circuit for periodic signal using three sampling data A phase detection circuit for detecting the phase shift of an input signal. An A/D converter converts the input signal into first, second and third digital data according to successive three sampling points. A first subtractor subtracts the third data fro... | 08/28/1990 |
| 4951301 | TTL technology digital timing unit Timing unit for generating a timing signal for synchronous microprocessors in which an oscillator generates a base frequency equal to four times the timing frequency for the microprocessor. A frequency divider divides the base frequency by four, and a shi... | 08/21/1990 |
| 4928456 | Process for rapping of electrostatic precipitator surfaces A method for removing precipitate from a collecting surface of an electrostatic precipitator by rapping a point on the surface. Mechanical energy is applied a plurality of times with a rapper wherein the level of mechanical energy increases from one appli... | 05/29/1990 |
| 4903283 | Phase determining circuit to generate a phase control signal, and method for generating said signal The phase of an actual pulse signal (2') with respect to a phase reference pulse signal (1') can be accurately determined and a control output signal in form of a digital number be obtained rapidly depending on the relative temporal position of the phase ... | 02/20/1990 |
| 4847879 | Frequency sensing and control circuit In construction of a digital phase locked loop for detection of the angular displacement of a mobile object depending on input signals from an encoder, is provided a bit number control circuit so that working bit numbers of A/D converters and a counter in... | 07/11/1989 |
| 4845727 | Divider circuit A pulse train divider circuit includes a first flip-flop (1) whose Q output is connected to the D input of a second flip-flop (2) whose Q output is connected to the D input of the first flip-flop (1). A pulse train to be divided is applied via an input (3... | 07/04/1989 |
| 4841552 | Digital phase shifter A novel digital phase shifter is provided for accomplishing digital phase shifting without the requirement of complex multiplication. The phase shifter includes buffer registers for receiving and storing the inphase and quadrature components of a complex ... | 06/20/1989 |
| 4763342 | Digital phase-locked loop circuits with storage of clock error signal The digital phase-locked loop circuit extracts the clock signal from a serial flow of coded data by operating so as to determine the phase of the received signal and comparing this phase with that of a locally-generated signal. The error signal obtained f... | 08/09/1988 |
| 4715050 | Digital phase-locked loop circuit During the receipt of a result of comparison from the phase detector representing that the synchronization signal is phase-delayed behind the input signal, the selection circuit sequentially selects the M number of counters, one by one, in a cyclic fashio... | 12/22/1987 |
| 4712223 | Linear all-digital phase locked loop A digital phase locked loop to function as a stable reference clock given a gapped, or pulse stuffed, input clock signal which may have a frequency offset relative to the nominal specified frequency and a phase jitter relative to the average frequency of ... | 12/08/1987 |
| 4712224 | Offset digitally controlled oscillator An all digital equivalent to a voltage controlled oscillator with low intrinsic jitter and the absence of sample aliasing within a nonzero bandwidth, the offset (non-symmetrical) digitally controlled oscillator comprising a divider (divide by n or n-1) wh... | 12/08/1987 |
| 4712225 | Phase quantizer apparatus Phase quantizer apparatus in an all digital phase locked loop to provide a two-part digital number representing the phase of the input signal (a noncontinuous pulse train) relative to the output signal of the all digital phase locked loop. The phase quant... | 12/08/1987 |
| 4700367 | Pulse width control circuit A pulse width control circuit for providing a control signal to adjust variations of electrical characteristics among a plurality of printing elements has an up/down counter and a plurality of control signal generating circuits. The up/down counter counts... | 10/13/1987 |
| 4654599 | Four phase clock signal generator A system for and a method of generating a four phase clock signal is disclosed. The system includes an oscillator circuit that generates a clocking signal of frequency F. A flip-flop, under control of a Master Clear signal, establishes the first stage of ... | 03/31/1987 |
| 4649553 | Microwave digital phase-shifter apparatus and method for construction An electronic phase shifter utilizes a serrodynable digital phase shifter which is driven by the output of a multi-bit counter. The counter in turn has its clock input driven by a pulse train which produces the desired frequency translation for noise and ... | 03/10/1987 |
| 4606058 | Process for generating control signals in a predeterminable phase position, circuit arrangement for effectuating the process and utilization of the circuit arrangement A process and an arrangement for generating control signals in a predeterminable phase position relative to an alternating voltage at an at least short term-stable frequency through the utilization of a higher-frequencied, at least short term-stable auxil... | 08/12/1986 |
| 4594516 | Sampling pulse generator A first 5-stage ring counter generates a signal having a frequency of (4/5)fSC by dividing a frequency 8fSC of a signal. A second 5-stage ring counter generates a signal having a frequency of (4/5)fSC by dividing a frequen... | 06/10/1986 |
