Bizarre Patents
Crispy Chip Sandwich and Process of Producing a Sandwich Product
A food product comprising a multilayer cookie or snack having outer layers formed from a crispy type edible food product such as a potato chip or corn chip, etc. with an intermediate marshmallow layer being in contact with the inner surface of each crispy chip and one or more filler substances.
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| Number | Title | Issue Date |
| 7426253 | Low latency counter event indication A hybrid counter array device for counting events with interrupt indication includes a first counter portion comprising N counter devices, each for counting signals representing event occurrences and providing a first count value representing lower order bits. An ov... | 09/16/2008 |
| 7289542 | Method for operating a PLL frequency synthesis circuit In a method for operating a PLL frequency synthesis circuit, the circuit is in an active state and synthesizes a first output frequency during a first data transmission period. The circuit is likewise active and synthesizes a second, different output frequency durin... | 10/30/2007 |
| 7139344 | Method and apparatus for effecting synchronous pulse generation for use in variable speed serial communications A method for effecting synchronous pulse generation for use in variable speed serial communications is provided. The method includes the steps of obtaining a communication link speed; generating a difference signal representing a signal level difference between at l... | 11/21/2006 |
| 7103125 | Method and apparatus for effecting synchronous pulse generation for use in serial communications A method for effecting synchronous pulse generation for use in serial communications is provided. The method includes the steps of generating a difference signal representing a signal level difference between at least two data stream signals; providing a clock signa... | 09/05/2006 |
| 6922456 | Counter system and method A system and method for performing counting operations for a plurality of components is disclosed. A memory stores a plurality of counts from different components. The memory is coupled to a counter and the plurality of counts are accessible to the adder for adding ... | 07/26/2005 |
| 6823275 | Fault tolerant apparatus and method for determining a revolution rate of a gear An apparatus comprises an edge detector, a memory and a pulse-input engine. The edge detector is configured to receive an input signal and a counter signal. The edge detector is further configured to send a set of time values based on the input signal and the counte... | 11/23/2004 |
| 6711513 | Fault tolerant apparatus and method for determining a revolution rate of a gear A measurement system and method for determining a revolution rate of a rotating gear is described. Such a rotating gear can be, for example, a turbine or compressor. The described measurement system and method, for example, can perform highly accurate measurements a... | 03/23/2004 |
| 6675188 | Counter control apparatus and control method thereof In a counter readout control apparatus comprising a plurality of counters, in which an upper-order counter performs a counting operation upon receiving a carry from a lower-order counter, this apparatus further comprising, a first means for resetting each... | 01/06/2004 |
| 6226345 | High speed clock having a programmable run length The present invention is embodied in a system and method for using cascaded counters with a programmable branch and one or more event clocks that together provide the capability to generate clock pulses at high speed. Further, the programmable counter of ... | 05/01/2001 |
| 5642391 | Method and apparatus for monitoring channel performance on a channel using alternate mark inversion protocols A method and apparatus monitor the performance of a DDS loop connecting an information transmitter to an information receiver. The information transmitter is typically at a customer premises while the receiver is typically an OCU at the receiving local of... | 06/24/1997 |
| 5321733 | Counter circuit using Johnson-type counter and applied circuit including the same A counter circuit includes Johnson-type counters of m stages, each counter including a plurality of flip-flops connected in a cascade connection, each flip-flop receiving a clock signal at a respective clock input end. In the constitution, signals at resp... | 06/14/1994 |
| 5257299 | Method and system for counting irregularly shaped moving articles A method and a system for counting irregularly shaped articles that are being moved along a path into and out of a machine. A microprocessor is responsive to three external devices with the first device being located at the input stage of the machine and ... | 10/26/1993 |
| 5172398 | Method and device for recording charges for copies made on a copying machine A device for selectively recording charges for copies made on a copying machine by way of two or more accounting means connected at the same time via the device to the copying machine, comprising means for coupling the device to the copying machine, a plu... | 12/15/1992 |
| 5095264 | Frequency counter and method of counting frequency of a signal to minimize effects of duty cycle modulation A dual-edge frequency counter and method for minimizing the effects of duty cycle modulation. In its simplest form, a dual-edge counter (50) includes a first counter (52) that accumulates reference clock pulses between successive rising edges of an input ... | 03/10/1992 |
| 4991186 | High frequency clock pulse counter A counter comprising n one-bit cells receiving a clock signal (CK0) having a frequency f to be counted and a read transfer order (TO). The lower rank p cells operate at the frequency f and the n-p higher rank cells at a frequency f/2p. The lowe... | 02/05/1991 |
| 4956804 | Data processing system with memories access time counting and information processor wait signal generating circuitries An electronic equipment has a central processing unit (CPU), a first memory accessable by the CPU, a first setting circuit for holding a signal representative of a rated access time of the first memory and a removable auxiliary memory which includes a sec... | 09/11/1990 |
| 4590432 | Constant-percent break pulse corrector Constant-percent break interval pulse correctors insure that the break interval of a dial pulse subsists for a substantially constant percentage of the total pulse interval; i.e., break interval plus make interval. The constant-percent break interval puls... | 05/20/1986 |
| 4589019 | Digital adder including counter coupled to individual bits of the input An adder circuit is described for producing signals representative of the sum of large numbers of block-synchronized digital signals each of which may have any value within the range of quantizing levels represented. The adder circuit includes one or more... | 05/13/1986 |
| 4546288 | Arrangements for Fast Readout of n stage arrays of gas discharge chambers An n stage array of gas discharge chambers is divided into m groups of y stages each. Priming arrangements are provided whereby serial readout of the stages in each group can be accomplished simultaneously thereby increasing the speed of readout.... | 10/08/1985 |
| 4519091 | Data capture in an uninterrupted counter A method of sampling accurately the instantaneous content of a high speed counter without interrupting the counting process is provided. The method is applicable even when the higher order digits of the counter are constructed by slower switching circuits... | 05/21/1985 |
| 4499588 | System for converting the frequency of a pulse train to a binary number A system for converting the frequency of a pulse train to a binary number includes an output counter which converts the pulse train to the binary number. Sampling time periods are applied as pulses to a comparator through another counter. The number of de... | 02/12/1985 |
| 4484330 | Majority vote circuit A majority vote circuit determines when the majority of a group of signaling channels is properly conveying a common message in conjunction with a status signal individual to each channel. Respective status and message signals from each channel are scanne... | 11/20/1984 |
| 4477918 | Multiple synchronous counters with ripple read A system for reading out the contents of multiple counters onto a common bus comprising a plurality of synchronous binary counters arranged in a ring with each counter having N corresponding stages each having an output terminal on which appears the conte... | 10/16/1984 |
| 4404426 | Cryptographic telegraphy programming system 1. Apparatus for producing multiple combinations of parallel output binary signals for controlling an anti-jam or other form of telegraphy system comprising four parallel feedback shift registers, a pair of serial to parallel converters, each having an in... | 09/13/1983 |
| 4396829 | Logic circuit A logical circuit which is capable of serving not only as a shift register but also as counter, comprises a cascade-connection of flip-flops of the same number as the number of bits required. The flip-flops have an input connected to a logical gate group ... | 08/02/1983 |
| 4393457 | Method and apparatus for sequencing addresses of a fast Fourier transform array An apparatus and method for generating a specific sequence of addresses of values of an array stored in a digital memory. The addresses are generated by a first counter which generates a seed value and a second counter which generates a control value, the... | 07/12/1983 |
| 4393301 | Serial-to-parallel converter A serial-to-parallel converter receives serial data bits forming serial input words and serial word synchronizing pulses indicating the length of the serial input words. A parallel clock signal is generated synchronously with an integer number of serial w... | 07/12/1983 |
| 4362926 | Bus-register device for information processing A register circuit for processing information in accordance with a given instruction set or set of transformation comprises N registers each having an input and an output and provided in a sequence R1, R2, R3, . . . R... | 12/07/1982 |
| 4354098 | Egg counter A counting apparatus is provided for producing a countable signal in response to each object moving past a predetermined point in a predetermined path of travel. This counting apparatus comprises a lever interposed in the path of travel substantially adja... | 10/12/1982 |
| 4352009 | Variable ratio totalizer A totalizer receives output pulses from two different meters and records them on a single data channel of a magnetic recorder. First and second memories are used alternately in successive demand intervals to store the outputs from both meters irrespective... | 09/28/1982 |
| 4341950 | Method and circuitry for synchronizing the read and update functions of a timer/counter circuit The present invention pertains to a method and synchronizer circuit for controlling the counting operation of a timer/counter circuit to synchronize the read and update functions of this circuit. The synchronizer circuit is capable of establishing a searc... | 07/27/1982 |
| 4336445 | Electrical totalizer An electrical totalizer for forming an output signal with occurrences separated by a minimum time interval and representative of the total number of random occurrences in first and second circuits. First and second input circuits receive occurrences from,... | 06/22/1982 |
| 4253014 | Resettable counter for postage meter In a postage meter which can be set to imprint a selected value of postage on individual mail pieces, two counters are typically provided for accounting purposes. One counter is an accumulating counter into which the postage value imprinted during each op... | 02/24/1981 |
| 4242683 | Signal processor A signal processor having a plurality of charge transfer devices adapted for coupling to an input signal source. Each one of such devices produces a sample of the input signal in response to a sampling signal. An input shift register having a plurality of... | 12/30/1980 |
| 4227070 | Electrical totalizer An electrical totalizer for forming an output signal with occurrences separated by a minimum time interval and representative of the total number of random occurrences in first and second circuits. First and second input circuits receive occurrences from,... | 10/07/1980 |
| 4223210 | Electronic vending machine selection counter Electronic apparatus for recording the number of times each selection offered by a vending machine is chosen by customers and for displaying such information sequentially in either ascending or descending order.... | 09/16/1980 |
| 4222045 | Capacitive shift fire detection device A capacitive shift fire detection device having a sample circuit and a reference circuit, each circuit having an air capacitor connected to an oscillator and a counter. The presence of particles of combustion in the ambient environment results in a change... | 09/09/1980 |
| 4214152 | Error correction in a remote meter reading device In a remote meter reading device involving a plurality of dials, mechanical inaccuracies in the hand position are compensated for by dividing each dial into sectors, sequentially reading each dial starting with the least significant dial and adding, to ea... | 07/22/1980 |
| 4178614 | Readout of a densely packed CCD High vertical resolution can be obtained in a charge-coupled device (CCD) imager of the field transfer type by integrating charge in the A register in storage potential wells separated by potential barriers, with no empty potential wells separating the st... | 12/11/1979 |
| 4163291 | Input-output control circuit for FIFO memory In transmitting data between a plurality of sequentially connected FIFO type memory elements by controlling a binary coded signal a circuit element is provided in a manner to correspond to each memory element, so as to indicate a data storage state. A cir... | 07/31/1979 |
