Did You Know...
...that the Slinky toy was the result of a failed attempt by engineer Richard James to produce an antivibration device for ship instruments? His goal was to develop a spring that would instantaneously counterbalance the wave motion that rocks a ship at sea. Instead, he developed the Slinky.
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| Number | Title | Issue Date |
| 8014487 | High-frequency counter A counter circuit and method of controlling such a counter circuit, including a first counting section that counts in accordance with a state-cycle, and a second counting section clocked by the first counting section. At least one invalid counting state is introduce... | 09/06/2011 |
| 7869558 | Method and apparatus for calibrating a counting circuit Timing circuitry may use control circuitry to control calibration circuitry to calibrate a counter so that an adder and a calibration period counter are not required. Concatenation circuitry may be used to concatenate a portion of the counter value and the calibrati... | 01/11/2011 |
| 7688932 | Detection of a digital counter malfunction A method and a circuit for detecting a malfunction of at least one first counter controlled by a first signal, in which a second counter, controlled by a second signal identical to the first signal or to its inverse, and counting in the reverse direction with respec... | 03/30/2010 |
| 7321651 | High frequency circuit capable of error detection and correction of code patterns running at full speed A method, an apparatus, and a computer program are provided for generating an error detection state and correction of code patterns. Generally, conducting full speed testing of the dI/dt circuit in a low bandwidth lab environment is difficult. A circuit, however, ca... | 01/22/2008 |
| 7292177 | Counter circuit, AD conversion method, AD converter, semiconductor device for detecting distribution of physical quantities, and electronic apparatus An asynchronous counter that is capable of switching count mode includes flip-flops, and three-input single-output tri-value switches respectively provided between the adjacent pairs of the flip-flops. The tri-value switches switch among three values, namely, non-in... | 11/06/2007 |
| 7268597 | Self-initializing frequency divider A frequency divider apparatus is a closed loop system of a recirculating memory element, at least one feedback memory element and an end memory element in series combination. Each memory element accepts a common clock. An end memory element output is logically combi... | 09/11/2007 |
| 7245690 | Shift register and electronic device using the same The invention provides a shift register which can function normally even with an abnormal register or a broken register while suppressing the manufacturing cost as little as possible. The shift register of the invention includes n regular registers (SR(1) to ... | 07/17/2007 |
| 7209809 | Method and apparatus for obtaining high integrity and availability in multi-channel systems Systems and methods for asynchronous multi-channel data communications are provided. An embodiment of the invention includes a minimum of three channels for digital computation in Primary Flight Computers and four channels for digital/analog conversion in Actuation ... | 04/24/2007 |
| 7154983 | Method of operating a first-in first-out (FIFO) circuit The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of write signals each respectively coupled to a clock, one of the plurality of registers, and a plurality of re... | 12/26/2006 |
| 7145978 | High speed binary counter A high speed binary counter includes a counting first flip-flop for each binary bit, a single AND gate for each lower order binary bit beyond B0 and B1, and at least two AND gates for each higher order binary bit. The counter also includes an input fac... | 12/05/2006 |
| 7126371 | Multi-function IC card When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply... | 10/24/2006 |
| 7120220 | Non-volatile counter A non-volatile counter circuit includes a state machine having a first input for receiving one or more control signals, a second input for receiving a current count value, a third input for receiving historical information, and an output for providing a next count v... | 10/10/2006 |
| 7119587 | High frequency divider state correction circuit The present invention provides for state correction. A first value in a state circuit is received from a flip flop. The received value is transmitted to a second flip flop. The received value within the second flip flop is altered if an error condition arises. The r... | 10/10/2006 |
| 7092479 | Ripple counter circuits in integrated circuit devices having fast terminal count capability and methods of operating the same Ripple counter circuits in integrated circuit devices can have fast terminal count capability. A terminal count circuit can be configured to mask selected unstable counter bits generated by a ripple counter circuit using an indication that a terminal state of the ri... | 08/15/2006 |
| 7085341 | Counter with non-uniform digit base A nonvolatile counter. A nonvolatile storage is organized in digits having non-uniform bases. Circuitry is provided to increment a count value represented by the digits in response to an increment command. ... | 08/01/2006 |
| 7071741 | Interrupt-based phase-locked frequency multiplier A method and system utilize a processor's digital timer and two interrupts to form a frequency multiplier. The first interrupt's processing time window is definable by a first number of counts C1 of the digital timer while the second interrupt's processin... | 07/04/2006 |
| 7061284 | High frequency divider state correction circuit with data path correction The present invention provides for state correction. A first flip flop coupled to a second flip flop. A state correction circuit coupled to the output of the second flip flop. A third flip flop is coupled to the output of the state correction circuit. A fourth flip ... | 06/13/2006 |
| 7005898 | Programmable divider with built-in programmable delay chain for high-speed/low power application A programmable divider includes a synchronous counter configured to process an input clock signal and produce first output signals in response the input clock signal. A number of logic devices are coupled to the synchronous counter and configurable to receive the fi... | 02/28/2006 |
| 6979995 | Frequency measuring circuit and resonant pressure sensor type differential pressure/pressure transmitter using the frequency measuring unit A time difference signal having a pulse width corresponding to the time difference between an output of a resonant pressure sensor and a reference clock is prepared. The pulse width of the time difference signal is expanded by a given magnification. Based on a count... | 12/27/2005 |
| 6956549 | LCD driver An LCD driver compares an image signal with a count of a counter repeatedly counting a clock. Based on the result of the comparison, the LCD driver outputs pulses each having a duty factor in accord with the image signal. When the count is not between first and seco... | 10/18/2005 |
| 6949960 | Semiconductor integrated circuit comprising functional modes An integrated circuit device includes a pin for receiving a DC voltage component signal. The device includes a signal source for applying an AC signal to the pin, a buffer for converting the AC signal into a digital signal, and a digital detector for detecting a fre... | 09/27/2005 |
| 6950490 | Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio A fault state detector for a ring counter is formed from unit current sources each switched under the control of a different one of the outputs of the ring counter. The currents switched in that manner are passed through a unit resistance to generate a voltage signa... | 09/27/2005 |
| 6937688 | State machine, counter and related method for gating redundant triggering clocks according to initial state A state machine, a counter, and related method for gating redundant triggering clocks according to the initial states is provided. The state machine includes a plurality of state units and a clock gating circuit. Each of the state unit is triggered by a clock to gen... | 08/30/2005 |
| 6882697 | Digital counter A digital counter with a dial position having a hardware part which determines the n lowest-value bits of the dial position and a software part which determines the remaining higher-value bits of the dial position includes first and a second software parts as the so... | 04/19/2005 |
| 6828817 | Testing device included in the electrooptic device The invention provides an electrooptic device and an electronic apparatus, in which the electrical characteristics of many thin-film switching elements formed in a substrate to support an electrooptic material can be accurately inspected. The invention also provides... | 12/07/2004 |
| 6826249 | High-speed synchronous counters with reduced logic complexity Described are fast synchronous counters with reduced combinatorial logic. In one embodiment, a four-bit shift register is configured in a ring and preset with a data pattern (e.g., 1000). The register is then rapidly shifted into any of four unique states. Combinato... | 11/30/2004 |
| 6792065 | Method for counting beyond endurance limitations of non-volatile memories A digital counter that uses non-volatile memories as storage cells, wherein the storage cells are sub-divided into two groups, one for the implementation of a rotary counter that keeps track of the less significant part of the count and a binary counter that keeps t... | 09/14/2004 |
| 6704387 | Method and apparatus for normalized bit counting A method and apparatus for providing of normalizing a bit count is provided. The method comprises counting bits for a first frame, and normalizing a target bit in a target frame using the bits of the frame. The method then comprises counting to the normal... | 03/09/2004 |
| 6687325 | Counter with non-uniform digit base A nonvolatile counter. A nonvolatile storage is organized in digits having non-uniform bases. Circuitry is provided to increment a count value represented by the digits in response to an increment command.... | 02/03/2004 |
| 6661864 | Counter circuit for detecting erroneous operation and recovering to normal operation by itself A counter circuit includes a plurality of flip flop circuits (FF circuits) sequentially connected for receiving a common clock signal, and two-input logic gates each having an input connected to an output of a corresponding FF circuit and the other input ... | 12/09/2003 |
| 6578161 | Counting apparatus, counting method, and computer readable storage medium A counting apparatus comprising an execution detection circuit for detecting the execution of a predetermined operation; plural memory circuits for commonly storing the information on the number of execution at each detection of the execution; a destructi... | 06/10/2003 |
| 6519311 | Overflow detector for FIFO The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of write signals each respectively coupled to a clock, one of the plurality of registers, and a plur... | 02/11/2003 |
| 6486717 | Divider with cycle time correction The oscillator 40 with cycle time correction includes a low accuracy oscillator 30A generating a clock CLK3, a counter 41 counting the clock CLK3 and cleared by activation of a clear signal CLR1, a register 42 storing a count CN of the counter 41 as a ref... | 11/26/2002 |
| 6473722 | Compact fault detecting system capable of detecting fault without omission A fault detection system applies known data to the input of a circuit being inspected for faults and examines the circuit output for expected results. Faults in a circuit are detected by receiving unexpected results at the circuit output. A fault detectio... | 10/29/2002 |
| 6473484 | Binary counter and method for counting to extend lifetime of storage cells A digital counter and method for counting are implemented which minimize fatigue-related failure in the storage element for the count value. The counting sequence is chosen such that the transitions within individual storage elements are the same for each... | 10/29/2002 |
| 6459752 | Configuration and method for determining whether the counter reading of a counter has reached a predetermined value or not A system and a method are characterized in that the method of detection can be configured by varying a size and/or a position of a time slot to be taken into consideration for the detection and/or by varying relevant bits of the counts to be compared. Thi... | 10/01/2002 |
| 6396894 | Overflow detector for FIFO The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of write signals each respectively coupled to a clock, one of the plurality of registers, and a plur... | 05/28/2002 |
| 6385274 | Watchdog timer for resetting microcomputer before runaway A watchdog timer includes an instruction decoder, a delay circuit and a counter. The instruction decoder decodes a watchdog timer initialization instruction regularly executed to generate an instruction pulse for initializing the count of the counter. The... | 05/07/2002 |
| 6292524 | Counting apparatus and rotation stopped detection apparatus which uses a counting apparatus A counting apparatus having excellent fail-safe characteristics can be used in a rotation-stopped detection apparatus. As a first feature, timing of a high-frequency signal P2 is carried out by a counter 1 after completion of a counting of puls... | 09/18/2001 |
| 6266625 | Calibrating high resolution measurements There is described a method and system for calibrating measurements, in particular for calibrating a high resolution counter against an accurate real time calibrated clock signal. The method comprising obtaining the calibrated low resolution clock measure... | 07/24/2001 |
