Safety System For Remove a Rider From a Vehicle by Deploying a Parachute
Methods and apparatus for reducing the velocity of a rider in or on an open cockpit vehicle when the rider is thrown from the vehicle.
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| Number | Title | Issue Date |
| RE43204 | Data transmission process with auto-synchronized correcting code, auto-synchronized coder and decoder, corresponding to transmitter and receiver A data transmission process with auto-synchronised correcting code, auto-synchronised coder and decoder, corresponding transmitter and receiver. According to the invention, synchronisation management signals (HS, SS, ID) are formed and, under the control of t... | 02/21/2012 |
| 8116416 | Method for determining synchronization code under SMIA A method for determining the synchronization code under a standard mobile imaging architecture is provided. This method is essentially to solve any possible error occurring as transferring the images among the mobile devices. If any error is occurred to the transfer... | 02/14/2012 |
| 8059776 | Method and system for sub-chip resolution for secondary cell search A Universal Mobile Telecommunications System (UMTS) receiver comprises an adjustable delay line, a secondary synchronization processor and a controller. The secondary synchronization processor performs frame synchronization on a received wireless signal that is prov... | 11/15/2011 |
| 7995694 | Systems and methods for detecting a specific timing from a synchronization channel A method for detecting a specific timing from a synchronization channel is described. A signal with a known sequence is received. Two or more correlation values between the received signal and the known sequence are calculated at two or more positions. The two or mo... | 08/09/2011 |
| 7965804 | Method of link word synchronization A method for word synchronization can be applied to asynchronous devices including SERDES devices connected across serial lines. A state transition methodology characterizes the state of the device based on control characters received consistently across the serial ... | 06/21/2011 |
| 7953198 | Frame synchronisation scheme with interference reduction A frame synchronization is proposed for a multi-band communication system, wherein a data signal exchanged between a transmitter and a receiver is organized in system frames having a preamble section which contains a frame synchronization section that is composed of... | 05/31/2011 |
| 7936856 | Timing synchronization in wireless communication system A synchronization circuit includes a correlator, an energy calculator, a post-processing unit, and a decision device. The correlator correlates a received sequence r(t) with a local sequence c(i) to obtain a correlation result h(t). The energy calculator calculates ... | 05/03/2011 |
| 7822163 | Frame synchronization using accumulated summation A technique for synchronizing a device for communication is based on an accumulated sum of values or absolute values. The absolute value can be of either the sum or difference of a plurality of symbols. In one embodiment, the absolute values of the sum or difference... | 10/26/2010 |
| RE41774 | Data transmission process with auto-synchronized correcting code, auto-synchronized coder and decoder, corresponding transmitter and receiver A data transmission process with auto-synchronised correcting code, auto-synchronised coder and decoder, corresponding transmitter and receiver. According to the invention, synchronisation management signals (HS, SS, ID) are formed and, under the control of t... | 09/28/2010 |
| 7792233 | Packet preamble search method and device thereof A packet preamble search method is disclosed for locating a packet preamble with multiple predetermined patterns of a regular form within a received transmission signal with sequential multiple patterns. The pattern of the received transmission signal and the predet... | 09/07/2010 |
| 7778370 | Frame synchronization Frame synchronization methods and systems suited for packet communications systems, and particularly time frequency hopping packet communication systems, are disclosed. Frame synchronization is performed by performing a first correlation on information of received s... | 08/17/2010 |
| 7720187 | Methods and apparatus for reducing discrete power spectral density components of signals transmitted in wideband communications systems Methods and apparatus for reducing discrete power spectral density (PSD) components of wideband signals transmitting blocks of data are disclosed. Discrete components are reduced by acquiring N symbols of pseudo-random data, each symbol having K bits; selecting one ... | 05/18/2010 |
| 7715510 | Method and device to maintain synchronization tracking in TDD wireless communication A Method to maintain Synchronization Tracking in TDD Wireless Communication comprises the steps: divide a midamble into two parts, then detect the first part and the second part of the midamble; perform an auto-correlation property operation between the two parts an... | 05/11/2010 |
| 7680229 | Method of determining a synchronous phase A method of determining a synchronous phase includes receiving a correlation sequence, and selecting one or more correlated signals from the correlation sequence. Then, when the number of selected correlated signals is odd, the synchronous phase corresponding to a c... | 03/16/2010 |
| 7668275 | Frame synchronisation scheme with interference reduction A frame synchronization is proposed for a multi-band communication system, wherein a data signal exchanged between a transmitter and a receiver is organized in system frames having a preamble section which contains a frame synchronization section that is composed of... | 02/23/2010 |
| 7616724 | Method and apparatus for multi-modulation frame synchronization in a digital communication system A method and apparatus for frame synchronization in digital communication systems using multiple modulation formats perform a search for a differential frame alignment sequence (FAS) to frame-align the received digital stream and determine the polarity of the stream... | 11/10/2009 |
| 7570724 | Method of link word synchronization A method for word synchronization can be applied to asynchronous devices including SERDES devices connected across serial lines. A state transition methodology characterizes the state of the device based on control characters received consistently across the serial ... | 08/04/2009 |
| 7567639 | Method and apparatus for generating preamble sequence for adaptive antenna system in orthogonal frequency division multiple access communication system Disclosed is a method and an apparatus for generating a preamble sequence for an adaptive antenna system supporting a space division multiple access in an OFDMA communication system. Particularly, disclosed is a method for forming a preamble sequence identifying eac... | 07/28/2009 |
| 7561649 | Method and apparatus for synchronization mark detection with DC compensation A method and apparatus are disclosed for detecting a synchronization mark in a received signal. The received signal is processed to compensate for a DC bias in the received signal, such as subtracting an average of a block of received samples from each sample in the... | 07/14/2009 |
| 7558355 | Syncword detecting circuit and a baseband signal receiving circuit A predetermined syncword detecting circuit includes a matched-bit-number comparing circuit, a comparing-result-change detecting circuit, a detected-result storing circuit, a total number detecting circuit, and a syncword detecting circuit. The matched-bit-number com... | 07/07/2009 |
| 7483506 | Bit synchronization circuit with phase tracking function A bit synchronization circuit comprising an initial phase determining unit for rapidly determining, during a period of receiving a preamble of burst data, a clock with a phase synchronized with received burst data from among multi-phase clocks having the same freque... | 01/27/2009 |
| 7443939 | Methods of, and apparatus for, synchronizing a receiver with a received signal The invention provides a receiver that is capable of deducing the timing of a received signal having a frame structure and corresponding methods. Each frame contains a synchronization word. The receiver correlates the known synchronization word against the received ... | 10/28/2008 |
| 7434192 | Techniques for optimizing design of a hard intellectual property block for data transmission Techniques are provided for implementing channel alignment for a data transmission interface in an HIP block on a programmable logic integrated circuit. The HIP block channel alignment logic can be run using a reduced number of parallel data paths, which consumes su... | 10/07/2008 |
| 7430262 | Frame synchronization method and system A method and system for frame synchronization in a digital data transmission. A synchronization word is selected that is suitable for good correlation in a receiver detector. Either traffic bits or control bits are interleaved within the synchronization word in a pr... | 09/30/2008 |
| 7430196 | Transmission systems A receiver comprising a processor having an input to receive a sequence of transmission frames conforming to a transmission protocol to represent payload data, a memory arranged to store and to provide to the processor a transmissi... | 09/30/2008 |
| 7424079 | Receiving apparatus and synchronising method for a digital telecommunication system A receiving apparatus for receiving signals in a digital telecommunication system and a synchronizing method for synchronizing the receiving apparatus. The receiving apparatus includes a receiver for receiving a reference symbol having at least two repetition patter... | 09/09/2008 |
| 7424078 | Synchronous compensator adaptively defining an enable range for synchronous compensation In the synchronous compensator, a load generator loads a bit counter with data in dependence upon whether or not a detection signal from a UW detector falls within the range indicated by an enable signal from a synchronous compensator circuit, thereby excluding the ... | 09/09/2008 |
| 7415059 | Method and system for fast timing recovery for preamble based transmission systems Using a combination of auto-correlation and cross-correlation techniques provides a symbol timing recovery in a Wireless Local Area Network (WLAN) environment that is extremely robust to wireless channel impairments such as noise, multi-path and carrier frequency of... | 08/19/2008 |
| 7415002 | Circuit synchronization over asynchronous links A device that synchronizes circuits over asynchronous links is disclosed. Some embodiments of the invention include a device that comprises a plurality of circuits. One of the plurality of circuits is designated as a “master” circuit. The master circuit is confi... | 08/19/2008 |
| 7386082 | Method and related apparatus for searching the syncword of a next frame in an encoded digital signal A method and apparatus for searching the synchronization signal of a next frame in encoded digital signal without the need of referring to a frame length indication signal. The encoded digital signal contains a plurality of frames, wherein each frame may have varyin... | 06/10/2008 |
| 7382846 | Off-symbol correlation technique A method of correlating a signal to a synchronization pattern is disclosed. The signal has a waveform with frequency and phase angle components that may be varied, at each repeated signal pulse, to communicate a change in a bit pattern of the signal. A synchronizati... | 06/03/2008 |
| 7379519 | Preamble aided synchronization The repetitive structure of a preamble signal is exploited to enhance timing synchronization performance and frame start detection performance under adverse channel conditions. Received values are cross-correlated in time against a known noise-free version of the pr... | 05/27/2008 |
| 7376207 | Apparatus for receiving and recovering frequency shift keyed symbols A receiver architecture for receiving an FSK signal having a predetermined number of modulation levels includes a selectivity filter (206) for selectively passing a wanted channel and rejecting unwanted channels. The selectivity filter has a filter bandwidth ... | 05/20/2008 |
| 7372925 | Wireless LAN receiver with I and Q RF and baseband AGC loops and DC offset cancellation A wireless local area network receiver having separate automatic gain control (AGC) loops for providing a radio frequency AGC and a baseband frequency AGC, as well as a DC offset cancellation circuit. The AGC loops control a low noise amplifier amplifying the receiv... | 05/13/2008 |
| 7369780 | Remodulating channel selectors for WDM optical communication systems The present invention provides a remodulating channel selector for a wavelength division multiplexed optical communication system. The remodulating selector receives a WDM input signal, selects a particular optical channel from the WDM signal and places the informat... | 05/06/2008 |
| 7369600 | Burst communications apparatus and method using tapped delay lines A communications apparatus and method use tapped delay lines as multiplexers and demultiplexers. In one embodiment, a receiver (100) uses a tapped delay line (110) as a demultiplexer to acquire a burst communication at very high data rates in the range... | 05/06/2008 |
| 7366227 | Chip-to-symbol receiver despreader architectures and methods for despreading spread spectrum signals In a spread spectrum system, methods and despreader architectures for despreading the received spreaded codes with the use of a single correlator and a single correlation code is provided. Before despreading the incoming received spreaded codes, a single correlation... | 04/29/2008 |
| 7366224 | System and method for the detection of presence of a signal and its synchronization, for a frequency hopping system working in a disturbed environment A method and device are disclosed for the detection and synchronization of a signal in a frequency-hopping system. The method has a step, for each frequency F(1) . . . F(M), of selecting the K samples corresponding to the greatest values of the signal, and th... | 04/29/2008 |
| 7359376 | Serial compressed bus interface having a reduced pin count There is provided a serial compressed bus interface having a reduced pin count. The interface includes a serial-to-parallel converter having a single serial data input line adapted to receive time-division multiplexed serial data from a plurality of data sources. En... | 04/15/2008 |
| 7352834 | Code phase synchronization The invention relates to a method for synchronizing the phase of a code available at a receiving unit with the phase of a corresponding code of which samples are received at said receiving unit. The synchronization comprises comparing a received code sample with dif... | 04/01/2008 |