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"That’s an amazing invention, but who would ever want to use one of them?"
President Rutherford B. Hayes ; Said in 1876, after Alexander Graham Bell demonstrated the telephone to him at the White House
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| Number | Title | Issue Date |
| 8040992 | Method of transmitting time information with fixed latency The invention relates to a method of transmitting time information relating to the clock of the source of a sending part consisting in using a fixed latency indicator signal to authorize the source to insert time information used to slave the clock of the decoder of... | 10/18/2011 |
| 7558354 | Pilot symbols in communication systems This invention relates to signal processing in telecommunications, particularly but not exclusively for use in wireless TDMA systems. In particular, the invention concerns methods for use in communication systems making use of pilot symbols. The invention provides a... | 07/07/2009 |
| 7489755 | Method and apparatus for transmission and reception of data Various embodiments are described to provide for the transmission and reception of data in an improved manner. Data transmission is improved by including in a transmitter a null generator (110) to generate an output data symbol sequence that exhibits nulls in... | 02/10/2009 |
| 7382846 | Off-symbol correlation technique A method of correlating a signal to a synchronization pattern is disclosed. The signal has a waveform with frequency and phase angle components that may be varied, at each repeated signal pulse, to communicate a change in a bit pattern of the signal. A synchronizati... | 06/03/2008 |
| 7366270 | PLL/DLL dual loop data synchronization utilizing a granular FIFO fill level indicator A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. In particular, a system and method for dual loop data synchronization using a granular FIFO fill level indicator is provided. A dual loop data serializer includes a ... | 04/29/2008 |
| 7342946 | Device for processing data signals, method thereof, and device for multiplexing data signals In a device for processing data signals, a storing part stores an input signal and the data signals included in the input signal are extracted from the storing part and the data signals are output at a desired output speed. Then, the data signal is output based on s... | 03/11/2008 |
| 7292667 | Method and system for transmitting synchronization information with data A method for transmitting synchronization information with data, which data corresponds to a sequence of samples representative of a signal, includes detecting the occurrence of two consecutive equivalent samples and inserting a synchronization pattern for the secon... | 11/06/2007 |
| 7260657 | Serial data transferring apparatus A master unit sends a start signal to a slave unit. When receiving the start signal from the master unit, the slave unit sends, to the master unit, a synchronization field that is a data train (pulse signal) indicative of a transfer clock with which the slave unit i... | 08/21/2007 |
| 7239813 | Bit synchronization circuit and central terminal for PON systems A bit synchronization circuit composed of a multiphase data sampling unit for converting each received burst data sets to multiphase data trains, a phase determination unit for generating a control signal indicating an optimum phase data train, an output data select... | 07/03/2007 |
| 7218977 | Software and process for play-cursor calculation A process and software for achieving minimal latency in digital audio recording, which includes calculating a repeatable play cursor lead and a play cursor position and writing audio data at the play cursor position plus the play cursor lead. ... | 05/15/2007 |
| 7212599 | Jitter and wander reduction apparatus The present invention is for an apparatus that receives input data at a non-uniform first data rate carried by a system clock, and provides output data at a substantially uniform second data rate that is nominally equal to the first data rate and is also carried by ... | 05/01/2007 |
| 7194059 | Method and apparatus for skip-free retiming transmission of digital information A skip-free retiming system and method for transmission of digital information in a plesiochronous data communication system is described. The system is capable of supporting an unlimited number of retimers in serial data path between a first and a last node. The re... | 03/20/2007 |
| 7191354 | Method for synchronizing a first clock to a second clock, processing unit and synchronization system The invention relates to a method for synchronizing a first clock C to a reference clock A, the first clock C being connected to said reference clock A via a processing unit B. The invention moreover relates to a processing unit B and to a synchronization system. In... | 03/13/2007 |
| 7187654 | Rate-controlled optical burst switching A method and apparatus are provided for low latency loss-free burst switching. Burst schedules are initiated by controllers of bufferless core nodes and distributed to respective edge nodes. In a composite-star network, the burst schedules are initiated by any of a ... | 03/06/2007 |
| 7173995 | Systems and methods for correcting gain error due to transition density variation in clock recovery systems In one embodiment, the present invention is directed to a system for processing a data stream. The system comprises: a voltage controlled oscillator (VCO) that generates a VCO signal in response to a tuning signal; a phase detector that generates an error signal tha... | 02/06/2007 |
| 7103128 | Data synchronization circuit and communication interface circuit There is provided a data synchronization circuit for synchronizing a (n+1) (n: natural number) bit bus data synchronous with a first clock with a second clock, comprising: a first circuit for holding the bus data which is synchronous with the first clock and is inpu... | 09/05/2006 |
| 7088795 | Ultra wide band base band receiver The present invention is a receiver having a radio frequency (RF) front end, a pulse detector operatively coupled to the RF front end, and a data recovery unit operatively coupled to the pulse detector. The data recovery unit is configured to receive spread spectrum... | 08/08/2006 |
| 7075951 | Method and apparatus for the operation of a storage unit in a network element In an embodiment, an apparatus includes a storage unit to store data from a data signal. The apparatus also includes control circuitry coupled to the storage unit. The control circuitry is to cause the storage of the data from the data signal into the storage unit a... | 07/11/2006 |
| 7068679 | Asynchronous payload mapping using direct phase transfer The present invention involves the passing of clock information from a point where a tributary payload is mapped into a carrier to a point where a tributary payload is de-mapped from the carrier. A synchronization signal is generated at the mapping end. Rather than ... | 06/27/2006 |
| 7065132 | Memory-free retimer A method of transmitting digital signals which are passed via a communication system by means of a retimer between an input and an output, whereby according to the invention the data packet applied to the input is scanned with respect to the individual bits and with... | 06/20/2006 |
| 7058073 | Arrangement and method for transmitting data over a TDM bus The invention relates to a TDM backplane bus system, in which a Frame Synchronisation signal is developed from an external communication signal, a data clock signal is produced from a free running clock oscillator independent of the FS signal, to select the frequenc... | 06/06/2006 |
| 7054851 | Communication data format for use in data storage and retrieval A communication system and data format extracts required object data from a database and updates the database with amended or new object data and associated data relationships following optional modification of the object data by an external system. A communication ... | 05/30/2006 |
| 7046696 | Multiplexing high priority, low bandwidth information on a traditional link protocol A method and system for multiplexing high priority, low bandwidth information into a link carrying message passing information. The information is multiplexed in a way that keeps the two information streams and their associated hardware largely independent, but allo... | 05/16/2006 |
| 7042908 | Method and apparatus for transmitting arbitrary electrical signals over a data network The present invention relates to a method and apparatus for transmitting an electrical digital signal of arbitrary transmission rate over a data network characterized by a range of allowable transmission rates, where the data network may be synchronous or asynchrono... | 05/09/2006 |
| 7039145 | Control loop apparatus and method therefor In the field of optical communications, the need to remove jitter from a Synchronous Digital Hierarchy (SDH) or Synchronous Optical NETwork (SONET) datastream is recognized. Consequently, the present invention provides a First-In-First-Out (FIFO) buffer having a rea... | 05/02/2006 |
| 7035246 | Maintaining a global time reference among a group of networked devices Synchronization is maintained among a plurality of network devices having local clocks that participate in a network. A first packet is broadcast from a first network device to other network devices that participate in the network. The first packet includes a global... | 04/25/2006 |
| 7031348 | Apparatus and method of splicing digital video streams A splicing system includes a splicer for seamlessly splicing togther digitally encoded data streams. In a preferred embodiment, the splicer preferably parses successive splice buffers of data stream data for a splice-out point and a splice-in point, closing an initi... | 04/18/2006 |
| 7031294 | Baseband wireless network for isochronous communication A wireless communication network system apparatus which provides for isochronous data transfer between node devices of the network, which provides at least one master node device which manages the data transmission between the other node devices of the network, whic... | 04/18/2006 |
| 7023833 | Baseband wireless network for isochronous communication A wireless communication network system apparatus which provides for isochronous data transfer between node devices of the network, which provides at least one master node device which manages the data transmission between the other node devices of the network, whic... | 04/04/2006 |
| 7020217 | Satellite digital audio radio receiver with instant replay capability A receiver adapted to receive a transmitted signal and provide a replay capability in response thereto. The inventive receiver includes the medium (electronic or physical) for storing at least a portion of the received signal. In accordance with present teachings, t... | 03/28/2006 |
| 7015733 | Spread-spectrum clock generator using processing in the bitstream domain A spread-spectrum phase-locked loop clock generator includes a PLL circuit, a modulation generator, a bit stream processor and a multiplexer. The modulation generator outputs a bitstream in response to an input signal and a control signal. The bitstream processor ge... | 03/21/2006 |
| 7006040 | Steerable antenna and receiver interface for terrestrial broadcast Antennas with steerable antenna patterns and techniques for using such antennas are described. In accordance with the invention, antenna patterns with one or more NULLs are used. Through the use of digital control signals the antenna pattern is steered so that a sou... | 02/28/2006 |
| 7006587 | Preamble aided synchronization The repetitive structure of a preamble signal is exploited to enhance timing synchronization performance and frame start detection performance under adverse channel conditions. Received values are cross-correlated in time against a known noise-free version of the pr... | 02/28/2006 |
| 7006149 | Video signal control circuit The delay circuit composed of plural flip-flops converts an input data into plural data 110-0˜110-n having delays of 1˜n clocks, which are inputted to the selector of the selector circuit. The counter counts the pixel number per one lin... | 02/28/2006 |
| 6987817 | Digital clock recovery PLL An apparatus comprising an analog circuit and a digital circuit. The analog circuit may be configured to generate a plurality of samples of an input signal in response to a plurality of phases of a reference clock. The digital circuit may be configured to (i) measur... | 01/17/2006 |
| 6985550 | Jitter control processor and a transceiver employing the same The present invention provides a transceiver couplable to a communications network having a jitter control processor and methods of operating the same. In one aspect of the present invention, the jitter control processor of the transceiver includes a transmitter sta... | 01/10/2006 |
| 6980616 | Transmission method and device A transmission method uses multiple kinds of control codes to be exchanged on a serial transmission path between a sender side and a receiver side, and each of the multiple kinds of control codes has bits smaller in number than a predetermined fixed length. The tran... | 12/27/2005 |
| 6977975 | Digital clock recovery PPL An apparatus comprising an analog circuit, a first digital circuit, and a second digital circuit. The analog circuit may be configured to generate a plurality of samples of an input signal in response to a plurality of phases of a reference clock. The first digital ... | 12/20/2005 |
| 6975652 | Clock synchronization of HFC telephone equipment A method and system for synchronizing two clocks of a first and second device. Successive synchronization messages are sent from the first device to the second device. Each synchronization message has a timestamp. Each message is received at the second device and th... | 12/13/2005 |
| 6957246 | Buffer status in an asymmetrical gap environment A method for determining a status of a buffer for use in converting between a standard SONET and a non-standard SONET frame is presented. The method determines the buffer's almost empty or almost full status based on a length of a transport gap of the non-standard S... | 10/18/2005 |
