Quotables
"I watched his countenance closely, to see if he was not deranged ... and I was assured by other senators after he left the room that they had no confidence in it."
U.S. Senator Smith of Indiana ; After seeing Samuel Morse demonstrate the telegraph.
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| Number | Title | Issue Date |
| 8054929 | System and method for auto-squelching digital communications A system and method are provided for auto-squelching digital communications. The method receives digital information from a source node. If the receive channel is corrupted, an alarm condition is detected that is associated with the received digital information. The... | 11/08/2011 |
| 8040991 | Method and apparatus for synchronizing multimedia data stream A method and an apparatus for synchronizing a data stream are disclosed. The method comprises: decoding the data stream to generate a decoded data stream and program clock references; generating a local clock reference; generating a simulated clock reference accordi... | 10/18/2011 |
| 8031822 | Communication apparatus In a single-wire data communication characterized in that a data communication unit time is different in accordance with the polarity of a signal, a communication control time is dependent on a communication data pattern, and hence, the control of the whole system i... | 10/04/2011 |
| 7986758 | Synchronization detection using bandwidth and antenna configuration User Equipment in a wireless communication network considers the downlink channel bandwidth in setting out of synchronization (OoS) and in synchronization (IS) thresholds and filter durations. Additionally, the UE may consider transmitter antenna configuration—tha... | 07/26/2011 |
| 7916820 | Systems and arrangements for clock and data recovery in communications A dual mode clock and data recovery (CDR) system is disclosed. A fast locking, oversampling CDR acquisition module can begin the process to quickly create a data acquisition clock signal in start up data acquisition conditions. When at least some data can be extract... | 03/29/2011 |
| 7787578 | Method and apparatus for synchronizing multimedia data stream A method and an apparatus for synchronizing a data stream are disclosed. The method includes: decoding the data stream to generate a decoded data stream and program clock references; generating a local clock reference; generating a simulated clock reference accordin... | 08/31/2010 |
| 7773711 | Method and system for detecting transmitted data signal quality and integrity The invention relates to a method and system for use in assessing the quality and integrity of a data transmission path or link between a data transmitting location and at least one receiving location at which a broadcast data receiver is located with means to allow... | 08/10/2010 |
| 7729463 | Host processor assisted fast re-synchronization techniques for DVB-H systems A system and method of performing re-synchronization for a Digital Video Broadcasting over Handheld (DVB-H) receiver, wherein the method comprises performing a time division multiplexing (TDM) data burst transmission sequence on bits of data received by the DVB-H re... | 06/01/2010 |
| 7729462 | Fast re-synchronization techniques for DVB-H systems A system and method of performing re-synchronization for a Digital Video Broadcasting over Handheld (DVB-H) receiver comprises performing a time division multiplexing (TDM) data burst transmission sequence on bits of data received by the DVB-H receiver; performing a... | 06/01/2010 |
| 7643596 | Method and device for synchronizing a mobile radio receiver with a base station involving parallel verification In a method for synchronization of a mobile radio receiver to a base station, in which a verification step or a plurality of verification steps is or are also carried out in addition to the synchronization steps and one or more identification step or steps which may... | 01/05/2010 |
| 7609797 | Circuit, system, and method for preventing a communication system absent a dedicated clocking master from producing a clocking frequency outside an acceptable range A communication system, clock recovery circuit, and method are provided for allowing data to be transmitted across a communication system and between clock recovery circuits absent a clock master specifically designed for one node of the communication system. Absent... | 10/27/2009 |
| 7602872 | Scheduling apparatus and method in a multicarrier communication system In multicarrier communication system using N subcarriers, in which a transmitter communicates with K receivers, the transmitter determines a channel quality information (CQI) feedback quantity indicative of the number of subcarriers for which CQIs will be fed back a... | 10/13/2009 |
| 7463708 | System and method for synchronization signal detection and recovery from false triggers A system and method for detecting a synchronization (sync) signal in a communication signal are disclosed. A received communication signal is stored in a memory and portions thereof are read from the memory and monitored to detect the sync signal. When a detected sy... | 12/09/2008 |
| 7436918 | Output stage synchronization Systems and methods for transferring data across clock domains in a manner that avoids metastability of the data and is very tolerant of variations in the clock signals of the different clock domains. One embodiment of the invention comprises a mechanism for passing... | 10/14/2008 |
| 7430252 | Apparatus and method for WGIO phase modulation An apparatus and method for WGIO phase modulation are described. In one embodiment, the method includes the receipt of a high-speed data stream, encoded according to an 8b/10b code. Once received, a symbol rate of the data stream is reduced by a predet... | 09/30/2008 |
| 7418036 | Method and circuit for timing pulse generation In a method and a circuit for timing pulse generation, a frame pulse of a corresponding system is masked when an alarm signal of either a working system or a protection system is received, a monitoring window which indicates an absorbable range of delay time differe... | 08/26/2008 |
| 7408916 | Synchronisation of frame transmissions in a telecommunications network The invention concerns a method for synchronising clocks of base transceiver stations in a telecommunications system and a mobile communications system. According to the invention, in either some or in all base station sites of the telecommunications network a locat... | 08/05/2008 |
| 7409023 | Method and apparatus for effecting synchronous pulse generation for use in serial communications A method for effecting synchronous pulse generation for use in serial communications is provided. The method includes the steps of generating a difference signal representing a signal level difference between at least two data stream signals; providing a clock signa... | 08/05/2008 |
| 7397875 | Method of synchronising data A method of synchronizing data in a communications system includes generating a composite signal comprising a serial stream of data partitioned in one or more frames, and transmitting the composite signal to a receiver. Multiphase clock signals are generated. The co... | 07/08/2008 |
| 7394857 | Flexible versatile low-cost wireline transmit driver A versatile, programmable, low-cost transmit line driver is provided. The line driver includes a digital-to-analog converter that receives a digital input and provides an analog output. The line driver is reconfigurable between the voltage mode of operation. ... | 07/01/2008 |
| 7366935 | High speed bus with alignment, re-timing and buffer underflow/overflow detection enhancements In a networked system in which high speed busses interconnect sources and destinations of data, systems for and methods of data alignment, data re-timing, and circular buffer underflow/overflow detection, are described. ... | 04/29/2008 |
| 7359468 | Apparatus for synchronizing clock and data between two domains having unknown but coherent phase A data synchronizer is provided for synchronizing data across two different clock domains in a manner that avoids additive jitter. The data synchronizer includes a synchronizer inputting a sampling clock and a data clock, and outputting an edge pulse. A synchronizer... | 04/15/2008 |
| 7353417 | Microcontroller with synchronised analog to digital converter A microcontroller is provided, which includes a control unit (UC), at least one digital to analog converter (DAC) as a peripheral of the said control unit, and a buffer register located between the said control unit and the said converter, receiving data and a first... | 04/01/2008 |
| 7352834 | Code phase synchronization The invention relates to a method for synchronizing the phase of a code available at a receiving unit with the phase of a corresponding code of which samples are received at said receiving unit. The synchronization comprises comparing a received code sample with dif... | 04/01/2008 |
| 7349486 | System and method for recognizing zero-amplitude symbols in a QAM signal and digital receiver incorporating the same A system for, and method of, recognizing zero-amplitude symbols in a quadrature amplitude modulated (QAM) signal and a digital receiver incorporating the system or the method. In one embodiment, the system includes: (1) an amplitude detector that extracts a candidat... | 03/25/2008 |
| 7349960 | Throttling distributed statistical data retrieval in a network device The present invention provides a method and apparatus for managing distributed statistical data retrieval in a network device. Periodically, statistical data is gathered by processes on one or more remote cards in a network device and transferred to a central proces... | 03/25/2008 |
| 7343541 | Data integrity in protocol offloading A method for data verification is provided. An input block of data is received together with a modulo-based input error detection code associated with the input block, the input block comprising a plurality of sub-blocks. A subset of the sub-blocks is selected to be... | 03/11/2008 |
| 7343528 | Method and apparatus for detecting and recovering from errors in a source synchronous bus A method and apparatus for detecting and in some cases recovering from errors in a source synchronous bus. One embodiment of a disclosed apparatus includes a plurality of strobe inputs to receive a plurality of strobe signals. A plurality of data inputs receive a pl... | 03/11/2008 |
| 7342946 | Device for processing data signals, method thereof, and device for multiplexing data signals In a device for processing data signals, a storing part stores an input signal and the data signals included in the input signal are extracted from the storing part and the data signals are output at a desired output speed. Then, the data signal is output based on s... | 03/11/2008 |
| 7333468 | Digital phase locked loops for packet stream rate matching and restamping A packet stream multiplexer may include one or more control loops (e.g., digital phase locked loops) for tracking the source clock frequency associated with a packet stream. A first control loop may slowly drive an error between a received timestamp and an estimated... | 02/19/2008 |
| 7320094 | Retraining derived clock receivers Systems and methods of retraining a receiver provide for determining a minimum transition density for a derived clock data link to the receiver. A retraining flit is generated based on the minimum transition density. In one approach, the retraining flit is generated... | 01/15/2008 |
| 7315599 | Skew correction circuit A skew correction circuit includes a first circuit and a second circuit. The first circuit generates at least one pulse train signal in response to a data bit signal and a first strobe signal. A duty cycle of the pulse train signal is indicative of a degree of skew ... | 01/01/2008 |
| 7315594 | Clock data recovering system with external early/late input The invention is directed to a clock data recovery system for resampling a clock signal to an incoming data signal. The clock data recovery system comprises a clock generator for generating the clock signal and a phase adjustment unit for generating sampling phases ... | 01/01/2008 |
| 7313202 | Asynchronous serial data receiver for packet transfer A receiver provides a differential signal of first and second signals as received serial data. A tracking circuit receives the received serial data and a clock signal to generate a synchronous clock signal based on the clock signal by tracking the received serial da... | 12/25/2007 |
| 7313163 | Fast synchronization for half duplex digital communications Half duplex, Frequency Hopped-Spread Spectrum wireless transceivers (102), operating without a central controller, maintain time synchronization with the frequency hopping sequence for a period after transmission of a half duplex signal ceases. The wireless t... | 12/25/2007 |
| 7313210 | System and method for establishing a known timing relationship between two clock signals A system and method for establishing a known timing relationship between two clock signals, wherein a first clock signal is operable to clock data transfer operations from a transmitter domain to a receiver domain and a second clock signal is operable to be transpor... | 12/25/2007 |
| 7301986 | Frequency hopping system for intermittent transmission A radio transmission system including many radio transmitters using frequency hopping carriers to intermittently transmit very short messages indicative of status of stimuli associated with the transmitters. The transmitters transmit transmissions independently of a... | 11/27/2007 |
| 7295644 | Apparatus for clock data recovery Circuits, architectures, a system and methods for clock data recovery. The circuit generally includes (a) a clock phase adjustment circuit, receiving clock phase information and providing a clock phase adjustment signal, (b) a clock frequency adjustment circuit, rec... | 11/13/2007 |
| 7296170 | Clock controller with clock source fail-safe logic A microcontroller integrated circuit with a clock controller and a processor automatically switches the source of the clock signal that clocks the processor from a failed fast external precision oscillator to a slow internal backup oscillator, then enables a fast in... | 11/13/2007 |
| 7295643 | Method and a device for phase and frequency comparison The phase and frequency comparator for controlling, as a function of the frequency (Fref) and the phase of a reference signal (Sref), the frequency (Fvco) and the phase of the output signal of a controlled-frequency oscillator compri... | 11/13/2007 |
