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...that the first rickshaw was invented in 1869 by an American Baptist minister, the Rev. E. Jonathan Scobie, to transport his invalid wife around the streets of Yokohama?
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| Number | Title | Issue Date |
| 8111720 | Method and apparatus to indicate maximum scheduling delay for jitter buffer implementations In VoIP systems, there is a tradeoff between reducing number of lost packets and end-to-end delay when dealing with jitters. Increasing the jitter buffer space on a mobile wireless terminal reduces the likelihood of lost packets but increases the end-to-end delay. D... | 02/07/2012 |
| 8068516 | Method and system for exchanging media and data between multiple clients and a central entity The invention provides a system and a method for synchronizing cable modems, the method includes the stages of: (i) generating, at a media access control entity, synchronization messages; and (ii) updating the synchronization messages to provide updated synchronizat... | 11/29/2011 |
| 8014425 | Multiple access techniques for a wireless communiation medium A multiple access technique for a wireless communication system establishes separate channels by defining different time intervals for different channels. In a transmitted reference system different delay periods may be defined between transmitted reference pulses a... | 09/06/2011 |
| 8000353 | Delay variation buffer control technique A delay variation buffer controller allowing proper cell delay variation control reflecting an actual network operation status is disclosed. A detector detects an empty status of the data buffer when data is read out from the data buffer at intervals of a controllab... | 08/16/2011 |
| 7804858 | Vehicle communication system A transmission ECU on a transmission side and reception ECUs on a reception side are connected through communication lines and junction connectors. A delay circuit is provided in each of the junction connectors on the side of the reception ECUs. One end of the delay... | 09/28/2010 |
| 7773637 | Signal transmitting method and apparatus using length division multiple access A method and apparatus for simplifying a structure needed to delay data in delay units when a reference signal and data are transmitted by using chaotic signals are provided. The method includes delaying data by at least two delay times, wherein each of the delay ti... | 08/10/2010 |
| 7773638 | Transmission device and home server system A transmission device which selects all or a part of streams from among input streams and then transmits the selected streams, and includes a measuring section and an output control signal generating section. The measuring section inputs an output timing reference s... | 08/10/2010 |
| 7751449 | Method and system for simulation multimedia packet loss and jitter A Packet Loss and Jitter Simulator processes RTP packets coming through the MTA. Based on user input commands, the simulator drops or delays insertion of packets into the DSP portion of the MTA. Various modes that may be programmed include, but are not limited to, m... | 07/06/2010 |
| 7551649 | Transmitting packets of data Data packet transmission involves transmitting a first data packet from a first station over a network to create a first transmission with the intention of the first transmission being received at a second station. Said first data packet is retransmitted from the fi... | 06/23/2009 |
| 7519087 | Frequency multiply circuit using SMD, with arbitrary multiplication factor Disclosed is a frequency multiply circuit for outputting an output signal obtained by variably multiplying the frequency of an input signal includes a synchronous delay circuit, a multiplexing circuit, and a control circuit. The synchronous delay circuit includes a ... | 04/14/2009 |
| 7457323 | Demultiplexer circuit A demultiplexer circuit includes a first serial-to-parallel conversion circuit for receiving input serial data and for performing serial-to-parallel conversion to output resultant data to parallel paths, a code detection circuit for activating and outputting a detec... | 11/25/2008 |
| 7443889 | Network or service management system for determining the synchronization between two streams of packets A network management system for determining the synchronization between two streams of packets transmitted in a transport network measures throughput variations for each of the streams of packets and determines the synchronization by comparing the variations. ... | 10/28/2008 |
| 7428286 | Duty cycle correction apparatus and method for use in a semiconductor memory device The present invention is directed to a duty cycle correction apparatus that can be implemented in a small size, and is capable of performing a phase lock more rapidly, and reducing the amount of current being consumed, and to a method thereof. The duty cycle correct... | 09/23/2008 |
| 7426221 | Pitch invariant synchronization of audio playout rates A method for adjusting audio playback is disclosed. The method includes storing audio packets in a jitter buffer, and playing out the audio packets at a first rate. The method further includes determining that a capacity parameter for the jitter buffer is out of com... | 09/16/2008 |
| 7424026 | Method and apparatus providing continuous adaptive control of voice packet buffer at receiver terminal Disclosed is a device, a computer program and a method to receive and buffer data packets that contain information that is representative of time-ordered content, such as a voice signal, that is intended to be presented to a person in a substantially continuous and ... | 09/09/2008 |
| 7406105 | System and method for sharing a common communication channel between multiple systems of implantable medical devices A system and method that facilitates multiple systems of communicating devices, i.e., a master device and one or more implantable slave devices, to coexist on a common, e.g., RF, communication channel having a limited temporal bandwidth while maintaining the require... | 07/29/2008 |
| 7386008 | Method and apparatus for converting data packets between a higher bandwidth network and a lower bandwidth network having multiple channels A method and apparatus for converting packetized data received from a broadband network to a multi-channel payload network having a narrower bandwidth is disclosed. The method includes converting a packet received from the broadband network to a serial stream having... | 06/10/2008 |
| 7379477 | Apparatus and method for efficiently transmitting broadcasting channel utilizing cyclic delay diversity Disclosed are an apparatus and a method for efficiently transmitting a broadcasting channel by means of cyclic delay diversity in an OFDM mobile communication system. The method comprises the steps of setting each transmitter to have different delay values, the tran... | 05/27/2008 |
| 7376102 | Erased frame and idle frame suppression in a wireless communications system A method of reducing loading on backhaul communications links in a wireless communications system suppresses a portion of the upward flow of frame information for idle and/or erased frames in certain situations, such as when multiple ones of such frames are successi... | 05/20/2008 |
| 7376148 | Method and apparatus for improving voice quality in a packet based network Some embodiments adaptively adjust to the current call load in a packet based virtual circuit to minimize the delay experienced by the first packets of any talk spurt for a particular active call. Some embodiments minimize the jitter introduced by multiplexing voice... | 05/20/2008 |
| 7372380 | Data transmitting/receiving device The first data transmitting/receiving device according to the present invention includes: a serial-parallel conversion circuit for converting received first serial data to first parallel data; a data selection circuit for selecting any one of the first parallel data... | 05/13/2008 |
| 7373575 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated ... | 05/13/2008 |
| 7369635 | Rapid discrimination preambles and methods for using the same A system, method and program are disclosed for achieving rapid bit synchronization in low power medical device systems. Messages are transmitted via telemetry between a medical device and a communication device. The synchronization scheme uses a portion of a unique ... | 05/06/2008 |
| 7369622 | Diversity circuit demodulating OFDM-method signals and diversity receiving apparatus having said diversity circuit therein In a receiving apparatus, two respective reference-point computing units in respective diversity branches calculate reference points on a constellation, and two respective reference-point specifying units in the two diversity branches select respectively the referen... | 05/06/2008 |
| 7366270 | PLL/DLL dual loop data synchronization utilizing a granular FIFO fill level indicator A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. In particular, a system and method for dual loop data synchronization using a granular FIFO fill level indicator is provided. A dual loop data serializer includes a ... | 04/29/2008 |
| 7366224 | System and method for the detection of presence of a signal and its synchronization, for a frequency hopping system working in a disturbed environment A method and device are disclosed for the detection and synchronization of a signal in a frequency-hopping system. The method has a step, for each frequency F(1) . . . F(M), of selecting the K samples corresponding to the greatest values of the signal, and th... | 04/29/2008 |
| 7359379 | Managing data in a subtended switch A technique for provisioning cross-connects in network switching environment includes receiving a portion of the an input data stream including having header data and the payload data, the payload data occurring at a first offset relative to the header data and gene... | 04/15/2008 |
| 7353284 | Synchronized transmission of audio and video data from a computer to a client via an interface A method for controlling data transmission between a computer and a video client via an interface, the method comprising: the computer polling the interface a first time to determine the size of the buffer on the interface; receiving a first buffer size value from t... | 04/01/2008 |
| 7353420 | Circuit and method for generating programmable clock signals with minimum skew A programmable clock deskewer generates an output clock with minimal clock skew. This is accomplished by means of a single series path coupling the input clock to the output clock. The programmable clock deskewer includes: an output clock generator, responsive to th... | 04/01/2008 |
| 7349510 | Apparatus for data recovery in a synchronous chip-to-chip system An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing refe... | 03/25/2008 |
| 7349408 | Method and apparatus for handling out of inverse multiplexing for asynchronous transfer mode frame error conditions Methods and apparatus are disclosed for handling transient anomalies in a communications or computer device or system, such an inverse multiplexing for ATM (“IMA”) device. Such transient anomalies may include out of IMA frame (“OIF”) anomalies. In one implem... | 03/25/2008 |
| 7339936 | Switching device for telecommunication networks A switching device for telecommunication networks, which comprises I/O ports, arranged by groups in I/O cards, for inputting incoming data streams and outputting outgoing data streams of arbitrary protocols, a switching fabric SF for handling internal data streams, ... | 03/04/2008 |
| 7336106 | Phase detector and method having hysteresis characteristics A phase detector generates a first output signal if a feedback clock signal leads a reference clock signal by more than a first time. The phase detector generates a second output signal if the feedback clock signal lags the reference clock signal by more than a seco... | 02/26/2008 |
| 7333519 | Method of manually fine tuning audio synchronization of a home network A method is provided for manually synchronizing the playback of a digital audio broadcast on a plurality of network output devices. The method is applicable for use with methods such as those that use a time code, insert a control track pulse, or use an audio wavefo... | 02/19/2008 |
| 7333580 | Pipelined parallel processing of feedback loops in a digital circuit Digital circuits and methods for designing digital circuits are presented. In an embodiment, a number of bits (B) of a bit-stream to be processed in parallel by a digital circuit is selected. A clocking rate (C) is selected for the digital circuit such that a produc... | 02/19/2008 |
| 7327173 | Delay-locked loop having a pre-shift phase detector A clock generator for generating an output clock signal synchronized with an input clock signal having first and second adjustable delay lines. The first adjustable delay lines is adjusted following initialization of the clock generator to expedite obtaining a lock ... | 02/05/2008 |
| 7324562 | Method and apparatus for introducing differential delay between virtually concatenated tributaries In one embodiment, the invention is an apparatus for testing differential delay correction of network elements using virtual concatenation. The apparatus includes a first PRBS (pseudo-random bit stream) generator dedicated to a first tributary. The apparatus also in... | 01/29/2008 |
| 7321403 | Video signal transmitting/receiving system In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediate... | 01/22/2008 |
| 7321612 | Bit stream conditioning circuit having adjustable PLL bandwidth A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit stream interface includes a line side interface, a board side... | 01/22/2008 |
| 7317769 | Bit stream conditioning circuit having adjustable input sensitivity A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit stream interface includes a line side interface, a board side... | 01/08/2008 |
