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Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
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| Number | Title | Issue Date |
| 7929576 | Method and system for accommodating different clock frequencies in an ethernet passive optical network One embodiment of the present invention provides a system that accommodates different clock frequencies in an EPON. The system receives a signal from the OLT at the ONU and derives an OLT clock. The system also maintains a local clock. The system further receives fr... | 04/19/2011 |
| 7889765 | Apparatus and methods for utilizing variable rate program streams in a network Apparatus and methods for transparently using otherwise wasted bandwidth associated with variable-rate program streams to deliver additional content. In one embodiment, the network comprises a broadcast switched architecture (BSA), and the program streams are loaded... | 02/15/2011 |
| 7881345 | Method of symbol timing synchronization in communication systems Symbol timing synchronization in OFDM communication systems where multiple wireless terminals communicate with a single base station is described. Base station transmitter and receiver symbol timing is fixed. Each wireless terminal operates to independently adjust i... | 02/01/2011 |
| 7830924 | Stuffing and destuffing operations when mapping low-order client signals into high-order transmission frames A unit timing signal synchronized with a high-order transmission frame is used for measuring a difference between the number of data pieces of a client signal mapped to the high-frequency frame and the number of data pieces of the output client signal by integrating... | 11/09/2010 |
| 7826491 | Synchronization of distributed cable modem network components A distributed Cable Modem Termination System (CMTS) includes a head end, a downstream transmitter hub, and a plurality of cable modems that all establish frequency lock with a common frequency reference. The head end transmits a plurality of time stamps from the hea... | 11/02/2010 |
| 7751448 | Method of symbol timing synchronization in communication systems Symbol timing synchronization in OFDM communication systems where multiple wireless terminals communicate with a single base station is described. Base station transmitter and receiver symbol timing is fixed. Each wireless terminal operates to independently adjust i... | 07/06/2010 |
| 7715443 | Boundary processing between a synchronous network and a plesiochronous network The techniques described herein allow a more efficient transmuxing operation for transferring data from a synchronous domain (e.g., SONET) to a plesiochronous (e.g., PDH) domain as compared to the prior art, in which extraction of data streams, jitter filtering and ... | 05/11/2010 |
| 7684444 | Communication system and method for minimum burst duration A system and method for providing a minimum burst duration in accordance with a regional standard and/or requirement. One embodiment comprises a first interface (204) configured to receive data to be communicated, a memory (208) configured to store a v... | 03/23/2010 |
| 7602814 | Systems and methods for mapping and multiplexing wider clock tolerance signals in optical transport network transponders and multiplexers The present invention provides systems and methods for mapping and multiplexing wider clock tolerance signals in Optical Transport Network (OTN) transponders and multiplexers. In one exemplary embodiment, the present invention allows wide tolerance signals, such as ... | 10/13/2009 |
| 7499472 | Jitter buffer management A sample jitter buffer manager more or less aggressively conserves (rations) or discards data in a jitter buffer, based on the fluctuating amount of data in the jitter buffer. The jitter buffer manager counts, provides, discards and/or otherwise manages individual s... | 03/03/2009 |
| 7453911 | Method and device for controlling stuffing A method and device for controlling the phase of successively transmitted frames, in which data symbols are transmitted at a constant symbol frequency, in which a phase difference between the clock of the frame transmission and a data clock is determined and, depend... | 11/18/2008 |
| 7440533 | Modulated jitter attenuation filter A system and modulation method are provided for reducing jitter in the mapping of information into Synchronous Payload Envelopes (SPEs), in a data tributary mapping system. The method comprises buffering data from a plurality of tributaries, and generating buffer-fi... | 10/21/2008 |
| 7421048 | System and method for multimedia delivery in a wireless environment A multimedia processing system and method thereof are provided. The system and method provide for synchronizing a first clock of a multimedia decoder of a first multimedia processing device to a second clock of a multimedia encoder of a second multimedia processing ... | 09/02/2008 |
| 7406102 | Multi-mode method and apparatus for performing digital modulation and demodulation A method of multi-mode communications includes receiving signals from multiple sources at a plurality of sample buffers, referencing the plurality of sample buffers for a first source at one time and referencing the plurality of sample buffers for a second source at... | 07/29/2008 |
| 7386008 | Method and apparatus for converting data packets between a higher bandwidth network and a lower bandwidth network having multiple channels A method and apparatus for converting packetized data received from a broadband network to a multi-channel payload network having a narrower bandwidth is disclosed. The method includes converting a packet received from the broadband network to a serial stream having... | 06/10/2008 |
| 7372862 | Rate adaption within a TDM switch using bit stuffing The present invention discloses a method and an arrangement providing transmission of data through a node, e.g. a switch, having different input and output line interfaces in a wide range of data speed, without introducing any loss of bits, but still maintaining the... | 05/13/2008 |
| 7372864 | Reassembly of data fragments in fixed size buffers A reassembly and/or a segmentation function is spread across (i.e. partially performed in) each of two (or more) network processors, with use of buffers in a storage device to temporarily buffer data that is received in one or more ingress data units. In using the b... | 05/13/2008 |
| 7366207 | High speed elastic buffer with clock jitter tolerant design A receiver for high-speed indirect synchronous digital data transmission includes an elastic buffer receiving an incoming data stream containing embedded timing information preceding a data sequence, generating a recovered clock from the timing information, initiall... | 04/29/2008 |
| 7366803 | Integrated circuit for buffering data by removing idle blocks to create a modified data stream when memory device is not near empty A circuit for buffering data is disclosed. The circuit comprises a first circuit which is coupled to receive a stream of data blocks using a first clock signal. The first circuit removes data blocks, such as idle data blocks or a sequence ordered set of a pair of co... | 04/29/2008 |
| 7366270 | PLL/DLL dual loop data synchronization utilizing a granular FIFO fill level indicator A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. In particular, a system and method for dual loop data synchronization using a granular FIFO fill level indicator is provided. A dual loop data serializer includes a ... | 04/29/2008 |
| 7362778 | Plesiochronous demultiplexer A desynchronizer for extracting and desynchronizing a tributary signal from a multiplex signal at its original data rate has a buffer memory for temporarily storing tributary data bits extracted from the multiplex signal, an adjustable oscillator for generating a re... | 04/22/2008 |
| 7362761 | Packet processing apparatus A packet processing apparatus that realizes improved overall relaying performance by distributing input packets to multiple packet analyzing modules for information processing is disclosed. The packet processing apparatus includes a distributor for assigning a seque... | 04/22/2008 |
| 7362740 | Arrangement with a number of units that can communicate with each other via a wireless connection system and a method for use with such a system An arrangement comprises a number of units that can communicate with each other via at least one wireless connection system for the transmission of messages. The connection system works with first and second reception areas. A time slot system is established in a fi... | 04/22/2008 |
| 7353288 | SONET/SDH payload re-mapping and cross-connect Multiple frames of SDH framed data are received. Each frame has an overhead portion and a payload portion. The payload portions of multiple frames are identified and extracted. These payloads are switched and re-mapped to a different STM structure as required. ... | 04/01/2008 |
| 7349450 | Multi-stage high speed bit stream demultiplexer chip set having switchable master/slave relationship A bit stream demultiplexer that couples a high-speed bit stream media to a communication Application Specific Integrated Circuit (ASIC). The bit stream multiplexer performs its demultiplexing function staged within at least two integrated circuits. The first Integra... | 03/25/2008 |
| 7333571 | Reduced complexity coding system using iterative decoding A concatenated coding scheme, using an outer coder, interleaver, and the inner coder inherent in an FQPSK signal to form a coded FQPSK signal. The inner coder is modified to enable interactive decoding of the outer code. ... | 02/19/2008 |
| 7327758 | Method of generating, transmitting, receiving and recovering synchronous frames with non-standard speeds To better utilize the variable bandwidth of wireless links, a network node in accordance with the present invention escapes rigid bandwidth hierarchy of conventional TDM protocols, which is not suited for fully using the available bandwidth of a wireless link. Speci... | 02/05/2008 |
| 7324539 | Method and apparatus for processing channelized and unchannelized data within a signal A method and apparatus for processing channelized and unchannelized data within a signal are described. In one embodiment, a method comprises receiving in a network element, data packets within a number of channels, wherein each of the number of channels are channel... | 01/29/2008 |
| 7324444 | Adaptive playout scheduling for multimedia communication A method of adapting a playout schedule of a stream of media packets according to network and channel conditions includes (a) setting a playout schedule for a next packet i+1 of the stream upon receiving a current packet i; (b) computing a length of the current pack... | 01/29/2008 |
| 7319686 | Frame synchronization in multi-cell systems with a data interface A method of timing in a multi-cell system requiring synchronization of frames in transmission is provided. Transceivers of a wired data interface between a central controller and multiple base stations are synchronized to a frame timing clock up to a difference in p... | 01/15/2008 |
| 7319703 | Method and apparatus for reducing synchronization delay in packet-based voice terminals by resynchronizing during talk spurts Circuitry, embodied in a media subsystem (10A), reproduces a speech or other type of audio signal, and is operable when playing back audio data for reducing synchronization delay. A method operates by, when a frame containing audio data is sent to a decoder (... | 01/15/2008 |
| 7317737 | Systems and methods for using HDLC channel context to simultaneously process multiple HDLC channels Systems and methods are disclosed for using High-level Data Link Control (HDLC) channel context information to simultaneously process multiple HDLC channels. Preferred embodiments of the present invention enable a single network processing engine to process multiple... | 01/08/2008 |
| 7313639 | Memory system and device with serialized data transfer A memory system with serialized data transfer. The memory system includes within a memory controller and a plurality of memory devices. The memory controller receives a plurality of write data values from a host and outputs the write data values as respective serial... | 12/25/2007 |
| 7305014 | Synchronous system bus A flexible and expandable system bus for connecting traffic mapping devices to SONET/SDH framing devices. The system bus passes control signals generated by a master device to multiple tributaries to orient them relative to a SONET/SDH frame. These control signals o... | 12/04/2007 |
| 7292583 | Receiving streams over asynchronous networks A transport stream receiver de-encapsulates content packets from received network frames and transmits a transport stream carrying the selected content packets. ... | 11/06/2007 |
| 7286557 | Interface and related methods for rate pacing in an ethernet architecture An interface and related methods for rate pacing in an Ethernet architecture is described herein. ... | 10/23/2007 |
| 7277459 | Data transmission in an SDH network A method for the transmission of data in a synchronous digital hierarchy (SDH) network comprising the steps of transmitting to a node of the network a form of data signal from outside the network, converting the signal into a to a virtually concatenated information ... | 10/02/2007 |
| 7269186 | Protocol for framing a payload Systems and techniques for establishing a communication link wherein a transmission source delimits frame boundaries of a payload, calculates a value as a function of a subset of the payload, and appends the value to the payload within the frame boundaries before tr... | 09/11/2007 |
| 7269208 | Device for sending/receiving digital data capable of processing different bit rates, in particular in a VDSL environment A device for sending/receiving digital data is capable of processing different bit rates from a group of predetermined bit rates. The device may include a channel coding/decoding stage including an interleaver, a deinterleaver, and a memory whose minimum size is fix... | 09/11/2007 |
| 7254207 | Method and apparatus for transmitting and recieving multiplex tributary signals A method and apparatus are provided for transmitting and receiving a plurality of individual tributary signals in multiplex form via a common line. At the transmitting end, the tributary signals, each of which has a similar initial frequency, are converted into a co... | 08/07/2007 |
