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| Number | Title | Issue Date |
| 7948783 | MRAM An MRAM comprises: a plurality of magnetic memory cells each having a magnetoresistive element; and a magnetic field application section. The magnetic field application section applies an offset adjustment magnetic field in a certain direction to the plurality of ma... | 05/24/2011 |
| 7898833 | Magnetic element with thermally-assisted writing A magnetic element with thermally-assisted writing using a field or spin transfer provided, including a magnetic reference layer referred to as the “trapped layer,” the magnetization of which is in a fixed direction, and a magnetic storage layer called the “fr... | 03/01/2011 |
| 7894228 | System and method for providing content-addressable magnetoresistive random access memory cells A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, reg... | 02/22/2011 |
| 7791917 | System and method for providing content-addressable magnetoresistive random access memory cells A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, reg... | 09/07/2010 |
| 7751220 | Method and arrangement for associative memory device based on ferrofluid An associative memory device includes a magnetically responsive layer adapted to store a representation of a pattern, the magnetically responsive layer includes magnetic nanoparticles as a magnetically active component. The magnetic nanoparticles of the associative ... | 07/06/2010 |
| 7518897 | System and method for providing content-addressable magnetoresistive random access memory cells A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, reg... | 04/14/2009 |
| 7499303 | Binary and ternary non-volatile CAM A CAM cell array according to embodiments of the present invention include an array of CAM cells, each of the CAM cells comprising a first cell, the first cell including a non-volatile storage element coupled to at least one first data line and a match line; a match... | 03/03/2009 |
| 7423902 | Storage device and semiconductor apparatus A storage device includes memory cells disposed in a matrix. The memory cells each include a storage element whose resistance changes from a higher state to a lower state when an electric signal of a first threshold level or higher is applied and whose resistance ch... | 09/09/2008 |
| 7406561 | Data coding system and method A data coding system that compresses data and enables data, e.g., prefix addresses, to be represented with significantly fewer memory cells when compared to conventional coding systems. ... | 07/29/2008 |
| 7378698 | Magnetic tunnel junction and memory device including the same A magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layer... | 05/27/2008 |
| 7363423 | Multiple match detection circuit Multiple matches of words in a content addressable memory are detected by identifying each match of the input word to a word in the memory, and generating a representation of a relationship OR (xi AND xj), where xi=x1, x | 04/22/2008 |
| 7339282 | Topographically indexed support substrates The present invention provides an indexed support substrate. The support substrate comprises at least one set of indexing features that are distinguishable from one another and from the surrounding substrate. The support substrate also comprises a set of useful doma... | 03/04/2008 |
| 7330954 | Storing information in one of at least two storage devices based on a storage parameter and an attribute of the storage devices Briefly, in accordance with an embodiment of the invention, a method to store information is provided, wherein the method includes generating a storage parameter to store information, wherein the storage parameter indicates use of the information by a software proce... | 02/12/2008 |
| 7239570 | Magnetic memory device and method for magnetic reading and writing Disclosed herein are a magnetic memory device and method for storing and retrieving data. The magnetic memory device includes a read disk and a storage disk. The read disk comprises of an array of read heads wherein the individual read head corresponds to a storage ... | 07/03/2007 |
| 7237100 | Transaction redirection mechanism for handling late specification changes and design errors Redefined hardware structured transactions and the associated responses in a data processing device are made user programmable. Three registers, a identifier register, a mask register and a response register, are used to redirect transactions or other operations wit... | 06/26/2007 |
| 7237067 | Managing a multi-way associative cache Methods for storing replacement data in a multi-way associative cache are disclosed. One method comprises logically dividing the cache's cache sets into segments of at least one cache way; searching a cache set in accordance with a segment search sequence for a segm... | 06/26/2007 |
| 7227765 | Content addressable memory cell A content addressable memory cell for a non-volatile content addressable memory, including a non-volatile storage element for storing a content digit, a selection input for selecting the memory cell, a search input for receiving a search digit, and a comparison circ... | 06/05/2007 |
| 7203088 | Magnetoresistive random access memory and driving method thereof The number of read errors can be reduced, and a large read signal can be produced. A method of driving a magnetoresistive random access memory including memory cells, a state of which is switched between binary resistance values using a single kind of write pulses i... | 04/10/2007 |
| 7181567 | Hitless restart of access control module Performing selective update of a content addressable memory (CAM) following restart of an access control module (ACM) at a network node involves maintaining a restart CAM entry database in shared memory. When the ACM restarts, instead of reentering all CAM entries i... | 02/20/2007 |
| 7173846 | Magnetic RAM and array architecture using a two transistor, one MTJ cell A new magnetic RAM cell device is achieved. The device comprisese, first, a MTJ cell comprising a free layer and a pinned layer separated by a dielectric layer. A reading switch is coupled between the free layer and a reading line. A writing switch is coupled betwee... | 02/06/2007 |
| 7127571 | Method and system to adjust non-volatile cache associativity A method and system to adjust a non-volatile cache associativity are described. In one embodiment, the method and system include determining a status of the system; and setting an associativity level of the non-volatile memory cache (NVC) of the system, based on tha... | 10/24/2006 |
| 7109539 | Multiple-bit magnetic random access memory cell employing adiabatic switching A multiple-bit memory cell for use in a magnetic random access memory circuit includes a first adiabatic switching storage element having a first anisotropy axis associated therewith and a second adiabatic switching storage element having a second anisotropy axis as... | 09/19/2006 |
| 7075807 | Magnetic memory with static magnetic offset field A magnetoresistive or magnetic memory element and a magnetic random access memory having one or more magnetic memory elements. The memory element includes a magnetic tunnel junction including first and a second magnetic layers. The first magnetic layer having a free... | 07/11/2006 |
| 7054993 | Ternary content addressable memory device A ternary content addressable memory device. The device includes a ternary CAM array segmented into a plurality of array groups, each of which includes a number of rows of ternary CAM cells. Each array group is assigned to a particular priority by storing the priori... | 05/30/2006 |
| 7050316 | Differential non-volatile content addressable memory cell and array using phase changing resistor storage elements A differential sensing content addressable memory cell without any word lines connected to the cells in the same row comprises a first bit line for supplying a first bit. A first storage element has a first phase change resistor for storing a first stored bit, which... | 05/23/2006 |
| 7027322 | EPIR device and semiconductor devices utilizing the same There is provided an EPIR device which is excellent in mass productivity and high in practical utility. The EPIR device includes a lower electrode layer, a CMR thin film layer and an upper electrode layer which are laminated in this order on any of various su... | 04/11/2006 |
| 7012832 | Magnetic memory cell with plural read transistors A magnetic random access memory (MRAM) device has increased ΔR/R for sensing a state of a pin-dependent tunneling (SDT) device. The MRAM device includes plural transistors connected to a read line for sensing the state of the SDT device. Plural transistors lower an... | 03/14/2006 |
| 7009877 | Three-terminal magnetostatically coupled spin transfer-based MRAM cell A magnetic memory device for reading and writing a data state comprises at least three terminals including first, second, and third terminals. The magnetic memory device also includes a spin transfer (ST) driven element, disposed between the first terminal and the s... | 03/07/2006 |
| 6988164 | Compare circuit and method for content addressable memory (CAM) device A content addressable memory (CAM) device (100) may include a number of sub-blocks (102-8 to 102-15) that can generate CAM search results. In a “search beyond” operation, sub-blocks (102-8 to 102-15)... | 01/17/2006 |
| 6977838 | Method and system for providing a programmable current source for a magnetic memory A method and system for providing a magnetic memory are disclosed. The method and system include providing a plurality of magnetic memory cells and at least one programmable current source. Each of the plurality of magnetic memory cells includes a first magnetic ele... | 12/20/2005 |
| 6944050 | Nonvolatile memory device The present invention relates to a nonvolatile memory device, and more specifically, to a programmable nonvolatile logic switch memory (register) device using a resistive memory device. The programmable nonvolatile register uses a logic switch or a nonvolatile resis... | 09/13/2005 |
| 6936874 | Semiconductor apparatus having a large-size bus connection In a semiconductor apparatus of the present invention, a plurality of circuit components are provided. A first bus interconnects the circuit components. A second bus interconnects the circuit components. A switching unit outputs a select signal that causes each circ... | 08/30/2005 |
| 6870760 | Method and system for performing readout utilizing a self reference scheme A method and system for reading a magnetic memory including a plurality of magnetic elements is disclosed. The method and system include determining a first resistance of at least one of the plurality of magnetic elements. The method and system also include applying... | 03/22/2005 |
| 6783994 | Method of fabricating a self-aligned magnetic tunneling junction and via contact A method of fabricating a magnetoresistive random access memory device comprising the steps of providing a substrate, forming a first conductive layer positioned on the substrate, forming a conductive material stack region with a flat surface, the conductive materia... | 08/31/2004 |
| 6717844 | Semiconductor memory device with latch circuit and two magneto-resistance elements A memory cell in a MRAM includes four N channel MOS transistors responsive to a write permit signal attaining an H level to connect program lines of first and second tunneling magneto-resistance elements between first and second storage nodes and a line of ground po... | 04/06/2004 |
| 6621732 | Magnetic element, memory device and write head A ferromagnetic pinned layer (1) kept at a fixed magnetic orientation by a pinning layer (4) is separated from a ferromagnetic free layer (3) by a Mott insulator coupling layer (2). A controllable voltage source (5) is connected between the pinned layer (... | 09/16/2003 |
| 6567297 | Method and apparatus for sensing resistance values of memory cells A method for sensing the resistance value of a resistor-based memory cell. A current is driven through all unused row lines of a memory array while grounding the row line associated with the selected cell, thereby forcing the current through a comparative... | 05/20/2003 |
| 6505271 | Increasing priority encoder speed using the most significant bit of a priority address A method of generating a priority address using a priority encoder that includes the steps of: (1) providing a plurality of match signals from a CAM cell memory array to the priority encoder, (2) generating a most significant address bit of the priority a... | 01/07/2003 |
| 6452823 | Non-volatile magnetic cache memory and method of use A non-volatile, bistable magnetic tunnel junction cache memory including a cache tag array and a cache data array. The cache tag array includes non-volatile magnetic memory tag cells arranged in rows and columns. Each row of the tag array includes a word ... | 09/17/2002 |
| 6366978 | Cache memory A cache memory system 22 is described in which a content addressable memory 24 and a cache RAM memory 28 are provided. Each content addressable storage row has an associated hit line 18 and an access enable line 12. An index decoder 46 is provided for con... | 04/02/2002 |
