Did You Know...
...that a workman who left the soap mixing machine on too long was responsible for making Ivory Soap? He was so embarrassed by his mistake that he threw the mess in a stream. Imagine his dismay when the evidence of his error floated to the surface! Result: Ivory soap, the soap that floats.
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| Number | Title | Issue Date |
| 8169835 | Charge trapping memory cell having bandgap engineered tunneling structure with oxynitride isolation layer A band gap engineered, charge trapping memory cell includes a charge storage structure including a trapping layer. a blocking layer, and a dielectric tunneling structure including a thin tunneling layer, a thin bandgap offset layer and a thin isolation layer compris... | 05/01/2012 |
| 8130554 | Securely erasing flash-based memory A method is used in securely erasing flash-based memory. A new version of data is received for a logical location of a flash-based memory. An old version of the data of the logical location is stored in a first physical location in the flash-based memory. The old ve... | 03/06/2012 |
| 8125834 | Device and method for controlling solid-state memory system A memory system includes an array of solid state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a... | 02/28/2012 |
| 8111558 | pFET nonvolatile memory A nonvolatile memory cell is constructed using a floating-gate pFET readout transistor having its source tied to a power source (Vdd) and its drain providing a current, which can be sensed to determine the state of the cell. The gate of the pFET readout transistor p... | 02/07/2012 |
| 8102718 | Method for programming a floating gate The invention provides methods for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a floating gate,... | 01/24/2012 |
| 8072817 | Tracking cells for a memory system Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust th... | 12/06/2011 |
| 8068370 | Floating gate memory device with interpoly charge trapping structure A charge trapping floating gate is described with asymmetric tunneling barriers. The memory cell includes a source region and a drain region separated by a channel region. A first tunneling barrier structure is disposed above the channel region. A floating gate is d... | 11/29/2011 |
| 8059473 | Non-volatile memory device A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation ... | 11/15/2011 |
| 7995400 | Reducing effects of program disturb in a memory device The programming disturb effects in a semiconductor non-volatile memory device are reduced by biasing unselected word lines of a memory block with a negative voltage followed by a positive Vpass voltage. The selected word lines are biased with a programmin... | 08/09/2011 |
| 7969789 | Method for driving nonvolatile semiconductor memory device In a nonvolatile semiconductor memory device having n (n is an integer of two or more) electrode films stacked and having charge storage layers provided above and below each of the electrode films, when data “0” is written by injecting electrons into the charge ... | 06/28/2011 |
| 7961524 | Method for driving a nonvolatile semiconductor memory device A method for driving a nonvolatile semiconductor memory device is provided. The nonvolatile semiconductor memory device has source/drain diffusion layers spaced from each other in a surface portion of a semiconductor substrate, a laminated insulating film formed on ... | 06/14/2011 |
| 7944758 | Non-volatile memory device and method for copy-back thereof A method for performing a copy-back operation in a non-volatile memory device includes: measuring and recording a maximum program voltage used to program a part of target data to copy-back when a copy-back command is inputted; and performing a copy-back operation us... | 05/17/2011 |
| 7924628 | Operation of a non-volatile memory array A cache programming operation which requires 2 SRAMs (one for the user and one for the array) may be combined with a multi-level cell (MLC) programming operation which also requires 2 SRAMs (one for caching the data and one for verifying the data), using only a tota... | 04/12/2011 |
| 7924629 | Three-dimensional memory device and programming method A programming method and a three-dimensional memory device are disclosed. The three-dimensional memory device includes a stacked plurality of layers, each layer having a memory array, and each memory array having a string of memory cells. The programming method incl... | 04/12/2011 |
| 7916551 | Method of programming cell in memory and memory apparatus utilizing the method A method of programming a first cell in a memory, wherein the first cell has a first S/D region and shares a second S/D region with a second cell that has a third S/D region opposite to the second S/D region. The channels of the first and the second cells are turned... | 03/29/2011 |
| 7916552 | Tracking cells for a memory system Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust th... | 03/29/2011 |
| 7894273 | Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits A group of non-volatile memory cells are programmed in a programming pass by a series of incremental programming pulses where each pulse is followed by a program-verify and possibly program-inhibition step. Performance is improved during the programming pass by dela... | 02/22/2011 |
| 7881123 | Multi-operation mode nonvolatile memory Disclosed are various embodiments that program a memory array with different carrier movement processes. In one application, memory cells are programmed with a particular carrier movement process depending on the pattern of data usage, such as code flash and data fl... | 02/01/2011 |
| 7864594 | Memory apparatus and method thereof for operating memory A memory apparatus, a controller, and a method thereof for programming non-volatile memory cells are provided. The memory apparatus includes a plurality of memory cells, wherein each memory cell shares a source/drain region with a neighboring memory cell. The method... | 01/04/2011 |
| 7864595 | Nonvolatile memory cell, nonvolatile memory device, and method of programming the nonvolatile memory device A method of programming a nonvolatile memory device. The method may include pre-programming one memory cell among a plurality of memory cells by storing data in a first data storage layer using a first program voltage applied to one word line corresponding to the on... | 01/04/2011 |
| 7859911 | Circuit and system for programming a floating gate The invention provides circuits and systems for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a f... | 12/28/2010 |
| 7859912 | Mid-size NVM cell and array utilizing gated diode for low current programming A method of operating a non-volatile memory (NVM) cell structure that utilizes gated diode is provided. The cell architecture, utilizing about 4-10 um2 per bit, includes gated diodes that are used to program the cells while consuming low programming current. The cel... | 12/28/2010 |
| 7839696 | Method of programming and erasing a p-channel BE-SONOS NAND flash memory A programming method for a p-channel memory cell, the memory cell includes a source, a drain and a gate. The gate is applies with a first voltage, which results in Fowler-Nordheim (−FN) hole injection, thereby causing the memory cell to be in a programmed state. | 11/23/2010 |
| 7835192 | Method for programming a nonvolatile memory A method for programming a nonvolatile memory includes applying at least a voltage to a source or a drain, so as to inject carriers of the source or drain into a substrate; applying a third voltage to a gate or the substrate, so that the carriers which are in the su... | 11/16/2010 |
| 7821840 | Multi-phase programming of multi-level memory Systems, methods, and devices that facilitate multi-phase programming of data in a memory component are presented. Received data is programmed to a memory using multiple programming phases based on a predefined program pattern. A program learn is performed by varyin... | 10/26/2010 |
| 7813183 | Program and erase methods for nonvolatile memory Methods of programming or erasing a nonvolatile memory device having a charge storage layer including performing at least one unit programming or erasing loop, each unit programming or erasing loop including applying a programming pulse, an erasing pulse, a time del... | 10/12/2010 |
| 7808837 | Non-volatile memory control device A memory controller outputs an additional writing instruction to one of a plurality of non-volatile memories arbitrarily selected via a writing instruction output unit when a signal which rejects a writing operation is not outputted from writing controllers of the p... | 10/05/2010 |
| 7808836 | Non-volatile memory with adaptive setting of state voltage levels A non-volatile memory device is accessed using voltages which are customized to the device, and/or to portions of the device, such as blocks or word lines of non-volatile storage elements. The accessing can include programming, verifying or reading. By customizing t... | 10/05/2010 |
| 7808838 | Nonvolatile memory devices and methods of controlling the wordline voltage of the same A nonvolatile memory device includes an array of memory cells arranged in rows and columns, the array of memory cells having wordlines associated therewith. A wordline voltage controller determines the levels of wordline voltages to be supplied to the respective wor... | 10/05/2010 |
| 7791950 | Inverter non-volatile memory cell and array system NVM arrays include rows and columns of NVM cells comprising a floating gate and a four transistor storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each ... | 09/07/2010 |
| 7791951 | Methods of operating non-volatile memory device A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation ... | 09/07/2010 |
| 7787308 | Flash memory device and program method thereof A method for programming a flash memory device comprising programming memory cells via repetition of program loops, a first of the program loops including a program execution interval and a verify read interval, a second of the program loops including the program ex... | 08/31/2010 |
| 7787309 | Method of operating integrated circuit embedded with non-volatile one-time-programmable and multiple-time programmable memory A programmable non-volatile device is operated using a floating gate that functions as a FET gate that overlaps a portion of a source/drain region. This allows a programming voltage for the device to be imparted to the floating gate through capacitive coupling, thus... | 08/31/2010 |
| 7778087 | Memory programming method and data access method A memory programming method is provided. A first programming operation is performed to program a multi level cell from an initial state to a first target state, which corresponds to a storage data and has a first threshold voltage range. A flag bit of the NAND flash... | 08/17/2010 |
| 7773430 | Method of identifying logical information in a programming and erasing cell by on-side reading scheme A method of identifying logical information in a cell, particularly in a programming by hot hole injection nitride electron storage (PHINES) cell by one-side reading scheme is disclosed. The method comprise steps of: erasing the first region and the second region of... | 08/10/2010 |
| 7773429 | Non-volatile memory device and driving method thereof This patent relates to a non-volatile memory device and a driving method thereof The non-volatile memory device includes a source select line in which a floating gate and a control gate are electrically connected to each other, a drain select line in which a floatin... | 08/10/2010 |
| 7764550 | Method of programming a non-volatile memory A memory system including non-volatile memory cells. The memory system includes program circuitry that programs cells to a first threshold voltage or a second threshold voltage based on the number of times that cells of the memory system have been erased. In one emb... | 07/27/2010 |
| 7760554 | NROM non-volatile memory and mode of operation Operating NVM memory cell such as an NROM cell by using a combination of Fowler-Nordheim tunneling (FNT), hot hole injection (HHI), and channel hot electron (CHE) injection. In the FNT erase step, only a few cells may be verified, and in the CHE second programming s... | 07/20/2010 |
| 7760555 | Tracking cells for a memory system Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust th... | 07/20/2010 |
| 7755950 | Programming methods of memory systems having a multilevel cell flash memory A method of programming a multilevel cell flash memory includes dividing a memory cell array of the flash memory into a user block and a cache block, programming first LSB data into a page of the user block, programming first MSB data into the page of the user block... | 07/13/2010 |
