"To place a man in a multi-stage rocket and project him into the controlling gravitational field of the moon where the passengers can make scientific observations, perhaps land alive, and then return to earth--all that constitutes a wild dream worthy of Jules Verne. I am bold enough to say that such a man-made voyage will never occur regardless of all future advances."
Lee deForest, American radio pioneer ; 1957
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8189394 | Page buffer circuit of nonvolatile memory device and method of operating the same The page buffer of a nonvolatile memory device utilizing a double verification method using first and second verification voltages when performing a program verification operation includes a first latch unit including a first latch configured to store input data and... | 05/29/2012 |
| 8189395 | Nonvolatile semiconductor memory and data reading method A nonvolatile semiconductor memory that includes a memory cell array including a plurality of electrically writable memory cells; a plurality of word lines and a plurality of bit lines connected to the plurality of memory cells; and a data reading and programming co... | 05/29/2012 |
| 8189393 | Nonvolatile memory device with incremental step pulse programming A nonvolatile memory device includes a sense amplifier circuit sensing first data from a memory cell via a bit line and outputting the sensed first data, in response to a read command. A write driver circuit programs the memory cell and stores second data indicating... | 05/29/2012 |
| 8174899 | Non-volatile semiconductor memory device When data is written to a memory cell transistor, a write controller controls in such a manner that a verification operation subsequent to a program operation is carried out while a program voltage is increased stepwise for each program operation. The write controll... | 05/08/2012 |
| 8169832 | Methods of erase verification for a flash memory device Methods and apparatus are disclosed, such as those involving a flash memory device that includes a memory block. The memory block includes a plurality of data lines extending substantially parallel to one another, and a plurality of memory cells. One such method inc... | 05/01/2012 |
| 8159882 | Nonvolatile semiconductor memory device and memory system A semiconductor memory device executes a writing operation based on a first bit assignment pattern at the time of writing. The first bit assignment pattern is created such that pieces of x-bit data assigned to adjacent threshold distributions have only a one-bit dif... | 04/17/2012 |
| 8154929 | Flash memory device controlling common source line voltage, program-verify method, and memory system Disclosed is a flash memory device and a program-verify method. The flash memory device includes; a plurality of memory cells connected between a bit line and a common source line, and a data input/output circuit connected to the bit line and configured to store pro... | 04/10/2012 |
| 8144519 | Programming a flash memory device An initial verify read operation is performed after each programming pulse. The verify voltage starts at an initial verify voltage for the first word line and increases for each word line that is verified up to a maximum verify voltage. A second verify read operatio... | 03/27/2012 |
| 8139420 | Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device capable of reading and verifying a negative threshold cell by biasing a source line and a well line to a positive voltage. The nonvolatile semiconductor memory device includes a precharge circuit which precharges a bit line ... | 03/20/2012 |
| 8130552 | Multi-pass programming for memory with reduced data storage requirement Coupling effects between adjacent floating gates in a non-volatile storage device are reduced in a multi-pass programming operation, while reducing program data storage requirements. In one approach, storage elements are programmed in an out of sequence or zigzag wo... | 03/06/2012 |
| 8125832 | Variable initial program voltage magnitude for non-volatile storage Multiple programming processes are performed for a plurality of non-volatile storage elements. Each of the programming process operates to program at least a subset of said non-volatile storage elements to a set of target conditions using program pulses. In one embo... | 02/28/2012 |
| 8120966 | Method and apparatus for management of over-erasure in NAND-based NOR-type flash memory A method and apparatus for operating an array block of dual charge retaining transistor NOR flash memory cells by erasing the dual charge retaining transistor NOR flash memory cells to set their threshold voltage levels to prevent leakage current from corrupting dat... | 02/21/2012 |
| 8120967 | Semiconductor memory device and related method of programming A method of programming a nonvolatile memory device comprises applying a program voltage to a selected wordline to program selected memory cells, and performing a verify operation by applying a verify voltage to the selected wordline to determine the programming sta... | 02/21/2012 |
| 8111556 | Nonvolatile memory device and method of operating the same A nonvolatile memory device and a method of operating the same. The nonvolatile memory device includes a memory cell array including memory cells for storing data, a temperature sensor and a controller. The temperature sensor outputs a temperature detection signal a... | 02/07/2012 |
| 8111557 | Nonvolatile memory device and method of programming the device A nonvolatile memory device and a method of programming the device includes storing first data in first main and sub-registers and storing second data in second main and sub-registers, performing first program and verification operations on first memory cells based ... | 02/07/2012 |
| 8107298 | Non-volatile memory with fast binary programming and reduced power consumption In a non-volatile storage system, the time needed to perform a programming operation is reduced by minimizing data transfers between sense modules and a managing circuit. A sense module is associated with each storage element. Based on write data, a data node in the... | 01/31/2012 |
| 8102716 | Nonvolatile semiconductor memory device and method for performing verify write operation on the same Disclosed herein is a nonvolatile semiconductor memory device including a plurality of memory cells; and a driver circuit configured to perform a verify write operation in a cycle including selecting from an array of the plurality of memory cells a predetermined num... | 01/24/2012 |
| 8064264 | Ornand flash memory and method for controlling the same A semiconductor device that includes: a memory cell array that includes non-volatile memory cells; an area that is contained in the memory cell array and stores area data; a first storage unit that holds data transferred from the memory cell array, and outputs the d... | 11/22/2011 |
| 8064265 | Programming bit alterable memories Program failures during programming can be corrected during reading using an error correcting code. This allows an array to pass programming more readily, speeding the operation of the memory and avoiding the need to continually reprogram or to issue an error messag... | 11/22/2011 |
| 8054691 | Detecting the completion of programming for non-volatile storage A set of non-volatile storage elements are subjected to a programming process in order to store data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target c... | 11/08/2011 |
| 8050101 | Nonvolatile memory devices having erased-state verify capability and methods of operating same A program method of a nonvolatile memory device includes applying a program voltage to program cells for changing data; verifying the program cells, based on the changed data; and verifying program inhibit cells for maintaining stored data even when the program volt... | 11/01/2011 |
| 8045392 | Multiple level programming in a non-volatile memory device The programming method of the present invention minimizes program disturb by initially programming cells on the same word line with the logical state having the highest threshold voltage. The remaining cells on the word line are programmed to their respective logica... | 10/25/2011 |
| 8045393 | Program method of nonvolatile memory device According to an aspect of a program method of a nonvolatile memory device, a first program operation for programming a first data stored in a first latch may be performed and a cache program signal may be input for inputting a second data to be programmed subsequent... | 10/25/2011 |
| 8040735 | Semiconductor memory device capable of detecting write completion at high speed A memory cell array has a plurality of memory cells arrayed in row and column directions. A plurality of sense amplifier units includes a plurality of sense amplifiers detecting write completion of each of the memory cells selected for each row. A plurality of detec... | 10/18/2011 |
| 8036042 | Method of operating nonvolatile memory device A method of operating a nonvolatile memory device includes performing a reset operation for setting a level of a program voltage to a first level, performing a program operation and a verification operation on memory cells included in a first page of a first memory ... | 10/11/2011 |
| 8031528 | Flash memory programming and verification with reduced leakage current A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage c... | 10/04/2011 |
| 8018775 | Nonvolatile memory device and method of verifying the same A nonvolatile memory device having a memory cell array configured to include a number of memory cells coupled to a bit line, a control circuit configured to output a code signal in response to a verification operation command signal during a verification operation b... | 09/13/2011 |
| 8018774 | Method of operating nonvolatile memory device and memory system A method of operating a nonvolatile memory device includes; performing a verification operation on memory cells while controlling a verification voltage until the memory cells are verification-passed, controlling a level of a bias voltage to be applied to the memory... | 09/13/2011 |
| 8018776 | Verification method for nonvolatile semiconductor memory device The present invention provides nonvolatile semiconductor memory devices which operate with low power consumption. In a nonvolatile semiconductor memory device, a plurality of nonvolatile memory elements are connected in series. The plurality of nonvolatile memory el... | 09/13/2011 |
| 8014208 | Erase verification for flash memory Example embodiments for verifying an erase operation for a flash memory device may comprise, for one or more embodiments, utilizing program operation verification circuitry to verify, at least in part, the erase operation. ... | 09/06/2011 |
| 8000150 | Method of programming memory device A method of programming a memory device may include applying a program voltage to a memory cell of the memory device and consecutively applying a plurality of verifying voltages to the memory cell. The verifying voltages may be consecutively applied with a same volt... | 08/16/2011 |
| 7986560 | Flash memory devices that utilize age-based verify voltages to increase data reliability and methods of operating same Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation t... | 07/26/2011 |
| 7986559 | Method of operating nonvolatile memory device A method of operating a nonvolatile memory device includes performing a first program operation and a first verification operation on memory cells until a cell, having a threshold voltage higher than a first reference voltage, occurs and, when a cell having the thre... | 07/26/2011 |
| 7983090 | Memory voltage cycle adjustment The present disclosure includes various method, device, system, and module embodiments for memory cycle voltage adjustment. One such method embodiment includes counting a number of process cycles performed on a first memory block in a memory device. This method embo... | 07/19/2011 |
| 7978527 | Verification process for non-volatile storage When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the n... | 07/12/2011 |
| 7974135 | Non-volatile semiconductor memory device and erasing method thereof A non-volatile semiconductor memory device including a NAND cell unit with a plurality of electrically rewritable and non-volatile memory cells connected in series, one end thereof being coupled to a bit line via a first select gate transistor while the other end is... | 07/05/2011 |
| 7961522 | Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells A flash memory device programs cells in each row in a manner that minimizes the number of programming pulses that must be applied to the cells during programming. The flash memory device includes a pseudo pass circuit that determines the number of data errors in eac... | 06/14/2011 |
| 7957199 | Method of erasing in non-volatile memory device An erasing method in a nonvolatile memory device is disclosed. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells;... | 06/07/2011 |
| 7957198 | Verifying an erase threshold in a memory device In one or more embodiments, a memory device is disclosed as having an erase verify operation that includes a negative bias on the p-well in which the memory cell or cells being erased are formed. After an erase pulse is applied to the selected cells to be erased, th... | 06/07/2011 |
| 7952958 | Non-volatile semiconductor storage system There is provided a non-volatile memory having electrically rewritable non-volatile memory cells arranged therein. A controller controls operation at the non-volatile memory. The non-volatile memory comprises a status output section configured to output status infor... | 05/31/2011 |