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| Number | Title | Issue Date |
| 8189373 | Phase change memory device using a multiple level write voltage A phase change memory device using a multiple level write voltage is described. The phase change memory device includes a cell array unit including a phase change resistance cell positioned at an intersection of a word line and a bit line. A voltage selection adjust... | 05/29/2012 |
| 8189372 | Integrated circuit including electrode having recessed portion An integrated circuit includes a first electrode including an etched recessed portion. The integrated circuit includes a second electrode and a resistivity changing material filling the recessed portion and coupled to the second electrode. ... | 05/29/2012 |
| 8189375 | Methods of forming memory cells and methods of forming programmed memory cells In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region ... | 05/29/2012 |
| 8189374 | Memory device including an electrode having an outer portion with greater resistivity A memory cell includes a first electrode having a first region and a second region, a second electrode and a phase change material. The phase change material is interposed between the first electrode and the second electrode with the first region of the first electr... | 05/29/2012 |
| 8174878 | Nonvolatile memory, memory system, and method of driving Provided are a nonvolatile memory and related method of programming same. The nonvolatile memory includes a memory cell array with a plurality of nonvolatile memory cells and a write circuit. The write circuit is configured to write first logic state data to a first... | 05/08/2012 |
| 8174876 | Fusion memory device embodied with phase change memory devices having different resistance distributions and data processing system using the same A fusion memory device having phase change memory devices that have different resistance distributions and a corresponding data processing system is presented. The fusion memory device includes a first and a second phase change memory group arranged on the same chip... | 05/08/2012 |
| 8174877 | Electric device comprising phase change material and heating element An electric device has a resistor including a phase change material changeable between a first phase and a second phase within a switching zone. The resistor has a first resistance when the phase change material is in the first phase and a different second resistanc... | 05/08/2012 |
| 8169820 | Use of symmetric resistive memory material as a diode to drive symmetric or asymmetric resistive memory A crosspoint array is made up of a plurality of bitlines and wordlines and a plurality of crossbar elements, with each crossbar element being disposed between a bitline and a wordline, and each crossbar element comprising at least a phase change material used as a r... | 05/01/2012 |
| 8169819 | Semiconductor storage device There is provided a semiconductor storage device which is capable of further reducing a size of a memory cell, and increasing a storage capacity. Plural memory cells each including a transistor formed on a semiconductor substrate, and a variable resistive device hav... | 05/01/2012 |
| 8164949 | Reducing drift in chalcogenide devices Chalcogenide materials conventionally used in chalcogenide memory devices and ovonic threshold switches may exhibit a tendency called drift, wherein threshold voltage or resistance changes with time. By providing a compensating material which exhibits an opposing te... | 04/24/2012 |
| 8159869 | Circuit and method for generating reference voltage, phase change random access memory apparatus and read method using the same A circuit for generating a reference voltage includes at least one reference cell, a reference cell write driver, a reference cell sense amplifier, and a voltage compensation unit. The reference cell is a variable resistance memory cell. The reference cell write dri... | 04/17/2012 |
| 8159867 | Phase change memory devices and systems, and related programming methods A phase change memory device performs a program operation by receiving program data to be programmed in selected memory cells, sensing read data already stored in the selected memory cells by detecting respective magnitudes of verify currents flowing through the sel... | 04/17/2012 |
| 8159868 | Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance cha... | 04/17/2012 |
| 8149616 | Method for multilevel programming of phase change memory cells using adaptive reset pulses A method for programming multilevel PCM cells envisages: forming an amorphous region of amorphous phase change material in a storage element of a PCM cell by applying one or more reset pulse; and forming a conductive path of crystalline phase change material through... | 04/03/2012 |
| 8144505 | Nonvolatile memory devices supporting memory cells having different bit storage levels and methods of operating the same Nonvolatile memory devices include a memory cell array including a first memory cell and an adjacent second memory cell and a data input/output circuit configured to operate the first memory cell as an m-bit cell and to operate the second memory cell as an n-bit cel... | 03/27/2012 |
| 8144507 | Method of measuring a resistance of a resistive memory device A method of measuring a resistance of a memory cell in a resistive memory device can be provided by applying a data write pulse to a selected cell of the resistive memory device, applying a resistance read pulse to the selected cell after a delay time measured from ... | 03/27/2012 |
| 8144506 | Cross-point memory devices, electronic systems including cross-point memory devices and methods of accessing a plurality of memory cells in a cross-point memory array Memory devices comprise a plurality of memory cells, each memory cell including a memory element and a selection device. A plurality of first (e.g., row) address lines can be adjacent (e.g., under) a first side of at least some cells of the plurality. A plurality of... | 03/27/2012 |
| 8144508 | Memory reading method for resistance drift mitigation Techniques for reading phase change memory that mitigate resistance drift. One contemplated method includes apply a plurality of electrical input signals to the memory cell. The method includes measuring a plurality of electrical output signals from the memory cell ... | 03/27/2012 |
| 8139404 | Semiconductor memory device The semiconductor memory device includes a control circuit that performs control of reading data from and writing data into each memory cell. The control circuit includes a flip-flop circuit that stores the data read from the memory cell and stores the data to be wr... | 03/20/2012 |
| 8139427 | Nonvolatile memory device A nonvolatile memory device includes a data sense amplifier configured to supply a data detection current to a memory cell and detect a data detection voltage having a voltage level corresponding to a resistance of the memory cell, a first switching element configur... | 03/20/2012 |
| 8134865 | Operating method of electrical pulse voltage for RRAM application Metal-oxide based memory devices and methods for operating and manufacturing such devices are described herein. A method for manufacturing a memory device as described herein comprises forming a metal-oxide memory element, and applying an activating energy to the me... | 03/13/2012 |
| 8134866 | Phase change memory devices and systems, and related programming methods A method programs a phase change memory device. The method comprises receiving program data for selected memory cells; generating bias voltages based on reference cells; sensing read data stored in a selected memory cell by supplying the selected memory cell with ve... | 03/13/2012 |
| 8130539 | Phase change memory device A phase change memory device includes a signal generator configured to generate first and second sensing and amplifying enable signals which are sequentially activated during an activation period of a word line selection signal and each of which has a certain activa... | 03/06/2012 |
| 8130540 | Phase change random access memory apparatus and write control method for the same The disclosed phase change random access memory apparatus is configured to program a predetermined phase change memory cell in the phase change memory apparatus in response to a plurality of write instructions applied at independent points of time. ... | 03/06/2012 |
| 8130541 | Phase change memory apparatus and test circuit therefor A test circuit transfers data, which is generated by current supplied from an external source, to a memory cell in response to a test mode signal. ... | 03/06/2012 |
| 8130536 | Read window in chalcogenide semiconductor memories Using a shorter read pulse width may increase read window in some embodiments. This may allow the use of higher voltages with less likelihood of a read disturb where a bit unintentionally changes phase. ... | 03/06/2012 |
| 8130538 | Non-volatile memory circuit including voltage divider with phase change memory devices A memory circuit including a voltage divider with a first phase change memory (PCM) device and a second PCM device coupled to the first PCM device is described. In one embodiment, the first PCM device is in a set resistance state and the second PCM device is in a re... | 03/06/2012 |
| 8130537 | Phase change memory cell with MOSFET driven bipolar access device Embodiments are directed to memory devices comprising a bipolar junction transistor having an emitter, a base and a collector; a first side of a resistance changing memory element coupled to the emitter of the bipolar junction transistor; and a MOSFET coupled to the... | 03/06/2012 |
| 8125821 | Method of operating phase-change memory One or more embodiments are related to a method of operating a phase-change memory array, including: providing the phase-change memory array, the phase-change memory array including a phase-change memory element in series with an access device between a first addres... | 02/28/2012 |
| 8125822 | Reducing programming time of a memory cell The present invention provides methods and apparatus for adjusting voltages of bit and word lines to program a two terminal memory cell. The invention may include setting a first line connected to a memory cell to a first voltage from a first line standby voltage, c... | 02/28/2012 |
| 8116127 | Phase change memory devices and systems, and related programming methods A method of writing data in a phase change memory includes receiving write data to be written to a selected phase change memory cell in the plurality of phase change memory cells, sensing data stored in the selected phase change memory cell, determining whether or n... | 02/14/2012 |
| 8116128 | Semiconductor device For example, one memory cell is configured using two memory cell transistors and one phase change element by disposing a plurality of diffusion layers in parallel to a bit-line, disposing gates between the diffusion layers so as to cross the bit-line, disposing bit-... | 02/14/2012 |
| 8116129 | Variable resistance memory device and method of manufacturing the same A variable resistance memory device includes a substrate, a plurality of active lines formed on the substrate, are uniformly separated, and extend in a first direction, a plurality of switching devices formed on the active lines and are separated from one another, a... | 02/14/2012 |
| 8116125 | Method of operating a phase-change memory device A method of operating a phase-change memory device, including a phase-change layer and a unit applying a voltage to the phase-change layer, which includes applying a reset voltage to the phase-change layer, wherein the reset voltage includes at least two pulse volta... | 02/14/2012 |
| 8116126 | Measurement method for reading multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition A memory system includes a memory cell configured to represent at least two binary values, a bit line coupled to the memory cell, and first and second comparators coupled to the bit line that, respectively, compare a first and second reference value to a value of a ... | 02/14/2012 |
| 8111545 | Phase-change memory device and firing method for the same A phase-change memory device and its firing method are provided. The firing method of the phase-change memory device includes applying a writing current to phase-change memory cells, identifying a state of the phase-change memory cells after applying the writing cur... | 02/07/2012 |
| 8111546 | Optical ovonic threshold switch A method and device for accomplishing transformation of a switching material from a resistive state to a conductive state. The method utilizes a non-electrical source of energy to effect the switching transformation. The switching material may be a chalcogenide swit... | 02/07/2012 |
| 8107284 | Nonvolatile memory device using a variable resistive element A nonvolatile memory device includes a plurality of memory banks, each including a plurality of nonvolatile memory cells, write global bit lines shared by the plurality of memory banks, read global bit lines shared by the plurality of memory banks, and a dummy globa... | 01/31/2012 |
| 8107283 | Method for setting PCRAM devices Memory devices and methods for operating such devices are described herein. A method as described herein includes applying a bias arrangement to a memory cell to change the resistance state from a higher resistance state to a lower resistance state. The bias arrange... | 01/31/2012 |
| 8102702 | Phase change memory and operation method of the same An operation method of phase change memory (PCM) is provided. The operation method includes applying a RESET pulse to a phase change material of the PCM, wherein the RESET pulse has a profile with a first tail such that a plurality of seeds are formed in the phase c... | 01/24/2012 |
