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Pneumatic Shoe Lacing Apparatus
This invention provides a pneumatic shoe lacing apparatus for the pneumatic lacing of shoe.
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| Number | Title | Issue Date |
| 8184449 | Electronic device having stack-type semiconductor package and method of forming the same An electronic device includes a lower electronic part including a lower substrate, a lower chip structure disposed on the lower substrate, and a lower molding layer covering the lower chip structure and having a recessed region in an upper surface of the lower moldi... | 05/22/2012 |
| 7511966 | Printed circuit board According to one embodiment, first to fourth pads are arranged on a surface mounting area of a printed circuit board along one side of the mounting area, with a preset gap defined between each pair of adjacent ones of the pads. The first to third pads form a first l... | 03/31/2009 |
| 7417197 | Direct contact power transfer pad and method of making same A power transfer pad, having: a non-conductive board having a top and a bottom; a plurality of conductive substrate sections disposed across the top of the non-conductive board; at least one conducting element disposed on each of the conductive substrate sections; a... | 08/26/2008 |
| 7365006 | Semiconductor package and substrate having multi-level vias fabrication method A semiconductor package and substrate having multi-level plated vias provide a high density blind via solution at low incremental cost. Via are half-plated atop a circuit pattern and then a second via half is added to complete the via after isolation of elements of ... | 04/29/2008 |
| 7349223 | Enhanced compliant probe card systems having improved planarity Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more ... | 03/25/2008 |
| 7341340 | Printed item having an image with a high durability and/or resolution A printed device is provided with an image printed thereon, having a relatively high durability and/or resolution. A printer and method are also provided to produce a high durability image by treating an item to be printed with plasma. In particular, a printer is pr... | 03/11/2008 |
| 7335592 | Wafer level package, multi-package stack, and method of manufacturing the same A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of t... | 02/26/2008 |
| 7330357 | Integrated circuit die/package interconnect A system may include a plurality of pliant conductive elements, a first end of one of the plurality of pliant conductive elements to be electrically coupled to a first electrical contact of an integrated circuit substrate and a second end of the one of the plurality... | 02/12/2008 |
| 7319265 | Semiconductor chip assembly with precision-formed metal pillar A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The metal ... | 01/15/2008 |
| 7294533 | Mold compound cap in a flip chip multi-matrix array package and process of making same A molding compound cap structure is disclosed. A process of forming the molding compound cap structure is also disclosed. A microelectronic package is also disclosed that uses the molding compound cap structure. A method of assembling a microelectronic package is al... | 11/13/2007 |
| 7294928 | Components, methods and assemblies for stacked packages A bottom unit including a bottom unit semiconductor chip is mounted to a circuit board and one or more top elements such as packaged semiconductor chips are mounted to the bottom unit. Both mounting operations can be performed using the same techniques as commonly e... | 11/13/2007 |
| 7288436 | Semiconductor chip package manufacturing method including screen printing process A method for manufacturing a semiconductor chip package may include screen printing an adhesive on a substrate using a screen printing mask. The adhesive may be heated during a first curing process. A semiconductor chip may be attached to the adhesive on the substra... | 10/30/2007 |
| 7285196 | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at smaller dimensions than aluminum. However, use of copper typically requir... | 10/23/2007 |
| 7285727 | Flexible wiring boards for double-side connection A flexible wiring board for double side connection is capable of improving the reliability of connection to circuit boards and a manufacturing process thereof. The flexible wiring board for double-side connection includes a polyimide film having a through-hole at a ... | 10/23/2007 |
| 7268421 | Semiconductor chip assembly with welded metal pillar that includes enlarged ball bond A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The chip a... | 09/11/2007 |
| 7264991 | Method of connecting a conductive trace to a semiconductor chip using conductive adhesive A method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip that includes a conductive pad, providing a conductive trace, then disposing a conductive adhesive between the conductive trace and the chip, thereby mechanical... | 09/04/2007 |
| 7265994 | Underfill film for printed wiring assemblies A self supported underfill film (18) adhesively bonds surface mount integrated circuit packages (14) to a printed circuit board (10). The printed circuit board has conductive traces (12) and exposed conductive pads (13) on the surf... | 09/04/2007 |
| 7262082 | Method of making a three-dimensional stacked semiconductor package with a metal pillar and a conductive interconnect in an encapsulant aperture A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar... | 08/28/2007 |
| 7262505 | Selective electroless-plated copper metallization Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including depositing a thin film seed layer of Palladium (Pd) or Copper (Cu) on... | 08/28/2007 |
| 7239002 | Integrated circuit device In a temperature sensor section of a semiconductor integrated circuit device, first vias of tungsten are formed at the topmost layer of a multi-layer wiring layer and pads of titanium are provided on regions of the multi-layer wiring layer which covers the vias. An ... | 07/03/2007 |
| 7238543 | Methods for marking a bare semiconductor die including applying a tape having energy-markable properties A method used for marking a semiconductor wafer or device. The method and apparatus have particular application to wafers or devices which have been subjected to a thinning process, including backgrinding in particular. The present method comprises reducing the cros... | 07/03/2007 |
| 7235886 | Chip-join process to reduce elongation mismatch between the adherents and semiconductor package made thereby A chip-join process to reduce elongation mismatch between the adherents involves thermally expanding each of a coefficient of thermal expansion mismatched semiconductor chip and substrate a substantially equal amount from their room temperature state in a direction ... | 06/26/2007 |
| 7232706 | Method of making a semiconductor chip assembly with a precision-formed metal pillar A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a pillar etch mask that extends into a trench, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects... | 06/19/2007 |
| 7232707 | Method of making a semiconductor chip assembly with an interlocked contact terminal A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a pillar etch mask that extends into a trench, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects... | 06/19/2007 |
| 7226654 | Laminated wiring board and its mounting structure A laminated wiring board comprising: a first wiring board forming wiring layers on the upper surface and on the lower surface of a first ceramic insulated substrate; and a second wiring board forming wiring layers ... | 06/05/2007 |
| 7225538 | Resilient contact structures formed and then attached to a substrate Contact structures exhibiting resilience or compliance are formed. The contact structures may be formed on a sacrificial substrate. The contact structures are attached to an array of electrical connections on a substrate to form a contact assembly. The electrical co... | 06/05/2007 |
| 7196000 | Method for manufacturing a wafer level chip scale package A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an emb... | 03/27/2007 |
| 7192997 | Encapsulant composition and electronic package utilizing same A composition for use in making an encapsulant usable in the encapsulation of a semiconductor chip assembled to a substrate with C4 solder interconnections therebetween, which in turn may form part of an electronic package. The composition comprises a resin, a flexi... | 03/20/2007 |
| 7190592 | Integrated library core for embedded passive components and method for forming electronic device thereon An integrated library core for embedded passive components and a method for forming an electronic device on the library core are provided. An insulating core layer is formed with a plurality of openings penetrating therethrough and with electrically conductive layer... | 03/13/2007 |
| 7190080 | Semiconductor chip assembly with embedded metal pillar A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line... | 03/13/2007 |
| 7180181 | Mesh shaped dam mounted on a substrate A substrate is provided for carrying at least a semiconductor device. The substrate mainly includes a carrier body, a plurality of contact pads, a solder mask and a plurality of dams of a mesh. The contact pads are disposed on a surface of the carrier body and each ... | 02/20/2007 |
| 7167375 | Populated printed wiring board and method of manufacture A populated printed wiring board (PWB) (100) and method of manufacturing the populated PWB are taught. The populated PWB is manufactured by fabricating a PWB (102, 402) with exposed copper pads (302), coating the copper pads with an organic sold... | 01/23/2007 |
| 7136269 | Inverted circuit overcurrent protection device and hybrid integrated circuit device with the same incorporated An inverter circuit overcurrent protection device in which an overcurrent detection resistor (Rs) is incorporated in a hybrid integrated circuit, in which a detection voltage from the overcurrent detection resistor (Rs) is divided by voltage dividing resistors (R | 11/14/2006 |
| 7132741 | Semiconductor chip assembly with carved bumped terminal A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a metal filler, a connection joint that electrically connects the routing line and the pad, and an enca... | 11/07/2006 |
| 7129575 | Semiconductor chip assembly with bumped metal pillar A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an enca... | 10/31/2006 |
| 7129113 | Method of making a three-dimensional stacked semiconductor package with a metal pillar in an encapsulant aperture A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar... | 10/31/2006 |
| 7119433 | Packaging for enhanced thermal and structural performance of electronic chip modules In an integrated circuit packaging structure, such as in a SCM, DCM, or MCM, a method and apparatus for increasing heat spreader size and thus thermal performance is disclosed. The packaging structure includes a first substrate; an electronic device operably coupled... | 10/10/2006 |
| 7112521 | Method of making a semiconductor chip assembly with a bumped metal pillar A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a bumped terminal, then mechanically attaching a semiconductor chip to the metal base, the routing line and the bumped terminal, then forming an encapsulant, and the... | 09/26/2006 |
| 7094618 | Methods for marking a packaged semiconductor die including applying tape and subsequently marking the tape The present invention provides a method and apparatus for marking a semiconductor wafer or device. The method and apparatus have particular application to wafers or devices which have been subjected to a thinning process, including backgrinding in particular. The pr... | 08/22/2006 |
| 7094676 | Semiconductor chip assembly with embedded metal pillar A method of making a semiconductor chip assembly includes forming a routing line on a metal base, etching the metal base wherein an unetched portion of the metal base forms a pillar, mechanically attaching a semiconductor chip to the routing line and the pillar wher... | 08/22/2006 |
