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| Number | Title | Issue Date |
| 8102471 | H-sync phase locked loop device and method for a TV video signal A H-sync phase locked loop device for TV video signal is provided herein. After the TV video signal is digitalized, clamping and slicing operations are performed on the digitalized TV video signal to respectively generate a clamped signal and a sliced signal. Accord... | 01/24/2012 |
| 8068177 | Methods and devices for signal synchronization A signal synchronization device and signal synchronization method are provided. The method comprises determining whether a receiving device can receive data output from an output device synchronously and adjusting the dummy period of the signal, which will be receiv... | 11/29/2011 |
| 7697067 | Digital video processing systems and methods for estimating horizontal sync in digital video signals Video signal processing systems and methods for detecting horizontal synchronization signals within video signals. Digital filtering methods are implemented for processing analog video signals to determine time varying characteristics of video signals to detect the ... | 04/13/2010 |
| 7443450 | Sync processor of flat panel display for determining signal safety on the basis of HSYNC/VSYNC signal generated according to data enable signal In a sync processor for determining safety of signals on the basis of a horizontal/vertical sync signal generated according to a data enable signal, the sync processor includes a digital horizontal/vertical signal generator, a selector, a digital horizontal/vertical... | 10/28/2008 |
| 7432980 | Method for reducing analog PLL jitter in video application The present invention provides a method for reducing analog PLL (Phase-lock loop) jitter in video ADC application. The HSync/CSync is replaced with a faked HSync signal to be inputted to PLL during vertical blank period. Therefore the analog PLL will only see the fa... | 10/07/2008 |
| 7362303 | Device and method of driving light source in display devices A device for driving a light source in an image display device includes input terminals to receive a horizontal synchronization signal and a control signal, an oscillator to generate a reference signal having a frequency, a controller to modulate the reference signa... | 04/22/2008 |
| 7345714 | Video signal clamp A circuit and method for clamping a composite video component signal at the video black level by using horizontal synchronization timing information contained within the signal and clamping the signal during a time interval in which it is at the desired black level.... | 03/18/2008 |
| 7321398 | Digital windowing for video sync separation A processing circuit for a sync signal includes a trial circuit and a windowing circuit. The trial circuit includes a counter that generates a count value proportional to the duration between successive sync pulses. When the count value reaches a trial sync spacing ... | 01/22/2008 |
| 7312793 | Liquid crystal display controller In a liquid crystal television, a display controller prevents burning of a liquid crystal panel due to irregularity in a synchronization signal. A counter of a liquid crystal display controller detects a period of a horizontal synchronization signal and a vertical s... | 12/25/2007 |
| 7295248 | External synchronous signal generating circuit and phase difference measuring circuit An external synchronous signal circuit comprises: means for measuring a phase difference between the external frame synchronous signal (FRM_SYNC) and the frame synchronous signal (FRM) of the digital video signal; means for generating a signal (EXT_H) having the sam... | 11/13/2007 |
| 7271843 | Method and apparatus for analyzing a digitally converted analogue signal A method for obtaining line synchronization information items from a video signal is proposed. The inventive method is based on convolving the relevant part of an analogue video line signal with a pattern function. The result of the convolution operation is further ... | 09/18/2007 |
| 7212193 | Method and circuit for driving display, and portable electronic device A method for driving a display is provided which is capable of reducing current consumption. In the method above, a scanning frequency in a self-emissive display is changed based on a display content to be displayed in the self-emissive display. ... | 05/01/2007 |
| 7209135 | Image display apparatus The invention provides an image display apparatus that efficiently adjusts a video display even when a change takes place in an input signal. The image display apparatus includes a video input device that receives a video signal, a video display that displays an opt... | 04/24/2007 |
| 7196736 | Method of YC separation of YC separation filter A YC separation filter of 3-dimensional YC separation for separating a luminance signal and a chromatic signal adaptively to motion of picture image. The YC Separation filter controls frame delay operation of an input composite video signal per clock period based on... | 03/27/2007 |
| 7197659 | Global I/O timing adjustment using calibrated delay elements A method transfers a signal from a transmitting device to a receiving device. The signal is output from the transmitting device using a driving circuit. A reference clock signal is received in the transmitting device. An output clock signal is generated according to... | 03/27/2007 |
| 7184096 | Method and circuit for providing a horizontal scan signal for a television set A method for providing a horizontal scan control signal for a TV set from a horizontal synchronization signal contained in a composite video signal, the horizontal synchronization signal containing horizontal synchronization pulses and parasitic pulses, the scan con... | 02/27/2007 |
| 7180550 | Video reproducing apparatus and method and apparatus and method for adjusting horizontal synchronous signal A video signal reproducing apparatus and method for adjusting a change in a horizontal synchronous signal. The video signal reproducing apparatus transforms a format of an input video signal, generates horizontal and vertical synchronous signals, and displays the vi... | 02/20/2007 |
| 7173668 | Equilibrium based horizontal sync detector for video decoder The present invention discloses a horizontal sync detector circuit (10) comprising a filter portion (12), an equilibrium accumulator portion (14) coupled to the filter portion (12), a horizontal sync detector portion (16) coupled t... | 02/06/2007 |
| 7173670 | Device and method to detect video format based on a cyclical period of a horizontal synchronizing signal Device and method for processing a signal to a display, the device including a horizontal synchronizing signal detecting part for detecting a horizontal synchronizing signal from a picture signal, and a mode determining part for determining a mode of the picture sig... | 02/06/2007 |
| 7148909 | Image display system capable of displaying and scaling images on plurality of image sources and display control method therefor A multiple image display system includes a selection portion to select areas on a screen of a display portion at which input images are to be displayed, detection portions disposed at least at three different points to detect locations of the areas on the screen, an... | 12/12/2006 |
| 7126645 | Back-porch clamp The invention teaches a method, means and apparatus for clamping a back porch interval of a video signal including clamping a sync-tip level of said video signal to a variable reference voltage, comparing a back-porch voltage level of the sync-tip clamped video sign... | 10/24/2006 |
| 7102654 | Driving circuit A driving circuit of this invention has a comparator that compares an input signal with a sampling signal to perform a pulse width modulation to the input signal, a driving transistor circuit that switches according to an output signal of the comparator, and a filte... | 09/05/2006 |
| 7102398 | Circuit for two PLLs for horizontal deflection A circuit for horizontal deflection includes a first PLL circuit that is arranged to provide a first PLL output signal, and a second PLL circuit that is arranged to provide a second PLL output signal. A first PLL circuit is arranged to provide equalizing pulse remov... | 09/05/2006 |
| 7098961 | Horizontal sync pulse detection for video signal decoding Methods and systems are described for determining a slice level used for detecting an edge of a horizontal sync pulse of a horizontal line of a video signal, where the horizontal line has a plurality of samples. An exemplary method comprises low-pass filtering the v... | 08/29/2006 |
| 7091996 | Method and apparatus for automatic clock synchronization of an analog signal to a digital display A method and apparatus for estimating a true horizontal resolution by determining a temporal spacing of a cumulated sum pattern of a detected rising feature edge. If the temporal spacing is approximately equal to n (which is a positive, non-zero integer, and is equa... | 08/15/2006 |
| 7088392 | Digital image system and method for implementing an adaptive demosaicing method An adaptive demosaicing method interpolates images based on color edge detection and neighborhood voting. The adaptive demosaicing algorithm uses a voting scheme to determine the direction of interpolation at each missing luminance pixel location. Each color plane v... | 08/08/2006 |
| 7084670 | Phase-frequency detector with gated reference clock input A gated phase-frequency detector circuit includes a phase-frequency detector and a multiplexer circuit. The phase-frequency detector is arranged to provide UP and DOWN signals responsive to a reference clock signal and a feedback signal. Further, the phase-frequency... | 08/01/2006 |
| 7078947 | Phase-locked loop having a spread spectrum clock generator The phase-looked loop having spread spectrum clock generator of this invention comprises a phase-locked loop and a spread spectrum clock generator. The input signal of the phase-locked loop comes from a reference clock source. The output of the phase-locked loop is ... | 07/18/2006 |
| 7050111 | Process and device for synchronizing a reference signal with respect to a video signal A synchronization process may include detecting successive horizontal synchronization pulses of a video signal, and a phase comparison between the successive detected pulses and the successive transitions of the reference signal for controlling the oscillator of the... | 05/23/2006 |
| 7051287 | Display device with frame reduction, display control method thereof, and storage medium Four windows A, B, C, and D are displayed on the display screen. Of the four windows displayed on the display screen, an active window which is currently being accessed is A, and other windows, i.e., windows B, C, and D, are inactive windows. The inactive windows ar... | 05/23/2006 |
| 6977692 | Alternative video sync detector A circuit for generating video synchronization timing signals includes a negative peak detector (FIG. 5) for following variations of a composite video signal (FIG. 1), rather than clamping the most negative voltage of the composite video signal. The ne... | 12/20/2005 |
| 6970151 | Display controller with spread-spectrum timing to minimize electromagnetic emissions A display system is provided that reduces electromagnetic emissions of at least one frequency component of a signal in the display system. A signal that drives a display is modulated so that one or more frequency components of the driving signal are attenuated due t... | 11/29/2005 |
| 6965660 | Digital phase-locked loop A digital phase-locked loop is provided having a minimal transient recovery time for emitting an output clock signal which is synchronous with a reference clock signal in a normal operating state of the digital phase-locked loop. The phase-locked loop can include a ... | 11/15/2005 |
| 6958771 | Image processing apparatus working in response to frequency diffused clock as reference input image signals A system clock generation module varies an oscillation frequency and outputs a frequency diffused clock as a system clock. A synchronizing signal measurement module measures a synchronizing signal characteristic value, which includes at least a synchronizing signal ... | 10/25/2005 |
| 6956419 | Fail-safe zero delay buffer with automatic internal reference An apparatus comprising a first circuit and a second circuit. The first circuit may comprise a control circuit and an oscillator. The control circuit may be configured to generate a control signal in response to a first reference signal and a second reference signal... | 10/18/2005 |
| 6956618 | Apparatus and method for processing image, and an image processing program An image processing apparatus, which displays an image corresponding to a synchronizing frequency change-image signal, which is obtained by changing a frequency of a synchronizing signal of an image signal, and an other image corresponding to an other image signal o... | 10/18/2005 |
| 6947060 | Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method An image forming apparatus which performs pulsewidth modulation with a pulsewidth set by counting a clock. Especially, for grayscale level correction by setting the frequency of the clock, the periodic clock is counted, and an output pattern is changed in accordance... | 09/20/2005 |
| 6943828 | Method and apparatus for providing adaptive horizontal sync detection A method and apparatus for providing adaptive horizontal synchronization (sync) signal detection to identify whether a high quality television signal is being received by a television set. The method determines whether no signal is applied, whether a weak signal is ... | 09/13/2005 |
| 6937073 | Frequency multiplier with phase comparator A phase comparison of timing signals is made by combinational circuitry which receives the timing signals and a window signal, the window signal identifying edges of the timing signals to be compared. The comparison may result in a charge pumped output which can be ... | 08/30/2005 |
| 6922188 | Method and apparatus for auto-generation of horizontal synchronization of an analog signal to a digital display A method of automatic generation of horizontal synchronization of an analog signal to a digital display is described. Accordingly, a number of features are found and for each of a range of test Htotal values, a pixel co-ordinate value for each of the found features ... | 07/26/2005 |
