Famous Patents
The first match was accidentally discovered in 1826 when John Walker scraped a stick with chemicals on the end against a stone floor.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8144249 | Multi-slicing horizontal synchronization signal generating apparatus and method A multi-slicing horizontal synchronization signal generating apparatus and method is provided. The apparatus includes a slicer, a numerically controlled oscillator (NCO), a first phase detector, a second phase detector and a calibration circuit. The slicer performs ... | 03/27/2012 |
| 8040435 | Apparatus for detecting synchronization A synchronization detecting apparatus includes a counter, an error detector, and a line length generator. The counter counts to a predetermined counter value in response to a clock signal. The error detector generates an error, which is the difference between a curr... | 10/18/2011 |
| RE40411 | Synchronizing signal separating apparatus and method This invention is a method and apparatus for identifying and separating the synchronizing signal component of video like signals by identifying or detecting the arrangement or sequence of the known occurances of events or patterns of the sync. The invention also pro... | 07/01/2008 |
| 7382413 | Apparatus and method of extracting sync signal from analog composite video signal An apparatus and method of extracting a sync signal from an analog composite video signal includes a controller to decide whether a horizontal sync signal in the analog composite video signal is a distorted abnormal signal, and extracts the horizontal sync signal fr... | 06/03/2008 |
| 7359288 | Method and apparatus for automatically displaying a correct time and date when initially activating a clock Method and apparatus for automatically displaying a correct time and date when initially activating a clock. After manufacture of the clock and before it is purchased by the user, a basic data set, including the time and geographical region data, are input to the cl... | 04/15/2008 |
| 7342984 | Counting clock cycles over the duration of a first character and using a remainder value to determine when to sample a bit of a second character In an auto baud system and method, the baud rates between two communicating devices are synchronized by timing the transmission of a plurality of bits by counting the cycles of a reference clock. The number of cycles counted is then divided by the number of bits cou... | 03/11/2008 |
| 7321637 | Data slice control device and control method A data slice control device comprises a monotone increase detection circuit for detecting a monotone increase point of a data signal, a monotone decrease detection circuit for detecting a monotone decrease point of the data signal, a counter for calculating a monoto... | 01/22/2008 |
| 7268825 | Digital synchronizing generator A sync generator (genlock) (10) for frequency and phase locking an incoming video signal to a system clock (12) includes a digitizer (16, 22) for digitizing the incoming video signal to yield a digitized color sub-carrier burst component. A nume... | 09/11/2007 |
| 7259482 | Distance extender and method making use of same A distance extender (100, 200) for increasing a distance between a first device (145) and a second device (150) in electrical communication with the first device includes an electrical cable (130, 230) electrically coupled between the fir... | 08/21/2007 |
| 7239355 | Method of frame synchronization when scaling video and video scaling apparatus thereof A video scaling apparatus includes a receiver for receiving incoming video signals having transmitted therein a plurality of incoming frames, each incoming frame having a first plurality of synchronization signals for indicating lines in the incoming frame; a scaler... | 07/03/2007 |
| 7215379 | Alternative video sync detector A circuit for generating video synchronization timing signals includes a negative peak detector (FIG. 5) for following variations of a composite video signal (FIG. 1), rather than clamping the most negative voltage of the composite video signal. The ne... | 05/08/2007 |
| 7199834 | Vertical synchronizing signal generation apparatus and video signal processing apparatus The vertical sync signal generator includes: a vertical sync signal separation circuit for separating a vertical sync signal of an input luminance signal and outputting the separated signal as a first vertical sync signal; an automatic frequency control circuit for ... | 04/03/2007 |
| 7193657 | Video signal processing apparatus and integrated circuit Disclosed is a video signal processing apparatus comprising a plurality of line memories to which in sequence input video signal data is written on a line-by-line basis; a timing controller for controlling a timing to write video signal data to the plurality of line... | 03/20/2007 |
| 7139040 | Method to correct non-periodic index event time-of-arrival data in a synchronization system A system and method for correcting non-periodic event time of arrival data in a control system. The system and methods are particularly applicable to the speed and phase control of a color wheel used with spatial light modulators. The circuitry automatically and acc... | 11/21/2006 |
| 7131022 | Timing generator system for outputting clock signals to components of an imaging system according to decoded timing control instructions A timing generator comprising a programmable program memory that is arranged to comprise program instructions for controlling the generation of timing signals, a timing generator controller for processing the program instructions from the program memory, and an outp... | 10/31/2006 |
| 7126402 | Signal generation apparatus for supplying timing signal to solid state device A timing generator capable of improving design efficiency by facilitating adaptation to change in design. The timing generator has work area 9 which outputs parameters in response to control data, and main core 12 to which the parameters are inputted. ... | 10/24/2006 |
| 7123252 | Liquid crystal display device with multi-timing controller A liquid crystal display device with a multi-timing controller that generates a timing signal according to an individual display standard from a control signal according to various display standards to drive the liquid crystal display device. In the device, a liquid... | 10/17/2006 |
| 7061540 | Programmable display timing generator A display timing generator is provided for selecting line types and providing synchronization timing signals for video signals. The display timing generator provides programmability for the user to select line types for a frame to be displayed on a display. The line... | 06/13/2006 |
| 7061286 | Synchronization between low frequency and high frequency digital signals A synchronization circuit for synchronizing low frequency digital circuitry and high frequency digital circuitry. The synchronization circuit produces an ordered series of clocks from the high-frequency digital clock. The clocks have a deterministic time relationshi... | 06/13/2006 |
| 7050097 | Method and apparatus for the display of still images from image files An apparatus for displaying digital image files on a standard display device such as a television set is provided in the form of a set-top box. The box includes an integrated circuit and memory buffer for computing an image from a file, a second memory buffer for st... | 05/23/2006 |
| 7034722 | ADC calibration to accommodate temperature variation using vertical blanking interrupts In digital display circuitry, configured to display an image encoded in an analog display signal, the digital display circuitry includes analog-to-digital converter (ADC) circuitry to recover pixel data elements of the image. During vertical blanking intervals of th... | 04/25/2006 |
| 7032121 | System for deriving desired output frequency by successively dividing clock signal frequency by ratios obtained by dividing clock signal frequency by common divisor and specific integer A signal is generated by providing a clock signal having a frequency (fosc). The clock frequency fosc is arithmetically divided by an output frequency (fo) associated with the signal to obtain a ratio R and a remainder given by x/y. ... | 04/18/2006 |
| 7028270 | Apparatus and method for reset distribution A skew-tolerant, glitch-free reset distribution apparatus and method are provided in an intellectual property (IP) block that supports a multi-channel input/output protocol. During reset mode, synchronizers are used to create more predictable timing, to pipeline the... | 04/11/2006 |
| 7002634 | Apparatus and method for generating clock signal A clock generating apparatus is provided for producing an output clock signal responsive to a source clock signal with a source frequency and a reference clock signal with a reference frequency. The clock generating apparatus includes a counting sequence generator, ... | 02/21/2006 |
| 6993868 | Adjustable tree stand An adjustable tree stand for holding a tree trunk to position a tree in a substantially vertical position, the tree stand comprised of a generally cylindrical-shaped base member having a top end and a bottom end, the bottom end adapted to be supported by a floor, a ... | 02/07/2006 |
| 6947060 | Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method An image forming apparatus which performs pulsewidth modulation with a pulsewidth set by counting a clock. Especially, for grayscale level correction by setting the frequency of the clock, the periodic clock is counted, and an output pattern is changed in accordance... | 09/20/2005 |
| 6937290 | Method and apparatus using the Bresenham algorithm to synthesize a composite SYNC signal A method and circuit for generating a train of synthesized sync pulses in accordance with the Bresenham algorithm in response to an input clock having frequency Fi, such that the leading edges of the pulses occur at least nearly periodically, with time-av... | 08/30/2005 |
| 6917577 | Method for determining position of optic pick-up head and device of the same A method for determining the position of an optic pick-up head and the device of the same are disclosed. The number of frames in certain section of the disk are used to determine the position of the optic pick-up head. The number of frames in inner section of the co... | 07/12/2005 |
| 6891572 | Video signal conversion processing apparatus and method A signal processing apparatus and method for up or down conversion of an interlace signal with a high degree of accuracy. The frequency of a write system clock supplied from a PLL circuit is divided by N by a dividing circuit and then multiplied by M by a multiplyin... | 05/10/2005 |
| 6873366 | Timing generator for solid-state imaging device To reduce the amount of data that should be stored on a memory-built-in timing generator for generating timing pulses for use to drive a solid-state imaging device, V- and H-counters, three ROMs, V- and H-comparators and combinatorial logic circuit are provided. The... | 03/29/2005 |
| 6856358 | Phase-increase induced backporch decrease (PIBD) phase recovery method for video signal processing A method to generate an optimum phase shifted sampling clock for sampling a synchronized video signal A(t) having a synchronization signal SYNC pulse is achieved. The method comprises, first, generating a sampling clock having a first edge aligned with a trailing ed... | 02/15/2005 |
| 6847409 | Video switching detecting circuit The object of the invention is to provide a video switchover detection circuit that reduces the circuit scale and allows high-accuracy detection with a smaller-scale configuration. According to the invention, the video switchover detection circuit comprises a... | 01/25/2005 |
| 6831624 | Time sequentially scanned display A time sequentially scanned display comprises a matrix 20 of picture elements 21. Each of the picture elements comprises a display element 9, for instance of liquid crystal type. An addressable latch 3 has a plurality of storage locations... | 12/14/2004 |
| 6829304 | Method for clock recovery in MPEG systems A method for clock recovery comprises a series of steps to be performed in a decoder to adaptively estimate the ratio P/S of the frequency of an encoder system time clock and the frequency of a decoder. The steps include performing a series of overlapping trials N w... | 12/07/2004 |
| 6765624 | Simulated burst gate signal and video synchronization key for use in video decoding A simulated burst gate signal and a video synchronization key are generated. A video decoder generates a horizontal sync pulse which is programmed to envelop a color burst, thereby simulating a burst gate signal. The offset to the horizontal sync pulse due to simula... | 07/20/2004 |
| 6765620 | Synchronous signal generation circuit and synchronous signal generation method A first counter counts a first clock signal repeatedly in accordance with an external synchronous signal. A second counter counts a second clock signal repeatedly in every predetermined cycle, and generates an internal synchronous signal having the predetermined cyc... | 07/20/2004 |
| 6727956 | Sync signal generator circuit for generating stable period sync signals A sync signal generator circuit including a first counter which is reset each time it detects a reference edge of the input sync signal, a first register for holding a first value immediately before the first counter is reset, a reset signal generator for generating... | 04/27/2004 |
| 6614487 | Apparatus and method for detecting synchronizing signal of digital TV An apparatus and method for detecting a synchronizing signal in a digital TV receiver which adopts a VSB mode is disclosed. The apparatus includes a correlation unit for obtaining a correlation value between a received signal for each unit of symbols and ... | 09/02/2003 |
| 6597403 | System for generating horizontal synchronizing signal compatible with multi-scan There can be solved a problem in which a lock range is narrowed by using an oscillator such as a ceramic having a high Q and a horizontal deflection frequency generating system compatible with all horizontal deflection frequencies of a variety of televisi... | 07/22/2003 |
| 6559891 | Method and apparatus to generate tri-level HDTV synchronization pulses An ITU-R BT.656 (or similar) digital video signal is converted to analog at which point a simple 7-state state machine in combination with a 6 bit binary counter generates tri-level synchronized video. The state machine receives vertical and horizontal sy... | 05/06/2003 |
