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| Number | Title | Issue Date |
| 8045057 | Synchronization detector of video signal processor and synchronization selector including the synchronization detector A synchronization detector of a video signal processor includes a line buffer, a parameter extraction unit and synchronization detection unit. The line buffer sequentially stores a digital video signal corresponding to an input analog video signal, line by line of t... | 10/25/2011 |
| 7391416 | Fine tuning a sampling clock of analog signals having digital information for optimal digital display Method and system for fine tuning frequency and phase of a sampling clock of analog signals (R, G, B) having digital information, for sampling the analog signals within an optimal sampling period, enabling optimal display by a digital display device (92). Sma... | 06/24/2008 |
| 7379654 | Programmable video recorder backing store for non-byte stream formats The buffer of a programmable video recorder includes a backing store having a plurality of discrete temporary files that are configured to store non-byte streamed data, such as ASF data. The data stream includes a number of data samples that are each assigned a time... | 05/27/2008 |
| 7367042 | Method and apparatus for hyperlinking in a television broadcast A system and method of adding hyperlinked information to a television broadcast. The broadcast material is analyzed and one or more regions within a frame are identified. Additional information can be associated with a region, and can be transmitted in encoded form,... | 04/29/2008 |
| 7359005 | Method and system for component sync detection and alignment In a method and system for component sync detection and alignment, the Y/G channel is used as a master channel from which the vertical and the horizontal syncs are detected by a master sync generator. The master sync generator determines a fast and slow slice level ... | 04/15/2008 |
| 7349027 | Scan converter The scan converter comprises first and second memories 3, 7, a frame memory 5; having a write period and a read period, a video data input circuit 2 for writing data at a first transfer rate into the memory 3, a video data output circuit ... | 03/25/2008 |
| 7346107 | VSB transmission system for processing supplemental transmission data A VSB communication system or transmitter for processing supplemental data packets with MPEG-II data packets includes a VSB supplemental data processor and a VSB transmission system. The VSB supplemental data processor includes a Reed-Solomon coder for coding the su... | 03/18/2008 |
| 7333576 | Digital demodulation device and synchronization detecting method A synchronization error occurs when a DTV signal is distorted on a transmission path and this deteriorates demodulation capability. The digital demodulation device and the synchronization detecting method of the invention can correct the synchronization position whe... | 02/19/2008 |
| 7333150 | Method, system, and program product for eliminating error contribution from production switchers with internal DVEs Measurement of the relative timing between images and associated information, for example video and audio. Image mutual event characteristics are recognized in the images and associated mutual event characteristics are recognized in the associated information. The i... | 02/19/2008 |
| 7317465 | Image display system and method A method of displaying an image may include receiving image data for the image, and defining first and second sub-frames of the image. The first and second sub-frames may have corresponding pluralities of image elements, with each image element of the second sub-fra... | 01/08/2008 |
| 7310117 | Video signal format secondary-conversion method, time code signal transmission method, and time code transmitting apparatus When a time code signal corresponding to an image signal, to which a format conversion changing the number of frames per second is executed, is transmitted, information indicating a frame position where image data is changed through the format conversion in the imag... | 12/18/2007 |
| 7249367 | Method and apparatus for switching between multiple programs by interacting with a hyperlinked television broadcast A system and method of adding hyperlinked information to a television broadcast. The broadcast material is analyzed and one or more regions within a frame are identified. Additional information can be associated with a region, and can be transmitted in encoded form,... | 07/24/2007 |
| 7230651 | A/V decoder having a clocking scheme that is independent of input data streams Devices and methods are disclosed for decoding data in a data stream. One embodiment relates to a method of decoding data using an A/V decoder. In this embodiment, timing information is recovered from the input stream. The output rate of an output stream is adjusted... | 06/12/2007 |
| 7227584 | Video signal processing system A video signal processing system for processing a video data VIN and graphic data DμP includes a filter unit, which receives the video data VIN. The filter unit filters the video data VIN to convert the video data VI... | 06/05/2007 |
| 7227582 | Graphics display system with video synchronization feature A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. The system includes a video decoder having a chroma-... | 06/05/2007 |
| 7212247 | Audio/video system providing variable delay An audio/video system (100) is capable of introducing variable amounts of delay into a signal path so as to properly synchronize two signals, such a video signal and a corresponding audio signal. According to an exemplary embodiment, the audio/video system ( | 05/01/2007 |
| 7209178 | Optical transfer system having a transmitter and a receiver An optical transfer system having a transmitter and a receiver converts an externally-applied video signal into an optical signal and restores the optical signal to the original video signal The system includes a video controller, a transmitter, a transmission photo... | 04/24/2007 |
| 7183961 | System for converting analog video signals to digital video signals A system for converting analog video signals to digital video signals receives an analog video signal that generates a reference horizontal synchronization signal. A phase-locked loop receives the reference horizontal synchronization signal and generates a pixel clo... | 02/27/2007 |
| 7139037 | Circle correction in digital low-pass filter A filter circuit is provided which has a filtered input and an unfiltered input. The filtered input passes through delay elements to coefficient circuitry. The unfiltered input passes to the coefficient circuitry without passing through the delay elements. In this m... | 11/21/2006 |
| 7120924 | Method and apparatus for receiving a hyperlinked television broadcast A system and method of receiving information hyperlinked to a television broadcast. The broadcast material is analyzed and one or more regions within a frame are identified. Additional information can be associated with a region, and can be transmitted in encoded fo... | 10/10/2006 |
| 7116894 | System and method for digital multimedia stream conversion A method for converting a program stream to a transport stream is described comprising: reading program stream packets from a digital versatile disk (“DVD”) based on user selections and navigation metadata contained on the DVD; extracting audio and video content... | 10/03/2006 |
| 7117517 | Method and apparatus for generating data structures for a hyperlinked television broadcast A system and method of adding hyperlinked information to a television broadcast. The broadcast material is analyzed and one or more regions within a frame are identified. Additional information can be associated with a region, and can be transmitted in encoded form,... | 10/03/2006 |
| 7095446 | Method and device for phase correction of a vertically distorted digital image A device for correcting the phase of a vertically distorted digital picture receives picture data and a vertical phase correction signal, and assigns lines of the digital picture to a first half picture and to a second half picture. The lines of the second half pict... | 08/22/2006 |
| 7034811 | Image display system and method A method of displaying an image with a display device including a plurality of display pixels includes receiving image data for the image, the image data including individual pixels of the image; buffering the image data and creating a frame of the image, the frame ... | 04/25/2006 |
| 7034840 | Method for an image reducing processing circuit A method for an image reducing processing circuit includes the memory architecture of two FIFO units. The method includes the following steps of: providing an input processing unit receiving original image data and delivering the image data; providing a horizontal d... | 04/25/2006 |
| 7030931 | Video serializer/deserializer with embedded audio support An auto-configurable video deserializer with embedded audio support includes a video core, a clock generator and an audio core. The video core receives a serial video signal of an unknown video standard, converts the serial video signal into a parallel video signal,... | 04/18/2006 |
| 7030930 | System for digitized audio stream synchronization and method thereof A system and methods are provided for presenting processed audio data and processed video data to corresponding outputs in a synchronized manner. Video and audio data from a multimedia stream are received by a processing system. The video data is processed through a... | 04/18/2006 |
| 7020894 | Video and audio synchronization In order to synchronise video and audio signals, a video test signal and an audio test signal are generated at the transmitting end of a transmission link, and transmitted over the link. The video test signal has first and second active picture periods of contrastin... | 03/28/2006 |
| 7019788 | Video mixer apparatus Video picture signals are received via at least three channels. At least three control instructing operators are provided in correspondence with the channels. Each control instructing operator is operable to give a signal control instruction for the corresponding ch... | 03/28/2006 |
| 6977677 | Imaging apparatus with video data transmission A communication circuit transmits the digital video signal to a transmission line and receives a clock signal and timing data transmitted through the transmission line. The timing data indicates a communication timing. A timing signal generation circuit generates ti... | 12/20/2005 |
| 6975365 | Image processing method and image processing apparatus Disclosed is an image processing method and an image processing apparatus that improve quality of display images in different formats of a multi-format data broadcast image. The image processing method according to the present invention comprises the steps of: separ... | 12/13/2005 |
| 6972804 | Image processing method and image processing apparatus Disclosed is an image processing method and an image processing apparatus that improve quality of display images in different formats of a multi-format data broadcast image. The image processing method according to the present invention comprises the steps of: separ... | 12/06/2005 |
| 6963949 | Pipelined packet-oriented memory system having a unidirectional command and address bus and a bidirectional data bus A memory system having at least one memory subsystem and using a packet protocol communicated over a command and address bus and at least one data bus. The memory subsystems are pipelined to achieve wide data paths and to support a high number of memory devices, suc... | 11/08/2005 |
| 6958780 | Image displaying and controlling apparatus and method A image displaying and controlling apparatus for displaying a computer graphics image in square-shaped pixels in an MPEG2 image format in rectangular-shaped pixels at a regular roundness. A graphics processor block produces the data of 640×480 pixels, two-line data... | 10/25/2005 |
| 6950144 | Apparatus and method of controlling image display An apparatus and a method of controlling image display in an image display apparatus having a panel and wherein an image output is synchronized to a frame synchronization signal of an input signal. The method includes determining whether or not an input synchronizat... | 09/27/2005 |
| 6947060 | Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method An image forming apparatus which performs pulsewidth modulation with a pulsewidth set by counting a clock. Especially, for grayscale level correction by setting the frequency of the clock, the periodic clock is counted, and an output pattern is changed in accordance... | 09/20/2005 |
| 6928038 | Circuit for protecting synchronizing patterns A circuit in an optical read/write device for protecting synchronizing patterns is proposed. The protection circuit utilizes a clock with constant frequency as a reference clock. The circuit for protecting synchronizing patterns of this present invention includes a ... | 08/09/2005 |
| 6917388 | Video signal processing device for automatically adjusting phase of sampling clocks In a video signal processing device, an input video signal VO representing a test pattern having two gradations of black and white is converted to 8-bit data by an A/D converter 4 in synchronism with sampling clocks generated in a write-in control circuit ... | 07/12/2005 |
| 6912011 | Method and system for measuring audio and video synchronization error of audio/video encoder system and analyzing tool thereof A method for measuring audio and video synchronization error of an audio/video encoder system is provided. The method includes steps of: producing a reference video data having a first time length and including a particular image pattern and a reference audio data h... | 06/28/2005 |
| 6909624 | Semiconductor memory device and test method thereof In recent system LSIs, a plurality of RAMs differing in capacity and in bit width have come to be mounted on a single chip according to the needs on the system side. However, when testing the plurality of RAMs, if the RAMs differ in capacity, they cannot be tested u... | 06/21/2005 |
