...that the first rickshaw was invented in 1869 by an American Baptist minister, the Rev. E. Jonathan Scobie, to transport his invalid wife around the streets of Yokohama?
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7483033 | Storage device A storage device comprises a plurality of memory blocks each including a plurality of cells in correspondence with a data length of image data consisting of a plurality of pixel data, wherein a specific number of cells are simultaneously selected in order to commonl... | 01/27/2009 |
| 7379609 | Image processing apparatus and method for conversion between raster and block formats An image processing apparatus for converting image data between a raster format and a block format including an image data processor for providing the image data including a luminance component and at least one chrominance component in the raster format, at least tw... | 05/27/2008 |
| 7372472 | Method and apparatus for graphically defining a video particle explosion effect A software library using a 3D graphics engine to produce a real time 3D particle explosion effect is provided. The particle explosion effect creation tool allows users to create their own particle explosion effect by defining their own shapes in a graphics image dat... | 05/13/2008 |
| 7369173 | Image processing apparatus and control method therefor An input library and input attribute corresponding to input processing for image data from each of a plurality of types of image input devices are stored in a ROM. The image input device connected to an image processing apparatus is designated with a keyboard. The i... | 05/06/2008 |
| 7355601 | System and method for transfer of data between processors using a locked set, head and tail pointers A CPU module includes a host element configured to perform a high-level host-related task, and one or more data-generating processing elements configured to perform a data-generating task associated with the high-level host-related task. Each data-generating process... | 04/08/2008 |
| 7236177 | Processing digital video data In general, the invention is directed toward a device for processing digital video data, such as an encoder, a decoder or an encoder/decoder (CODEC). The device makes use of an innovative architecture in which functionality is partitioned between an embedded process... | 06/26/2007 |
| 7231603 | Communication apparatus, communication system, video image display control method, storage medium and program A communication apparatus of the present invention has a function of displaying a plurality of video images on a same screen. The communication apparatus includes a first synthesizing unit with synthesizing video data transmitted from a remote communication terminal... | 06/12/2007 |
| 7187372 | Image data transmission apparatus and method for image display system An image display system comprises: a transmission device (PC) 10, for transmitting image data upon receiving a drawing command from an OS or an application; and a receiving monitor 40, for displaying, on a high-resolution panel 41, image data re... | 03/06/2007 |
| 7173629 | Image processor with the closed caption function and image processing method A memory control unit adjusts and sets the address of an image data area in the memory space of a memory and the address of a window area adjacent to the memory area, using a memory controller. The memory control unit stores data, other than image data that is suppl... | 02/06/2007 |
| 7158150 | Image wipe method and device An image wipe method includes the steps of defining at least a first reference point to divide a screen area into several sub-areas according to the first reference points, selecting at least one sub-area, and performing a first image process on the selected sub-are... | 01/02/2007 |
| 7136380 | Conditionally nonblocking switch of the compressor type Broadband switching including the implementation of and control over a massive sub-microsecond switching fabric. To effect the attributes of the switching fabric, conditionally nonblocking components are used a building-blocks in an interconnection network which is ... | 11/14/2006 |
| 7110004 | Image processor capable of edge enhancement in saturated region An image processing device includes a data zone expansion circuit and an image processing circuit. The data zone expansion circuit receives input data, increases a number of data bits of the input data, and provides data with the increased number of data bits. The i... | 09/19/2006 |
| 7103059 | Scalable 2-stage interconnections Modifications to the 2-stage interconnection to allow flexible scalability. Different switching fabrics having a range of different sizes can be constructed out of the same set of I/O switching nodes through this modified 2-statge interconnection, which can further ... | 09/05/2006 |
| 7095906 | Apparatus and method for alpha blending of digital images In the present invention, an apparatus and method for performing alpha blending calculations in a fast and efficient manner is disclosed. When implemented as an integrated circuit, the apparatus of the present invention occupies reduced area. The apparatus comprises... | 08/22/2006 |
| 7092585 | Method and apparatus for processing both static and moving images An image processing apparatus which is capable of displaying moving images with more actions for longer period of time. The apparatus is equipped with: an image data ROM 6 which stores a plurality of static image information and moving image information that ... | 08/15/2006 |
| 7079133 | Superscalar 3D graphics engine A method, apparatus and computer program product for parallel execution of primitives in 3D graphics engines. It includes detection and preservation of dependences between graphics primitives with the ability to execute multiple independent primitives concurrently w... | 07/18/2006 |
| 7072334 | Physical implementation of switching fabrics constructed from recursive 2-stage interconnection Physical implementation of the switching fabric of a massive broadband switching network constructed from recursive 2-stage interconnection. The recursive 2-stage construction is realized through a hierarchical levels of implementation, including inside-chip impleme... | 07/04/2006 |
| 7065074 | Generalized divide-and-conquer networks A generalized divide-and-conquer network and concomitant methodology for recursively constructing large-scaled switching fabrics to meet the need for present-day broadband switching. Such a network achieves optimal layout complexity among the class of banyan-type ne... | 06/20/2006 |
| 7027066 | Graphics plotting apparatus A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting a... | 04/11/2006 |
| 7023443 | Memory management apparatus and method for preventing image tearing in video reproducing system A memory management apparatus and method for protecting an image tearing in the video system. The memory management apparatus includes a scaler that converts the format of input image data into a suitable format to fit the resolution of a display, a first memory, in... | 04/04/2006 |
| 7009619 | Map display device, map display system, map display method, and map display program product In the present invention, map data managed in different formats in different geographic information systems is converted into raster data and subjected to various kinds of processing to produce raster layers for freer use of the map data, such as processing and edit... | 03/07/2006 |
| 6992664 | Graphics plotting apparatus A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting a... | 01/31/2006 |
| 6989825 | Display control device In order to reduce the power consumed by the circuit when the image data is transferred to a memory in a display means, a write region detecting means 8 is provided to detect the address region in the graphics memory 2 accessed for writing by the image... | 01/24/2006 |
| 6957373 | Address generator for generating addresses for testing a circuit An address generator is provided for generating addresses for testing an addressable circuit. The address generator can include a base address register for buffer-storing a base address. The base address register can be assigned an associated offset register group h... | 10/18/2005 |
| 6922195 | Image processing apparatus An image processing apparatus includes a memory circuit, one-line judging circuit, a write control circuit and a read control circuit. The memory circuit stores an input data in response to a write address and outputs an output data in response to a read address. Th... | 07/26/2005 |
| 6906756 | Display and video producing apparatus, and displaying method and video producing method A vertical region designation circuit 141 outputs a vertical region designation signal to a vertical driver 103 on the basis of vertical display position information, a vertical synchronization signal and a horizontal synchronization signal. A horizont... | 06/14/2005 |
| 6876400 | Apparatus and method for protecting a memory sharing signal control lines with other circuitry An apparatus such as a television signal receiver includes first and second circuit boards. The first circuit board includes a memory, and control circuitry for controlling at least one function of the apparatus. The second circuit board is operably coupled to the f... | 04/05/2005 |
| 6870578 | Apparatus and method for sharing signal control lines An apparatus such as a television signal receiver includes first and second circuit boards. The first circuit board includes a first device such as a memory, and control circuitry for controlling at least one function of the apparatus. The second circuit board is op... | 03/22/2005 |
| 6847410 | Picture data memory device with picture data input channels and picture data output channels A picture data memory device which can be used universally comprises a central picture data memory for storing picture data of a plurality of picture data input channels, in which case the stored picture data can additionally be read out via a plurality of picture d... | 01/25/2005 |
| 6833834 | Frame buffer organization and reordering A graphics system includes a frame buffer, a write address generator, and a pixel buffer. A burst of pixels received from the frame buffer may not be in display order. In one embodiment, a write address generator calculates a write address for each pixel in the burs... | 12/21/2004 |
| 6828976 | Method and apparatus for hardware acceleration of graphical fill in display systems Embodiments of the present invention are directed to a method and apparatus for hardware acceleration of graphical fill in display systems. In one embodiment, a bit-mask is maintained. The bit-mask, termed the “filled color bitmap”, has one bit for each pixel of... | 12/07/2004 |
| 6795062 | Screen driver with animation circuit A screen driver for a liquid crystal display screen includes an internal animation circuit for displacing data on a screen. The animation circuit also process data, such as modifying data between a source address and a destination address of a RAM memory. The RAM me... | 09/21/2004 |
| 6744476 | Imaging apparatus having video memory function Imaging apparatus having a video memory function includes a video memory having a plurality of read ports and a capacity of storing images in two fields or more, wherein CCD storage sensitivity enhancement means is connected to a write port; a write control circuit ... | 06/01/2004 |
| 6727905 | Image data processing apparatus An image data processing apparatus capable of performing processing at a high speed comprising a DRAM for storing display data including a plurality of first pixel data respectively indicating colors of a plurality of pixels arranged in a matrix and able to be simul... | 04/27/2004 |
| 6661422 | Video and graphics system with MPEG specific data transfer commands A video and graphics system includes a video decoding system for processing compressed video data. The compressed video data includes MPEG-2 video data containing SDTV video data or HDTV video data. The video decoding system includes a video decoder for p... | 12/09/2003 |
| 6462747 | Texture mapping system The present invention relates a texture mapping system which can access texture data in parallel. The texture mapping system includes: a memory controller; a main memory storing filtered texture images; a cache memory receiving data of the texture image f... | 10/08/2002 |
| 6392619 | Data transfer device and liquid crystal display device In a data transfer circuit, a hold signal generating circuit generates and outputs a hold signal Hold when transmission data is equal to transmission data one cycle before, and sets a 3-state output buffer for transmission data to high-impedance state, wh... | 05/21/2002 |
| 6300964 | Method and apparatus for storage retrieval of digital image data A method of digital image storage utilizing a number of image storage memories, utilizing separate and independent write and read controls to the storage memories, utilizing write masking to selectively write to the storage memories, utilizing full or par... | 10/09/2001 |
| 6300963 | Single-frame display memory for spatial light modulator A display memory (15) for a display system (10, 20) having a spatial light modulator (SLM) (16). The memory (15) receives data in pixel format and delivers the data to the SLM (16) in bit-plane format. The memory (15) avoids the need for double buffering ... | 10/09/2001 |
| 6069639 | Video camera system and semiconductor image memory circuit applied to it Digital image data are input to a graphic memory circuit (G), and digital data stored in said graphic memory circuit (G) are read out using a control circuit (H). The graphic memory (G) has a control signal generator (N) for outputting a control signal (W... | 05/30/2000 |