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An armor with rollers is provided that enables a user to move in all positions by rolling on a hard and smooth surface while constantly varying his bearing points on the ground.
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| Number | Title | Issue Date |
| 8085275 | System and method for low-overhead push buffer jumps A push buffer-related system, method and computer program product are provided. Initially, an entry is obtained from a buffer storage describing a size and location of a portion of a push buffer. To this end, the portion of the push buffer is capable of being retrie... | 12/27/2011 |
| 7800624 | Memory device signal processing apparatus image signal processing apparatus and methods of the same A memory device, a signal processing apparatus, and an image signal processing apparatus and signal processing methods configured to perform matching processing with a small amount of calculation and accurately detecting motion vectors, provided with a memory for co... | 09/21/2010 |
| 7528841 | Image transformation apparatus, image transformation circuit and image transformation method An image transformation apparatus is provided, which includes a modeling unit 5 that calculates the coordinates of vertices of each polygon and calculates a pre-filter coefficient corresponding to a reduction ratio at the position of a vertex of each polygon,... | 05/05/2009 |
| 7450131 | Memory layout for re-ordering instructions using pointers Embodiments include storing graphics instructions at addresses in a memory in an original order, and storing in the memory pointers associated with each instruction pointing to the addresses of the instructions in the original order. A first pointer associated with ... | 11/11/2008 |
| 7292235 | Controller driver and display apparatus using the same A control driver includes a display memory control section which generates a first process control signal when image data includes only first image data which has a pixel size equal to or smaller than that of a display section, and generates a second process control... | 11/06/2007 |
| 7259780 | Image sensor with designatable read-out range A compact, energy efficient image sensor which enables transfer of images to an external system is made compact in size and low in power consumption comprises an image sensor control circuit 20 which operates to drive a CCD image sensor 4 and stores ho... | 08/21/2007 |
| 7224369 | Image processing apparatus and method of same An image processing apparatus, able to improve the pixel fill rate and able to prevent an increase of memory resources and increase of memory access, provided with a color calculation circuit for performing pixel level processing based on supplied first attribute pa... | 05/29/2007 |
| 7210022 | Apparatus and method for interconnecting a processor to co-processors using a shared memory as the communication interface An apparatus and method for interfacing a processor to one or more co-processors provides a dual ported memory to be used as a message passing buffer between the processor and the co-processors. Both the processor and co-processors can connect asynchronously to the ... | 04/24/2007 |
| 7173629 | Image processor with the closed caption function and image processing method A memory control unit adjusts and sets the address of an image data area in the memory space of a memory and the address of a window area adjacent to the memory area, using a memory controller. The memory control unit stores data, other than image data that is suppl... | 02/06/2007 |
| 7164427 | Apparatus, method and system with a graphics-rendering engine having a time allocator A method, apparatus, and system to concurrently render independent images for display on one or more display devices. In an embodiment, a graphics-rendering engine concurrently renders independent images for display on multiple display devices. A time allocator arbi... | 01/16/2007 |
| 7154515 | Method and apparatus for reducing printing artifacts of stitched images A method and apparatus for eliminating artifacts in images formed using more than one image segment. A buffer region associated with two adjacent image segments is defined wherein the intensity levels of the pixels are attenuated. When image segments substantially o... | 12/26/2006 |
| 7154495 | Analog interface structures and methods for digital displays Structures and methods are provided for generating a digital display signal from an analog signal that is limited to 2N discrete analog levels and from a synchronization signal that defines spatial order for the digital display signal. These structures an... | 12/26/2006 |
| 7154490 | Display driver, electro-optical device, and electronic appliance A display driver, electro-optical device and electronic appliance are provided that make unnecessary processing that calculates positions in a RAM where display data is to be written according to a mounting state thereof. A display driver includes a mounting state s... | 12/26/2006 |
| 7154501 | Method and apparatus for three-dimensional parallax drawing A three dimensional parallax drawing system for use in three dimensional graphics or virtual reality is disclosed. The parallax drawing system includes a three dimensional address generator which generates the original X-axis, Y-axis and Z-axis addresses of an image... | 12/26/2006 |
| 7145566 | Systems and methods for updating a frame buffer based on arbitrary graphics calls A method for dividing a display into zones at system initialization for tracking which zones have any pixels revised so that, when the time comes to update the display, only the zones requiring revision (that is, those zones in which any pixel has been revised) are ... | 12/05/2006 |
| 7106340 | Method for controlling the access to a storage device and a corresponding computer program A method and computer program are provided for controlling access to a memory device wherein, even with a complex data storage structure, access is made to memory areas within the memory device with a minimal number of selection inputs required for selection of a de... | 09/12/2006 |
| 7085214 | Data recording apparatus, data recording method, and optical recording medium including pseudo-erasing features Data is recorded on packet basis to a track of an optical recording medium and the data is pseudo-erased by erasing contents information of the track having the data. Information indicating the end position of the packet containing the data is recorded on the optica... | 08/01/2006 |
| 7050063 | 3-D rendering texture caching scheme A 3D rendering texture caching scheme that minimizes external bandwidth requirements for texture and increases the rate at which textured pixels are available. The texture caching scheme efficiently pre-fetches data at the main memory access granularity and stores i... | 05/23/2006 |
| 7043054 | Postal information input apparatus and a data display method thereof In a postal information input apparatus in which when a postcode to be read by a reader of a postal matter sorting machine cannot be normally read, a correct postcode is reentered manually from an input device, a first display means which displays on a display devic... | 05/09/2006 |
| 7023444 | Multi-texturing by walking an appropriately-sized supertile over a primitive A rendering unit positions a supertile so that it intersects a primitive. The rendering unit repeatedly walks over bins of the supertile, applying a layer of texture to the bins of the supertile in each iteration of said repeated walking. The rendering unit advances... | 04/04/2006 |
| 7015917 | Curved surface subdivision apparatus A subdivision level determination unit (13) in a curved surface subdivision apparatus (10) accepts an input of information about control points that define a shape of a curved surface and determines the subdivision level for the surface. Next, it sets,... | 03/21/2006 |
| 6999090 | Data processing apparatus, data processing method, information storing medium, and computer program An information storing medium storing coded data of a content in segment units stores data including information of a horizontal video size, a vertical video size, a video depth, a maximum video data size in data segments, and a maximum audio data size in data segme... | 02/14/2006 |
| 6992678 | Image processing apparatus and method of same An image processing apparatus, able to improve the pixel fill rate and able to prevent an increase of memory resources and increase of memory access, provided with a color calculation circuit for performing pixel level processing based on supplied first attribute pa... | 01/31/2006 |
| 6965785 | Cooperative wireless luminescent imagery A wireless communication device having luminescent display capabilities in accordance with various embodiments is provided with a machine accessible medium including instructions to receive data representing a set of one or more picture elements of an audience assis... | 11/15/2005 |
| 6956577 | Embedded memory system and method including data error correction A system and method for accessing a memory array where retrieved data is stored in a memory and upon the writing of the data in its modified form, the originally stored data is updated with the modification prior to being written back to the memory array. In this ma... | 10/18/2005 |
| 6954210 | Display data generating device An address converting unit receives pixel coordinates of a display screen in sequence and converts the received pixel coordinates to addresses and offsets. The addresses and offsets obtained from the conversions are stored in buffers in sequence respectively. A buff... | 10/11/2005 |
| 6950097 | Video display interface controller for host video display unit A video display interface controller for a host video display unit in which control signals multiplexed with component video signals are extracted and routed according to included address information. Control data associated with one or more local addresses is used ... | 09/27/2005 |
| 6950108 | Bandwidth reduction for rendering using vertex data Embodiments of the present invention provide a split vertex buffer where the data for each vertex is split between parallel vertex buffers. The first buffer contains vertex X and Y data, while the second parallel buffer contains the remainder of the vertex data. Giv... | 09/27/2005 |
| 6943791 | Z-slope test to optimize sample throughput A system and method are disclosed for utilizing a Z slope test to select polygons that may be candidates for multiple storage methods. The method may calculate the absolute Z slope from vertex data and compare the calculated value with a specified threshold value. I... | 09/13/2005 |
| 6943802 | Image processing apparatus and method of same An image processing apparatus, able to improve the pixel fill rate and able to prevent an increase of memory resources and increase of memory access, provided with a color calculation circuit for performing pixel level processing based on supplied first attribute pa... | 09/13/2005 |
| 6876400 | Apparatus and method for protecting a memory sharing signal control lines with other circuitry An apparatus such as a television signal receiver includes first and second circuit boards. The first circuit board includes a memory, and control circuitry for controlling at least one function of the apparatus. The second circuit board is operably coupled to the f... | 04/05/2005 |
| 6873331 | System and method for passing messages among processing nodes in a distributed system The present invention is broadly directed to a system of components defining a plurality of nodes and a random access memory (RAM) connected to each node. The system comprises at least one producer functional unit configured to perform a predetermined processing fun... | 03/29/2005 |
| 6870578 | Apparatus and method for sharing signal control lines An apparatus such as a television signal receiver includes first and second circuit boards. The first circuit board includes a first device such as a memory, and control circuitry for controlling at least one function of the apparatus. The second circuit board is op... | 03/22/2005 |
| 6847410 | Picture data memory device with picture data input channels and picture data output channels A picture data memory device which can be used universally comprises a central picture data memory for storing picture data of a plurality of picture data input channels, in which case the stored picture data can additionally be read out via a plurality of picture d... | 01/25/2005 |
| 6847370 | Planar byte memory organization with linear access A graphics memory architecture in which row addresses are permuted, in a basically tile-oriented storage architecture, so that fast parallel access is provided both by scanlines (for video operations) and also by tiles (for graphics operations). ... | 01/25/2005 |
| 6801988 | Data buffer for block unit data transfer to SDRAM An initial address register holds a transfer destination address as an initial address. Data is written into an input data register to which a unique address is allocated. The written data is put together into a data block having a predetermined transfer destination... | 10/05/2004 |
| 6791555 | Apparatus and method for distributed memory control in a graphics processing system A distributed memory controller memory system for a graphics processing system having addressable memory areas each coupled to a respective memory controller. The memory controllers are further coupled to each other through a memory controller bus upon which a memor... | 09/14/2004 |
| 6791560 | Apparatus and method for accessing vertex data A vertex data access apparatus and method. The apparatus receives a vertex index, compares the vertex index with any vertices' indices used before, issues a request if necessary for fetching vertex data in system memory, stores the return vertex data in a vertex dat... | 09/14/2004 |
| 6765579 | Pixel pages using combined addressing Methods and apparatus for implementing a pixel page system providing pixel pages using combined addressing. In alternative implementations, the system stores and retrieves data other than pixel data. In one implementation, a pixel page system includes: a data source... | 07/20/2004 |
| 6762765 | Bandwidth reduction for zone rendering via split vertex buffers Embodiments of the present invention provide a split vertex buffer where the data for each vertex is split between parallel vertex buffers. The first buffer contains vertex X and Y data, while the second parallel buffer contains the remainder of the vertex data. Giv... | 07/13/2004 |
