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Magician Harry Houdini patented a "Diver's Suit" enabling the wearer to "quickly divest himself of the suit while being submerged and to safely escape and reach the surface of the water."
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| Number | Title | Issue Date |
| 7339507 | Device for video decoding A device for video decoding is disclosed. It includes at least a pipeline scheduler, a decoding core, a segmented context memory and a context cache. The pipeline scheduler and the decoding core could decrease the time taken in a code-decoding period. The segmented ... | 03/04/2008 |
| 7274314 | Character-information conversion apparatus and method for converting character information A character-information conversion apparatus is configured to process character information including attribute information indicating a coding system and character codes conforming to the coding system and for converting the character codes into characters. The app... | 09/25/2007 |
| 7242329 | Method and system for prioritizing data values for robust data representation Methods, systems and data structures select prioritized robust data values from a plurality of available data values formed by a plurality of data bits, each capable of exhibiting a bit value. Available data values are arranged into a gray code format, and alternate... | 07/10/2007 |
| 7180437 | Parallel-to-serial converter Method and system on an aircraft for converting plural data inputs and plural data outputs from a parallel format to a serial format is provided. The system includes an integrated software module that accepts plural variable number of inputs and generates a plural v... | 02/20/2007 |
| 6996282 | Encoding apparatus, encoding method, decoding apparatus, decoding method, and record medium Corresponding to the compared results of threshold values of uniformly random numbers supplied from a uniformly random number generator and pixel values of an original picture signal, each pixel value of the original picture signal is encoded. The resultant encoded ... | 02/07/2006 |
| 6812871 | Extension unit for PLC system and I/O controller thereof An input/output controller for an extension unit of a programmable logic controller (PLC). The input/output controller has a first port connected to the PLC and a second port connected to a terminal device of the extension unit. A memory is provided to save data rec... | 11/02/2004 |
| 5828326 | Method of encoding and decoding for data transmission In a method for transmitting digital data of images, etc., under the condition of n>m and k | 10/27/1998 |
| 5450562 | Cache-based data compression/decompression A system for compressing bilevel data includes a first cache memory having a plurality of assigned levels of usage, a first usage level assigned to a most recently used data segments and a second level assigned to a plurality of less recently used data se... | 09/12/1995 |
| 4983966 | High-speed universal scaler A high-speed universal scaler operates in real time, accepting as an input an N-bit binary data word which is to be scaled (multiplied) by a scale factor specified in units per bit. The input data word is divided into M-bit sections which are provided (to... | 01/08/1991 |
| 4841298 | Bit pattern conversion system A bit pattern conversion system for converting a sequence of a bit pattern between a central processing unit and a peripheral circuit, including a data bus line connected between the central processing unit and the peripheral circuit, and a conversion cir... | 06/20/1989 |
| 4376933 | Circuit for compacting data A circuit for compacting variable length data words into a fixed word length format is disclosed. Each variable length data word and its associated leading 0's are separated by a delimiter bit and stored in memory. When the memory is accessed, the output ... | 03/15/1983 |
| 4319227 | Three state signaling system Digital information transmission system components including at least one unit arranged to transmit signal elements in parallel, at least one unit arranged to receive signal elements in parallel, and a corresponding plurality of signal transmission paths ... | 03/09/1982 |
| 4255749 | Apparatus for converting code signal to visual display Apparatus for converting a train of code signals representative of a letter, number, or symbol to a visual display of such corresponding letter, number, or symbol. The train of signals includes individual signals of at least two distinct time durations, t... | 03/10/1981 |
| 4231021 | Address data converter An address data converter for converting binary row address information and binary column address information corresponding to data character display locations of a CRT display device having a row/column display field to binary absolute address informatio... | 10/28/1980 |
| 4152697 | Parallel run-length decoder System and method for parallel decoding of character data in run length format to produce data in dot matrix form for presentation to a display device. The data for successive runs is stored in registers and processed in parallel to provide address data f... | 05/01/1979 |
| 4117470 | Data bit compression system A binary data signal compression system which includes means responsive to a first selected group of bits of the binary data signal, which is less than the total number of bits of the binary data signal, for producing a second selected group of bits which... | 09/26/1978 |
| 4071743 | Digital scale converter A digital scale converter is provided for binary coded decimal (BCD) conversion. The converter may be programmed to convert a BCD value of a first scale to the equivalent value of a second scale according to a known ratio. The value to be converted is loa... | 01/31/1978 |
| 4001814 | Fixed format message entry device with electronic storage and editing A fixed format message entry device employs a solid state memory for storing data. A portable keyboard is provided to input data to a display that is packaged with the keyboard and associated electronics. The display is comprised of an array of light emit... | 01/04/1977 |
| 3945000 | Series logic circuit arrangement using a plurality of complementary IGFET's A series logic circuit arrangement using a plurality of complementary IGFET's and comprising a plurality of series connected logic circuits, each of the logic circuits being designed to effect a predetermined logic function with respect to input binary co... | 03/16/1976 |
