Famous Patents
The first match was accidentally discovered in 1826 when John Walker scraped a stick with chemicals on the end against a stone floor.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7199728 | Communication system with low power, DC-balanced serial link A data communication system comprises a transmission line between first and second integrated circuits. An encoder on the first integrated circuit encodes an input data stream to produce a sequence of codewords, wherein codewords in the sequence are members of a set... | 04/03/2007 |
| 7130955 | Microprocessor and video/sound processing system An aspect of the present invention provides a microprocessor that includes a processor core including an instruction executing unit configured to execute instructions for input and output controlling and processing for data and a cache memory configured to store the... | 10/31/2006 |
| 6865231 | High-speed interconnection adapter having automated crossed differential pair correction An adapter configured to automatically detect and compensate for differential signal inversion is herein disclosed. In one embodiment, the adapter is part of a computer network having differential conductor pairs conveying differential signals between network device... | 03/08/2005 |
| 5987630 | Method of descrambling scrambled data using a scramble pattern and scramble pattern generator A descrambling method is suitable for improving the data transfer rate and fast data processing separate scrambled data into a plurality of data groups each including plural pieces of scrambled unit data. Initial scramble patterns are respectively assigne... | 11/16/1999 |
| 5574671 | True/complementer for a half-band filter A digital half-band filter with mutliplications using Wallace trees which have lower bits truncated for reduction in size and with a true/complementer providing saturation compensation together with accumulator overflow compensation by monitoring bits mor... | 11/12/1996 |
| 5495431 | High speed two's complementer A 2's complementer having a simple circuit arrangement and yet obtaining a high 2's-complementation rate. The 2's complementer includes an inverting circuit for inverting binary data with at least two bits to produce an 1's complement. The 2's complemente... | 02/27/1996 |
| 5422644 | Hard-wired controlled/monitor A hard-wired circuit (25) is provided for controlling or for monitoring a plant or process (12). The circuit incorporates means (14) to sense the current state of the process, an input encoder (16) to generate multi-digit binary coded signals representing... | 06/06/1995 |
| 5379038 | Parallel-serial data converter A parallel-serial data converter according to the present invention comprises a n-th latch circuit which latches the sign bit at the most significant bit of parallel data, a n-1th selector which selects either of the n-1th bit or the ground level, a n-1th... | 01/03/1995 |
| 5307061 | Absolute value circuit An absolute value circuit comprises a first "1" bit detecting unit for sequentially searching input binary data from the least significant bit toward the most significant bit so as to detect a first "1" bit whose value first becomes "1", and a sign discri... | 04/26/1994 |
| 5216424 | Binary data converter A binary data converter is adapted to convert a positive binary data into a negative binary data represented by a complement on two and vice verse. The conversion is effected as follows. A least significant bit of an inputted binary data is outputted as t... | 06/01/1993 |
| 5162796 | Digital signal inversion employing cross-over switch A multi-stage adder has a plurality of parallel inputs some fed to one stage of the adder and other inputs fed to a next stage of the adder. To effect selective inversion of a pair of inputs one of the pair is connected to one stage and the other of the p... | 11/10/1992 |
| 5148161 | Digital signal processor for fixed and floating point data A digital signal processor comprises a code converter which converts an integer coded in a Binary Two's Complement (BTC) code to an integer coded in a Sign Magnitude Binary (SMB) code and/or a code converter which converts the SMB code to the BTC code. An... | 09/15/1992 |
| 5140323 | Digital signal orthogonal transformer apparatus As an orthogonally transformed signal carries a value adjacent to zero, the output of an orthogonal transformer is coupled in series to a fixed length code encoder for converting the orthogonally transformed signal into a fixed length code signal which ex... | 08/18/1992 |
| 4973973 | Code converter and encoder for converting a unipolar binary coded signal into a bipolar binary coded signal A code converter includes an extraction device for extracting a reference level from a binary-coded input signal, which is offset at a predetermined voltage level and which varies arbitrarily with the same polarity as the voltage level. A twos-complement ... | 11/27/1990 |
| 4935890 | Format converting circuit for numeric data A format converting circuit for numeric data comprises an operation unit which operates according to a mode decision signal to output an input data as it is or a two's complement of the input data; a storage device which stores a positive or negative sign... | 06/19/1990 |
| 4866655 | Arithmetic processor and divider using redundant signed digit An arithmetic processor is disclosed for performing arithmetic operations utilizing an arithmetic operand represented by a signed digit expression having a plurality of digits which may have a positive, zero or negative value. The processor comprises: fir... | 09/12/1989 |
| 4709226 | Circuitry for complementing binary numbers Circuitry for forming the twos complement or ones complement of M-bit binary numbers is described. The circuitry includes M stages each of which contains an exclusive NOR gate. A first input terminal of the exclusive NOR gate is coupled to receive one bit... | 11/24/1987 |
| 4623872 | Circuit for CSD-coding of a binary number represented in two's complement A circuit for coding a binary number represented in two's complement in a CSD-code wherein it is impossible for two immediately adjacent binary digits to respectively exhibit a "1". The circuit is simply constructed and has a high operating speed. This is... | 11/18/1986 |
| 4608554 | Asynchronous parallel fixed point converter An electronic circuit is used as an asynchronous floating point converter to process data. Data words are received and processed by the floating point converter to produce processed output data. The function for processing is software selectable and may b... | 08/26/1986 |
| 4595911 | Programmable data reformat system A high speed system utilizing programmably controlled ranks of multiplexers for reformatting data from programmably selected first formats to second formats is described. Interleaved input data is utilized to optimize reformatting rates. The reformatting ... | 06/17/1986 |
| 4520347 | Code conversion circuit A code conversion circuit comprising logic for converting an n-bit binary number having a sign bit in two's complement code to sign-magnitude code is provided where n is an integer. The logic identifies whether or not the binary number is positive or nega... | 05/28/1985 |
| 4500871 | Method for coding binary data and a device decoding coded data A method for coding binary data to be transmitted and a device for decoding coded data dispense with the need to transmit a direct-current component and make it possible to reconstitute clock signals from coded data without any addition of a particular ch... | 02/19/1985 |
| 4467315 | Digital compandor having nonlinear companding characteristics A compandor converts a linear code signal consisting of a polarity bit and a plurality of absolute value bits. The polarity bit represents the polarity of each sample value of an original analog signal. The absolute value bits represent the absolute value... | 08/21/1984 |
| 4393367 | Digital compandor having nonlinear companding characteristics A compandor converts a linear code signal consisting of a polarity bit and a plurality of absolute value bits. The polarity bit represents the polarity of each sample value of an original analog signal. The absolute value bits represent the absolute value... | 07/12/1983 |
| 4352129 | Digital recording apparatus Apparatus for decreasing the d.c. component of digital signals derived from an analogue signal which may be a television video or audio signal, comprises analogue to digital converter means for producing digital words corresponding to samples of the analo... | 09/28/1982 |
| 4314369 | Digital coding process for recording sound channels with a television signal and apparatus realizing this process In an audiovisual signals diffusion apparatus, a digital coding process for protecting coded digital sound signals alternately recorded with video signals against alterations or deteriorations encountered during the transcription process onto a recording ... | 02/02/1982 |
| 4216460 | Transmission and/or recording of digital signals A digital processing system is disclosed, including an analog to digital converter for converting an analog signal into digital signals in the form of words each made up of a plurality of binary digits, and an encoding device for transforming the digital ... | 08/05/1980 |
| 4106105 | Zero detector An integrated circuit comprising first and second read-only memories (ROM), an adder circuit and a NOR gate for determining if the content of an input data word has more zeros than ones. The invention is usable in core memories for the purpose of reducing... | 08/08/1978 |
| 4087754 | Digital-to-analog converter for a communication system In an encoder portion, a communication system converts analog signals, into linear delta modulated (hereafter LDM) signals and LDM signals into compressed pulse code modulated (hereafter CPCM) signals while in a decoder portion, the system reconstructs th... | 05/02/1978 |
| 4038538 | Integer and floating point to binary converter In a data processing system having a plurality of storage units, each unit therein storing in integer or normalized floating point format, an exponent sign bit, an exponent field, an integer/fraction sign bit, and an integer/fraction field, a converter tr... | 07/26/1977 |
| 3935386 | Apparatus for synthesizing phase-modulated carrier wave Digital logic apparatus for synthesizing a phase-modulated carrier wave wherein phase shifts between successive carrier-wave segments encode data elements. Carrier-wave segments having different phases are stored in the form of digitally encoded samples i... | 01/27/1976 |
| 3932864 | Circuit for converting a companded digital time-amplitude pulse code into a linear digital amplitude pulse code A shift-companded, or n:m, pulse code, representing on a time-amplitude basis the information of a conventional, amplitude companded, pulse code, is converted to a linear, digital, amplitude, pulse code by first converting the shift-companded amplitude in... | 01/13/1976 |
