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| Number | Title | Issue Date |
| 8164491 | Coefficient multiplier and digital delta-sigma modulator using the same Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without emplo... | 04/24/2012 |
| 7928867 | Analog to digital converter with digital filter Disclosed herein are devices, methods, and techniques including analog to digital converters having at least one digital filter. ... | 04/19/2011 |
| 7439893 | Delta sigma modulation D/A converting system By using a selector, an output of a delta sigma modulator having a quantizer for quantizing a signal is selectively supplied to one of a first D/A converter having a linear amplifier and a second D/A converter having a digital amplifier. Further, the number of quant... | 10/21/2008 |
| 7420485 | Sigma-delta modulator and method for sigma-delta modulation A sigma-delta modulator is supplied with a data word and includes a first and at least one further modulation stage, each having at least two adders. The adders in the first modulation stage process a low-significance component and a delayed more significant compone... | 09/02/2008 |
| 7358881 | Quantizer overload prevention for feed-back type delta-sigma modulators A digital signal processing system includes a delta sigma modulator that maintains a low pass output during quantizer overload prevention conditions. In at least one embodiment, the delta sigma modulator includes a quantizer overload protected delta sigma modulator ... | 04/15/2008 |
| 7339510 | Accumulator for adaptive sigma-delta modulation A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x... | 03/04/2008 |
| 7295617 | ADPCM decoder A shift register receives a quantization difference signal separated into a mantissa part and an exponent part and bit-develops the mantissa part. A shift arithmetic operation control circuit bit-shifts the bit-developed mantissa part in accordance with a value of t... | 11/13/2007 |
| 7276978 | Phase locked loop comprising a sigma-delta modulator The invention is directed to a phase locked loop with a ΣΔ modulator. A multimodulus divider in the feedback path of the PLL is actuated by the ΣΔ modulator. The latter has a design which can be described by a complex transfer function H(s) in the Laplace plane,... | 10/02/2007 |
| 7266152 | Digital signal processing device and digital signal processing method A device for performing predetermined processing on an input signal that may have a signal amplitude of more than one bit. The input signal is obtained by subjecting one-bit serial signals to predetermined signal processing, wherein the signal amplitude of more than... | 09/04/2007 |
| 7259704 | System and method for compensating for error in a sigma delta circuit A system and method are provided for compensating for output error in a sigma delta circuit. The system includes an input for receiving an input signal and an output configured to output a output signal. The system further includes a summation component configured t... | 08/21/2007 |
| 7247805 | Switch actuation method and mechanism A mechanism is provided for actuating a switch that transmits motion from a first component, which moves along a first path, to a system that is attached to the mechanism. The mechanism includes a second component that moves transverse to the first path and a third ... | 07/24/2007 |
| 7242327 | Decimating down converter and related methods A system of downconverting an intermediate frequency (IF) phase or frequency modulated signal to a digital baseband includes an N bit shift register circuit that receives a binary input as a 1-bit input sample data stream of an IF signal. A decimation circuit includ... | 07/10/2007 |
| 7212137 | Delta sigma modulator with integral decimation A digital signal processing system utilizes an internal filter of a delta-sigma modulator in a novel manner to implement both the integration functions of the delta-sigma modulator and a decimation function. Using the internal filter to combine integration and decim... | 05/01/2007 |
| 7205919 | Digital signal processing apparatus and digital signal processing method The present invention aims to realize linking of 1-bit signals having respective sampling frequencies that are different from each other and show a relationship of one equal to integer times of the other without noises. ... | 04/17/2007 |
| 7183956 | High speed digital delta-sigma modulator with integrated upsampler Apparatus, and a related method, for converting digital signals directly to radio-frequency (RF) analog signals. The apparatus includes a single high-speed delta-sigma modulator and an integrated upsampler that increases the data rate of digital input samples by a s... | 02/27/2007 |
| 7136420 | Recording of super-audio or like one-bit-per-sample signals on a PCM recorder An eight-channel PCM recorder is utilized for recording two channels of delta-sigma modulated audio signals. Employed to this end is a PCM adapter comprising a bit stream divider for dividing the bit streams of the delta-sigma modulated signals into series of sixtee... | 11/14/2006 |
| 7126517 | Delta-sigma modulator and delta-sigma modulation method A delta-sigma modulator and delta-sigma modulation method according to the present invention are capable of ensuring a stable 1-bit signal having less distortion at the transition time from an audio signal reproduction state to soundless state while maintaining high... | 10/24/2006 |
| 7125328 | Glass grinding bit A glass grinding bit includes a monolithic plastic body having a first end, a second end and a central longitudinal axis. A central bore formed as part of the body in alignment with the longitudinal axis for receiving a drive shaft. An outer surface is formed as par... | 10/24/2006 |
| 7107212 | Bitstream data reduction coding by applying prediction A data processing apparatus for data processing an audio signal includes an input terminal (1) for receiving the audio signal, a 1-bit A/D converter (4) for A/D converting the audio signal to for a bitstream signal, a prediction unit (10) for ca... | 09/12/2006 |
| 7096180 | Method and apparatuses for improving quality of digitally encoded speech in the presence of interference Methods and apparatuses for encoding speech signals in the presence of interference that accurately establishes a speech signal value subsequent to lost transmission packets. For one embodiment of the present invention, the initial bits of a speech transmission pack... | 08/22/2006 |
| 7075995 | Three-order sigma-delta modulator A three-order sigma-delta modulator having a feedback and a feedforward configuration. The three-order sigma-delta modulator includes: an analog-to-digital converter; a digital-to-analog converter; a first integrating network; a second integrating network connected ... | 07/11/2006 |
| 7068196 | Digital signal processing device and digital signal processing method An apparatus for processing a digital signal that generates a one-bit output signal using a delta-sigma modulation apparatus, which includes a quantizer for quantizing an integrated output of a sixth integrator to generate a one-bit output signal that is send to res... | 06/27/2006 |
| 6995699 | Encoding method, and encoding apparatus, and decoding method and decoding apparatus In an encoding apparatus, when difference value between adjacent quantization units of quantization accuracy information where, e.g., distribution range is 0˜7, e.g., if difference value is 3 or more, 8 is subtracted, and if difference value is less than −4, 8 is... | 02/07/2006 |
| 6983011 | Filter circuit In a filter circuit of the present invention, a partial quantization value is computed by a quantization circuit according to a spread code and others in a unit at an arbitrary stage, where an integrating value is increased. The partial quantization value is success... | 01/03/2006 |
| 6943709 | Self-adaptable data compression technique A self-adaptable data compression technique includes compressing the digital data points of a waveform according to at least a first protocol and a second protocol, and various comparing the compressed data under various protocols to determine which would require th... | 09/13/2005 |
| 6924756 | Method and system for processing a digital signal Processing signals to record media information includes receiving an analog signal at an analog-to-digital converter, where the analog signal includes media information. The analog-to-digital converter converts the analog signal to a corresponding digital signal, wh... | 08/02/2005 |
| 6813320 | Wireless telecommunications multi-carrier receiver architecture A receiver (10) for a wireless telecommunications system that provides relatively wideband signal processing of received signals without increased signal distortion so that multiple received signals can be simultaneously processed. The receiver (10) in... | 11/02/2004 |
| 6756922 | Method and system for compression of a set of mostly similar strings allowing fast retrieval A computer implemented method and system for selecting a string for serving as a reference string for a comparison scheme for compressing a set of strings calculates preliminary compression results for every string relative to an initial reference string, and uses t... | 06/29/2004 |
| 6727833 | Adaptive ΣΔ modulation with one-bit quantization An adaptive sigma delta modulator has an input stage, a conventional sigma delta modulator, and adaptation stage, and an output stage. The input stage produces a difference signal representing the difference between an analog input signal and an adaptive signal, the... | 04/27/2004 |
| 6628720 | Transmitting apparatus and reproducing apparatus A transmitting apparatus and a reproducing apparatus include a converter for converting an input one-bit digital signal into a multi-bit signal while effecting down-sampling of a sampling frequency. A one-bit digital signal that could develop an overflow ... | 09/30/2003 |
| 6587062 | Flexible interface circuit and method for delta sigma A/D converters A multi-mode interface circuit for coupling a delta sigma modulator (24) to a processor includes a decoder 20 for decoding mode selection inputs to produce a plurality of control signals controlling an oscillator and a plurality of multiplexers. The oscil... | 07/01/2003 |
| 6570512 | Circuit configuration for quantization of digital signals and for filtering quantization noise The invention relates to a circuit configuration for quantization of digital signals and for filtering quantization noise. Said circuit configuration comprises a multitude of digital control loops connected in series and having quantizers. The digital sig... | 05/27/2003 |
| 6535153 | Adaptive sigma-delta modulation with one-bit quantization An adaptive sigma delta modulator has an input stage, a conventional sigma delta modulator, and adaptation stage, and an output stage. The input stage produces a difference signal representing the difference between an analog input signal and an adaptive ... | 03/18/2003 |
| 6535845 | Processing an audio bitstream signal A data processing apparatus includes an input terminal for receiving an audio signal, a 1-bit A/D converter for A/D converting the audio signal into a 1-bit bitstream signal, and a prediction unit for carrying out a prediction step on the bitstream signal... | 03/18/2003 |
| 6480129 | Methods and apparatus for correction of higher order delta sigma converters A technique for correcting higher order delta sigma modulators in audio components, which use mutually nonlinear feedback and feed forward functions. Methods and apparatus are provided to correct jitter and spread in the delta sigma converter due to quant... | 11/12/2002 |
| 6462690 | Circuit systems and methods for multirate digital-to-analog amplifier systems A multirate digital-to-analog amplifier system is disclosed. An interpolator is configured to interpolate digital values between samples of a digital signal from a digital signal source, in which the digital signal has a first sample rate. An output signa... | 10/08/2002 |
| 6407689 | Method and apparatus for controlling stages of a multi-stage circuit A control mechanism that can be used to control a ΣƊ ADC to provide the required level of performance while reducing power consumption. The ΣƊ ADC is designed with multiple stages (i.e., loops or sections), and provides improved performance (e.g., hig... | 06/18/2002 |
| 6404357 | Digital/analogue communication system for increasing transfer efficiency of digital sample data A digital/analogue communication system is described, where data is generated and received by a processing unit in a digital format and transmitted via a communication path in an analogue format. A DSP unit receives a sequence of multi-bit digital samples... | 06/11/2002 |
| 6388586 | Method for reversing the bits of a computer data structure The bits comprising a computer data structure are reversed rapidly and efficiently using a combination of data partitioning and table look ups. In an exemplary embodiment, the invention is employed in the pre-processing of Advanced Configuration and Power... | 05/14/2002 |
| 6300890 | Delta-sigma modulator and AD converter A delta-sigma modulator comprises a 1-bit quantizer located for quantizing an analog signal applied thereto, and for outputting a first quantized digital signal, a 1-bit DA converter converting the first quantized digital signal into a quantized analog si... | 10/09/2001 |
