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| Number | Title | Issue Date |
| 7098719 | Multiplexer with clock suppression At least two inputs, at least one output and a clock source for the inputs are provided in a multiplexer. Each input balances an input signal and is coupled to a transistor circuit having two transistors with collectors commonly connected to a power potential. The t... | 08/29/2006 |
| 6771162 | Active cell crosspoint switch A high-speed, low distortion N×M crosspoint switch selectively routes input signals arriving at any of N input terminals to one or more of M output terminals. The crosspoint switch includes a switch cell array having N rows and M columns of switch cells. Each of N ... | 08/03/2004 |
| 5120996 | Synaptic element and array An electronic circuit is disclosed having a sample/hold amplifier connected to an adaptive amplifier. A plurality of such electronic cicuits may be configured in an array of rows and columns. An input voltage vector may be compared with an analog voltage ... | 06/09/1992 |
| 4394657 | Decoder circuit A decoder circuit comprises input gates, a logic circuit for generating an output according to input signals, an output gate for driving a word line, and a current control device for activating the output gate according to the output of the logic circuit.... | 07/19/1983 |
| 3993978 | Solid state crosspoint circuit arrangement for use in a telephone exchange A solid state crosspoint arrangement comprises a pair of transistors arranged in current driven common base configuration, the emitters and collectors of said transistors constituting inputs and outputs respectively of said arrangement. Preferably the cro... | 11/23/1976 |
