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| Number | Title | Issue Date |
| 7400205 | Frequency synthesizer and oscillation control method of frequency synthesizer The present invention provides a frequency synthesizer capable of switching an oscillation frequency band while maintaining a lock state realized with a small-scale and low-current-consumption circuit configuration, and an oscillation control method of the frequency... | 07/15/2008 |
| 7358827 | Process-insensitive self-biasing phase locked loop circuit and self-biasing method thereof A process-insensitive self-biasing PLL circuit and self-biasing method thereof prevent deterioration of loop stability even when there is a fabrication process variation. The self-biasing PLL circuit includes a phase frequency detector, a main charge pump circuit, a... | 04/15/2008 |
| 7355485 | Apparatus and method for phase lock loop gain control using unit current sources A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit acc... | 04/08/2008 |
| 7353011 | Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitanc... | 04/01/2008 |
| 7339438 | Phase and delay locked loops and semiconductor memory device having the same A phase locked loop includes a phase difference detector for detecting a phase difference between an input clock signal and an output clock signal to generate an up signal and a down signal; a charge pump for raising a level of a control signal by supplying a supply... | 03/04/2008 |
| 7339439 | Voltage-controlled oscillator with multi-phase realignment of asymmetric stages A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages. The individual VCO stages provide an oscillating output signals having an asymmetric waveform with substantially different rise and ... | 03/04/2008 |
| 7336110 | Differential amplitude controlled sawtooth generator A dual differential sawtooth signal generator includes a first sawtooth voltage generator that has a first capacitor and a second capacitor that are alternately charged with a feedback control source current from a low voltage reference voltage level. A second sawto... | 02/26/2008 |
| 7324788 | RF integrated circuit comprising a frequency synthesizer not very sensitive to injection locking The present invention relates to an RF integrated circuit comprising a frequency synthesizer and a QAM modulator for modulating a baseband signal of frequency FBB, the frequency synthesizer supplying to the QAM modulator an output signal of frequency F... | 01/29/2008 |
| 7315992 | Electro-migration (EM) and voltage (IR) drop analysis of integrated circuit (IC) designs Performing approximate analysis of modules based on corresponding layout files while requiring fewer computations than performing a transistor level simulation of a design of a module or integrated circuit. One feature enables IR/voltage drop and EM (electro migrati... | 01/01/2008 |
| 7315601 | Low-noise sigma-delta frequency synthesizer A sample-and-hold (SAH) phase detector (PD) is clocked in such a way (using a reverse clocking mode) so as to avoid quantization noise increases due to folding that is generally associated with conventional charge pump based phase detectors. The PD is clocked with a... | 01/01/2008 |
| 7315197 | Limit swing charge pump and method thereof A charge pump comprises a limit swing generator that receives an input signal and that generates a drive signal based on the input signal. A charge pump core includes output switches that generate a charge pump output in response to the drive signal. The drive signa... | 01/01/2008 |
| 7304544 | Automatic phase lock loop design using geometric programming A method is described that involves developing a more detailed description of a phase lock loop system by substituting, into a monomial or posynomial equation that is part of a family of monomial and posynomial expressions that describe functional characteristics of... | 12/04/2007 |
| 7286625 | High-speed clock and data recovery circuit A 40-Gb/s clock and data recovery (CDR) circuit incorporates a quarter-rate phase detector and a multi-phase voltage controlled oscillator to re-time and de-multiplex a 40-Gb/s input data signal into four 10-Gb/s output data signals. The circuit is fabricated in 0.1... | 10/23/2007 |
| 7275004 | Method and apparatus to perform on-die waveform capture An integrated circuit is provided that includes a first port to receive a first signal from a first channel and a first device coupled to the first port to modify a channel response of the first signal received from the first channel. A waveform capture device may b... | 09/25/2007 |
| 7266171 | Phase-locked loop circuit and radio communication apparatus using the same A communication apparatus includes a phase-locked loop circuit which receives a first signal having a frequency and converts it into an output signal having a transmission frequency and includes a current output type phase comparator which converts a phase differenc... | 09/04/2007 |
| 7256631 | Charge pump with balanced and constant up and down currents A charge pump generates a first sub up current and a second sub up current that vary complementarily with a change in a voltage at an output terminal. The charge pump also generates a first sub down current and a second sub down current that vary complementarily wit... | 08/14/2007 |
| 7253691 | PLL clock generator circuit and clock generation method A clock generator circuit is provided wherein a comparison clock signal is generated by comparing a standard clock signal and an operating clock signal. The comparison clock signal is converted into a current signal. The current signal is converted to multiple curre... | 08/07/2007 |
| 7250808 | Differential charge pump circuit A differential charge pump circuit has two current paths and generates a differential current in accordance with currents inputted to the two current paths. The two current paths have a pair of current sources respectively and form a differential pair. The different... | 07/31/2007 |
| 7242988 | Adaptive pattern recognition based controller apparatus and method and human-factored interface therefore The need for a more-readily usable interface for programmable devices is widely recognized. The present invention relates to programmable sequencing devices, or, more particularly, the remote controls for consumer electronic devices. The present invention provides a... | 07/10/2007 |
| 7235997 | CMOS leakage current meter A leakage current detection circuit includes a first field effect transistor, the transistor configured to be biased to provide a leakage current, and a first current mirror in communication with the transistor operable to detect the leakage current from the transis... | 06/26/2007 |
| 7230505 | Voltage controlled oscillator with gain control A VCO circuit including a VCO, a voltage supply and a control circuit. The VCO has a supply voltage input and a gain that changes with its supply voltage. The voltage supply has an adjust input and an output coupled to the supply voltage input of the VCO. The voltag... | 06/12/2007 |
| 7224952 | Charge pump having sampling point adjustment Adjustment circuitry in a phase-locked loop (PLL) adjusts a sampling point to any desired location within a bit period of each bit of received high-speed serial data. The adjustment circuitry, responsive to program control, selectively adds current portions to a cha... | 05/29/2007 |
| 7218178 | Frequency generator with a phase locked loop A frequency generator with a phase locked loop includes a loop filter, the transfer function of which has a pair of complex conjugated poles. The present invention provides an optimum and greatly improved compromise, in particular as opposed to the prior art, betwee... | 05/15/2007 |
| 7212051 | Control signal generation for a low jitter switched-capacitor frequency synthesizer A phase detector and control signal generator responds to a reference signal and a feedback signal to produce a non-delayed up and down signal. A programmable delay unit delays the non-delayed up and down signal to provide up and down signals for a charge pump. A di... | 05/01/2007 |
| 7199673 | Precharge circuit A precharge circuit that initializes an electronic filter to a middle voltage level of an operational voltage includes a filter isolation device, a filter communication device, and an initializing device. The filter isolation device isolates the electronic filter fr... | 04/03/2007 |
| 7196588 | Auto-gain controlled digital phase-locked loop and method thereof A digital PLL system includes a first multiplier coupled to a phase difference signal for multiplying the phase difference signal by a first gain factor; a second multiplier coupled to the phase difference signal for multiplying the phase difference signal by a seco... | 03/27/2007 |
| 7190231 | High-performance charge-pump circuit for phase-locked loops One of the high-performance charge-pump circuits basically includes two switch mirror circuits, two current sources, two switches, and an inverter. In the switch mirror, the switch coupled to the diode-connected reference transistor is indirectly mirrored to the out... | 03/13/2007 |
| 7173494 | Method and system for operating a feedback system for a voltage controlled oscillator that involves correcting for offset related to the feedback system An offset related to a feedback system for a VCO is quantified and then a parameter of the feedback system is adjusted in response to the quantified offset to correct for the offset. Correcting for offset in a feedback system can improve the performance of a PLL by ... | 02/06/2007 |
| 7161401 | Wide output-range charge pump with active biasing current A charge pump circuit includes a charge pump having an output voltage. A replica circuit actively matches up and down currents in the charge pump. A charge pump bias current transistor biases the charge pump. The charge pump includes four switches driven by differen... | 01/09/2007 |
| 7151418 | Method and an apparatus to bias a charge pump in a phase locked loop to compensate a VCO gain A method and an apparatus to bias a charge pump in a phase locked loop (PLL) to compensate a voltage controlled oscillator (VCO) gain have been disclosed. One embodiment of the apparatus includes a PLL comprising a charge pump, the charge pump comprising an input an... | 12/19/2006 |
| 7146149 | High isolation switch buffer for frequency hopping radios A local oscillator (LO) circuit is disclosed which provides improved isolation between the unselected LO source and a mixer. The LO circuit includes a first LO source to generate a first periodic signal cycling at a first frequency, a second LO source to generate a ... | 12/05/2006 |
| 7132835 | PLL with built-in filter-capacitor leakage-tester with current pump and comparator A filter capacitor within a phase-locked loop (PLL) can be tested using a built-in test circuit. The PLL's charge pump is deactivated while a test-current source is activated to supply a test current to the PLL filter capacitor. When the test current is larger than ... | 11/07/2006 |
| 7132880 | High bandwidth, high PSRR, low dropout voltage regulator A voltage regulator may include one or more features for generating high PSRR. For example, source follower devices may be included in the voltage regulator for providing current sources for the output voltage nodes. The source followers may be sensitive to power su... | 11/07/2006 |
| 7129792 | Apparatus and method for phase lock loop gain control using unit current sources A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit acc... | 10/31/2006 |
| 7126432 | Multi-phase realigned voltage-controlled oscillator and phase-locked loop incorporating the same A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages with the injection amount proportional to the instantaneous phase error between the VCO output clock and a reference clock. The MRVCO... | 10/24/2006 |
| 7119626 | Oscillation circuit and operation method thereof An oscillation circuit has: a first MOS transistor having a gate connected to a first node and a source connected to the ground; a second MOS transistor having a gate connected to a second node and a source connected to the ground; a current supply circuit supplying... | 10/10/2006 |
| 7116144 | High bandwidth phase locked loop (PLL) A phase locked loop (PLL) is provided. In one implementation, the PLL includes a feedback loop having a frequency multiplier and an integer divider to generate a divided signal. The PLL includes a re-sampling circuit operable to re-sample one or more digital pulses ... | 10/03/2006 |
| 7116183 | Temperature compensated voltage controlled oscillator A VCO with temperature compensation is achieved using reverse biased diodes. The VCO includes an amplifier that provides the required signal gain, a resonator tank circuit that provides the required phase shift, and at least one frequency tuning circuit for tuning t... | 10/03/2006 |
| 7102450 | Method and apparatus for providing clock signals at different locations with minimal clock skew A tapped phase shift ring oscillator may be used to provide multiple clock signals having variable phase delays. Phase delays may be selected to compensate for clock skews at different locations on high speed chips, or to provide clock signals having specific, desir... | 09/05/2006 |
| 7102416 | High side switching circuit A high side switching circuit, comprising: a switching transistor; a charge pump drive circuit including a circuit for generating an oscillating signal; and a charge pump arranged to provide a gate drive voltage to the switching transistor in response to a control s... | 09/05/2006 |
