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| Number | Title | Issue Date |
| 8018290 | Oscillator, transmitter-receiver and frequency synthesizer An output terminal 6 is provided at the connecting point 5 between the collector terminal of a transistor 1 and an open-ended stub 4 by connecting the open-ended stub 4 to the collector terminal of the transistor 1, the open... | 09/13/2011 |
| 7378916 | Crystal oscillator device, oscillation method and heater The crystal oscillator device for simultaneously generating oscillator signals with a plurality of oscillation modes of a crystal unit, comprising: a primary resonator unit filtering the oscillator signal with a primary oscillation mode, which is one of the oscillat... | 05/27/2008 |
| 7362188 | System-on-a-chip (SoC) clock management—a scalable clock distribution approach System and method for providing clocks to digital circuitry with a need for multiple clocks. A preferred embodiment comprises an oscillator controller (oscillator clock domain block 305) distributes a system clock generated by an oscillator to a plurality of ... | 04/22/2008 |
| 7336111 | Fast-locking digital phase locked loop An apparatus for synchronizing signals. For devices, such as memory devices, implementing a synchronization device to synchronize signals, a synchronization device having a delay locked loop coupled to a phase locked loop may be implemented. The delay locked loop is... | 02/26/2008 |
| 7292108 | Voltage controlled oscillator for frequency synthesizer The voltage controlled oscillator includes an oscillating transistor, and first and second inductance elements which are connected in series and provided between an output terminal of the oscillating transistor and a high frequency ground point Vcc. Oscillating sign... | 11/06/2007 |
| 7271671 | Arranging a crystal to generate an oscillating signal A crystal is loaded with capacitance in such a way that it begins to oscillate at a desired frequency with a resonance circuit (2). Capacitive voltage division is carried out with a voltage divider to at least one terminal (3) of the crystal (1)... | 09/18/2007 |
| 7135903 | Phase jumping locked loop circuit A phase-jumping locked loop circuit. The locked loop circuit includes a plurality of differential amplifiers and a biasing circuit switchably coupled to each of the differential amplifiers. Each of the differential amplifiers has inputs to receive a respective pair ... | 11/14/2006 |
| 7133324 | Synchronous dynamic random access memory devices having dual data rate 1 (DDR1) and DDR2 modes of operation and methods of operating same A dual data rate dynamic random access memory (DDR DRAM) device may operate in dual DDR modes via a mode selection circuit configured to enable a Dual Data Rate (DDR) 1 mode of operation for the DDR DRAM or a DDR2 mode of operation for the DDR DRAM. | 11/07/2006 |
| 7111187 | Information processor and information processing system utilizing interface for synchronizing clock signal An information processing system having an original clock oscillator for delivering at least one original clock signal K defined as a first clock signal and a plurality of information processing units supplied with the original clock signal K, wherein each informati... | 09/19/2006 |
| 7036032 | System for reduced power consumption by phase locked loop and method thereof A system and method are provided for reducing power consumption within a video processing portion of a system. Activity associated within a video-processing portion of a personal digital assistant is analyzed. As reduced activity is identified, power conservation mo... | 04/25/2006 |
| 6965272 | Worldwide marketing logistics network including strategically located centers for frequency programming crystal oscillators to customer specification A worldwide logistics network includes a processing center for receiving customer orders for crystal oscillators over communications links, processing the orders, and generating work orders that are selectively disseminated over communications links to programming c... | 11/15/2005 |
| 6960948 | System with phase jumping locked loop circuit An integrated circuit device having a select circuit, a summing circuit and a phase mixer. The select circuit selects one of a plurality of offset values as a selected offset. The summing circuit sums the selected offset with a phase count value, the phase count val... | 11/01/2005 |
| 6954113 | Programmable oscillator circuit A programmable crystal oscillator is provided having a memory for storing frequency-defining parameters. Typically, one of these parameters is used to program an adjustable capacitive load circuit coupled to a crystal to thereby adjust the crystal source frequency. ... | 10/11/2005 |
| 6952123 | System with dual rail regulated locked loop An integrated circuit device having a select circuit, a summing circuit and a phase mixer. The select circuit selects one of a plurality of offset values as a selected offset. The summing circuit sums the selected offset with a phase count value, the phase count val... | 10/04/2005 |
| 6949887 | High frequency inductive lamp and power oscillator An oscillator includes an amplifier having an input and an output, a feedback network connected between the input of the amplifier and the output of the amplifier, the feedback network being configured to provide suitable positive feedback from the output of the amp... | 09/27/2005 |
| 6948847 | Temperature sensor for a MOS circuit configuration A temperature sensor for a MOS circuit configuration is implemented as the gate of a MOS transistor and configured as a two-terminal network with a gate input and a gate output. By measuring the voltage drop across gate it is possible to determine the temperature at... | 09/27/2005 |
| 6943599 | Methods and arrangements for a low power phase-locked loop Methods and arrangements for a low power, phase-locked loop (PLL) are disclosed. Embodiments include a multi-phase oscillator like a voltage-controlled oscillator (VCO) to generate multiple phases of a clock signal. The multiple phases are then combined to generate ... | 09/13/2005 |
| 6927640 | Apparatus and method for reducing phase noise in oscillator circuits A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias r... | 08/09/2005 |
| 6922091 | Locked loop circuit with clock hold function A locked loop circuit having a clock hold function. The locked loop circuit includes a select circuit, phase mixing circuit, hold signal generator and latch circuit. The select circuit selects one of a plurality of phase values in response to a select signal, and th... | 07/26/2005 |
| 6911853 | Locked loop with dual rail regulation An apparatus having a dual rail regulated reference loop. The reference loop includes a delay circuit powered by upper and lower supply voltages to generate a plurality of reference clock signals, and a voltage regulation circuit to adjust the upper and lower supply... | 06/28/2005 |
| 6836164 | Programmable phase shift circuitry A circuit provides a programmable phase shift feature, where the phase shift is programmably selectable by a user. This circuitry may be incorporated in a programmable logic device (PLD) or field programmable gate array (FPGA) to provide additional programmability f... | 12/28/2004 |
| 6757054 | Time measurement apparatus, distance measurement apparatus, and clock signal generating apparatus usable therein In a shift clock signal generating apparatus, a delay line includes a plurality of unit delay elements connected in cascade. A reference clock signal propagates in the delay line while being successively delayed by the unit delay elements. Switches have first ends c... | 06/29/2004 |
| 6667641 | Programmable phase shift circuitry A circuit provides a programmable phase shift feature, where the phase shift is programmably selectable by a user. This circuitry may be incorporated in a programmable logic device (PLD) or field programmable gate array (FPGA) to provide additional progra... | 12/23/2003 |
| 6654306 | Apparatus and method for generating an oscillating signal An apparatus and method for generating a plurality of output signals that can be used for driving a corresponding plurality of charge pumps from a signal oscillating between a first and second logic state. The apparatus includes a plurality of shift regis... | 11/25/2003 |
| 6526270 | IrDA modulation/demodulation integrated circuit device An IrDA modulation/demodulation integrated circuit device designed for use in a portable telephone receives a clock used in a base-band integrated circuit device for processing a base-band signal, and converts the frequency of the received signal by using... | 02/25/2003 |
| 6463013 | Clock generating apparatus and method thereof A clock generating apparatus and method for generating clock signals of different frequency. The clock generating apparatus and method receives and divides a main clock signal to obtain a reference clock signal. Then, the reference clock signal and the fi... | 10/08/2002 |
| 6400230 | Method and apparatus for generating and distributing a clock signal One embodiment of the present invention provides a system that generates a clock signal within an integrated circuit. This system includes four clocking elements organized into a ring, wherein each clocking element includes at least one input and at least... | 06/04/2002 |
| 6373343 | Oscillator and method An integrated circuit (10) is disclosed comprising a fundamental frequency oscillator comprising a reference node (32) whose voltage varies between a high threshold and a low threshold. The fundamental frequency oscillator is operable to generate a first ... | 04/16/2002 |
| 6369624 | Programmable phase shift circuitry A circuit provides a programmable phase shift feature, where the phase shift is programmably selectable by a user. This circuitry may be incorporated in a programmable logic device (PLD) or field programmable gate array (FPGA) to provide additional progra... | 04/09/2002 |
| 6288616 | Multifrequency low-power oscillator for telecommunication IC's An oscillator circuit is provided with delay cells having supply voltage terminals and being interconnected in a ring for providing a first oscillator signal. If the delay cells have supply voltage terminals in common a second oscillator signal can derive... | 09/11/2001 |
| 6275553 | Digital PLL circuit and clock generation method A digital PLL circuit is formed by a first digital PLL circuit, a signal generation circuit that generates a plurality of signals that have the same frequency as the output of the first PLL circuit but differing phases, and the second digital PLL circuit ... | 08/14/2001 |
| 6275118 | Push-push oscillator A push--push oscillator is formed by (a) a resonator circuit including a transmission line having one-half wavelength and both ends of the line being left open, and a capacitance for frequency control coupled to the transmission line in parallel, and (b) ... | 08/14/2001 |
| 6157238 | Clock system of a semiconductor memory device employing a frequency amplifier A clock system produces a high-speed clock signal based on a low-speed clock signal inputted from the outside through the use of a frequency amplifier therein in order to thereby reduce power consumption at a clock buffer. In order to perform the above pr... | 12/05/2000 |
| 6150890 | Dual band transmitter for a cellular phone comprising a PLL Disclosed is a dual band wireless phone, such as a cellular phone for a mobile communications system, with a dual band transmitter that includes a phase-locked loop (PLL). The dual band transmitter includes first and second power amplifiers and the PLL. T... | 11/21/2000 |
| 6140883 | Tunable, energy efficient clocking scheme Briefly, in accordance with one embodiment of the invention, a circuit includes: a voltage tunable inductive-capacitive (LC) oscillator, a charge pump, and a phase detector. The oscillator, detector, and charge pump are coupled together to form a PLL.... | 10/31/2000 |
| 6137369 | Ring oscillator clock generator network A clock generator having a ring structure and a chain structure. The ring structure is formed of an even number of serially connected distributed oscillator elements, and the chain structure is formed of an even number of serially connected distributed os... | 10/24/2000 |
| 6041090 | Data sampling and recover in a phase-locked loop (PLL) A circuit for detecting whether a reference clock signal, one of n phase-shifted adjacent clock signals, of a phase-locked loop (PLL) is aligned with incoming data, comprising: a data sampler for sampling bits of the incoming data with each of the adjacen... | 03/21/2000 |
| 6018274 | Radio receiver and frequency generator for use with digital signal processing circuitry The present invention relates to a radio receiver, particularly to a receiver for use in single-frequency applications, such as GPS, and to a frequency generator, which may be used in such a radio receiver, or elsewhere. The frequency generator comprises ... | 01/25/2000 |
| 5994933 | Semiconductor device for controlling a delay time of an output signal of a PLL It is an object to obtain a semiconductor device capable of changing a delay time of an output signal of a PLL circuit with respect to an external clock signal after installed in a system. An external clock signal is inputted to an input terminal (1.) An ... | 11/30/1999 |
| 5912594 | Compact crystal oscillator having no large capacitor element A Pierce oscillator has been modified to replace the large capacitor with an amplifier element in order to make it more compact. A first amplifier element has a control terminal and a main current path extending between first and second output terminals. ... | 06/15/1999 |
