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Vehicular Impact Signaling Device
An apparatus for the deployment of a visible plume to alert other motorists that a proximate motor vehicle has been involved in a collision.
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| Number | Title | Issue Date |
| 7443920 | Frame-based carrier frequency and phase recovery system and method Header information is used to facilitate coarse frequency and frame recovery. The coarse frequency and frame recovery is thereafter utilized to perform adaptive phase and frequency synchronization on a frame-by-frame basis. A digitized signal representative of a wir... | 10/28/2008 |
| 7349672 | Digital signal transceiver A digital signal transceiver includes a frequency modulator for outputting a high-frequency signal frequency-modulated with a digital signal input thereto, a power amplifier, an antenna terminal, and an antenna switch. The antenna switch includes a first branch port... | 03/25/2008 |
| 7323914 | Charge pump circuit Adverse effects of switching noise produced by a charge pump circuit on a displayed image are prevented. In a synchronizing separation circuit 18, a synchronizing signal is separated from a video signal. The separated synchronizing signal is subjected to ½ f... | 01/29/2008 |
| 7310115 | Imaging device with boosting circuit An imaging device that is activated quickly and prevents deterioration of an image signal. The imaging device includes a boosting circuit for boosting an input voltage to generate a boosted voltage. A solid state imaging device receives the boosted voltage and gener... | 12/18/2007 |
| 7276945 | Low power and low timing jitter phase-lock loop and method A phase-lock loop generates an output clock signal from an input clock signal. The output clock signal is coupled through a clock tree and is fed back to a phase detector, which compares the phase of the output clock signal to the phase of the input clock signal. Th... | 10/02/2007 |
| 7251465 | Method and apparatus for producing mobile radio signals A method and device are provided for producing mobile radio signals, which utilize a direct conversion receiver, at least one first and one second local oscillator and one regenerative divider for processing signals according to different mobile radio standards. For... | 07/31/2007 |
| 7184732 | PLL frequency synthesizer A PLL frequency synthesizer suitable for improving even a spurious characteristic in a lock state while ensuring a high-speed lockup characteristic to thereby implement satisfactoy communication quality includes a switch circuit interposed between a low-pass filter ... | 02/27/2007 |
| 7050111 | Process and device for synchronizing a reference signal with respect to a video signal A synchronization process may include detecting successive horizontal synchronization pulses of a video signal, and a phase comparison between the successive detected pulses and the successive transitions of the reference signal for controlling the oscillator of the... | 05/23/2006 |
| 7046618 | Bridged ultra-wideband communication method and apparatus Systems, apparatus and methods are provided for bridging data to and from different communication physical layers and protocols. The present invention comprises a communication system structured to “bridge” between conventional, narrowband carrier wave communica... | 05/16/2006 |
| 7042260 | Low power and low timing jitter phase-lock loop and method A phase-lock loop generates an output clock signal from an input clock signal. The output clock signal is coupled through a clock tree and is fed back to a phase detector, which compares the phase of the output clock signal to the phase of the input clock signal. Th... | 05/09/2006 |
| 7020227 | Method and apparatus for high-speed clock data recovery using low-speed circuits A clock data recovery (CDR) circuit that can be used for recovering data from a high-speed serial transmission using components that operate at a fraction of the data speed. The CDR consists of a phase detector, an averaging circuit and a phase interpolator. The pha... | 03/28/2006 |
| 6958771 | Image processing apparatus working in response to frequency diffused clock as reference input image signals A system clock generation module varies an oscillation frequency and outputs a frequency diffused clock as a system clock. A synchronizing signal measurement module measures a synchronizing signal characteristic value, which includes at least a synchronizing signal ... | 10/25/2005 |
| 6954511 | Phase-locked loop circuit and delay-locked loop circuit A PLL circuit and a DLL circuit able to stabilize a control voltage within a short time after a phase pull-in operation in each cycle of a reference clock. In a phase comparator, the size of a leading phase or a delayed phase of a feedback signal is detected with re... | 10/11/2005 |
| 6839092 | Feed forward error correction in video decoder In accordance with an embodiment of the present invention a microprocessor in the horizontal phased lock loop reads the horizontal timing with respect to the sync input and provides an increment inch to the horizontal discrete time oscillator to make corr... | 01/04/2005 |
| 6829014 | Frequency bounded oscillator for video reconstruction A frequency range bounder for limiting the frequency of a voltage controlled oscillator uses a multiplexer that responds to comparator inputs indicating whether an input control signal will allow the oscillator frequency to go beyond a predetermined range. If the co... | 12/07/2004 |
| 6768385 | Intelligent phase lock loop A PLL architecture with fast phase acquisition, a stable freerun output frequency, and post-freerun fast phase recovery. The invention is particularly well suited for use in a video graphics a/d conversion circuit. An intelligent phase lock loop is optimized to dete... | 07/27/2004 |
| 6525614 | Voltage boost system having feedback control A voltage boost system for smoothly converging an output voltage of a voltage booster when feedback controlling the output voltage. The voltage boost system includes a voltage booster to increase an input voltage and generate a boosted output voltage. A f... | 02/25/2003 |
| 6479978 | High-resolution measurement of phase shifts in high frequency phase modulators A phase difference to duty-cycle circuit converts a phase shifted signal and a reference signal into a single signal having a duty cycle that is a function of the phase difference between the two signals. The single signal may be further converted to a si... | 11/12/2002 |
| 6433837 | Demodulator, particularly for a SECAM chrominance signal, with double frequency adjustment The demodulating device for a chrominance signal includes an oscillator with a controlled frequency, and an adjuster for adjusting the oscillator frequency as a function of a charge voltage of a memory capacitor. The adjuster preferably includes a fine ad... | 08/13/2002 |
| 6396545 | Method for digital synchronization of video signals A Time Based Correction (TBC) method for digital synchronization of video signals. The time based correction method may be used for satellite based communications to keep clocks synchronized in a multimedia system. Digital receiver clock phases are compar... | 05/28/2002 |
| 6392641 | PLL circuit for digital display apparatus A PLL circuit is provided with a lock/unlock detection circuit which detects the locked or unlocked state of the PLL circuit by comparing the phases of a horizontal synchronizing signal with each other and an internal synchronizing signal generating circu... | 05/21/2002 |
| 6323910 | Method and apparatus for producing high-fidelity images by synchronous phase coherent digital image acquisition An apparatus and method for synchronizing sampling of a video signal to a video synchronization signal of the video signal are provided. The frequency-divided output of an oscillator (or other controllable frequency source) is applied as one input to a ph... | 11/27/2001 |
| 6317005 | Process of clock recovery during the sampling of digital-type signals A process of clock recovery during the sampling of computer-type signals, wherein the sampling clock is generated from a phase locked loop or PLL which multiplies a given frequency by an integer number, includes gauging the position of the edges of the co... | 11/13/2001 |
| 6310653 | Phase comparison and phase adjustment for synchronization to a reference signal that is asynchronous with respect to a digital sampling clock A periodic multi-bit digital signal is synthesized having a frequency that is specified by the frequency of a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. In a digital video system, for ex... | 10/30/2001 |
| 6246292 | Phase lock loop circuit with automatic selection of oscillation circuit characteristics A phase lock loop (PLL) circuit has an oscillation circuit operating in synchronism with a horizontal synchronizing signal. The PLL circuit also has a DC level decision circuit for deciding the DC level of a vertical synchronizing signal during a return p... | 06/12/2001 |
| 6229401 | Horizontal frequency generation A video display apparatus displays pictures from broadcast sources of standard or high definition pictures and may also display computer generated images. To display these sources a horizontal deflection signal generator is operable at a plurality of freq... | 05/08/2001 |
| 6222590 | Phase-locked loop circuit In a phase-locked loop circuit, a vertical synchronous separation circuit separates a vertical sync signal from a composite synchronizing signal to detect part of a vertical synchronizing period. A mask circuit masks the composite synchronizing signal dur... | 04/24/2001 |
| 6194971 | Method and apparatus for phase shifting a controlled oscillator and applications thereof A method and apparatus for providing very small changes in the output oscillation of a controlled oscillation circuit, which may be used in a phase locked loop circuit, is accomplished by a phase-shifting controlled oscillator that includes an oscillation... | 02/27/2001 |
| 6177959 | Circuit and method for generating a clock signal synchronized with time reference signals associated with television signals A clock generation circuit for use in a television system displaying images encoded in television signals and images represented by network application data. The clock generation circuit generates a clock signal synchronized with HSYNC signals of the tele... | 01/23/2001 |
| 6140881 | Display apparatus with a circuit for controlling the input voltage of PLL according to display mode and method A display apparatus for selecting a display mode, based on the horizontal and vertical synchronizing signals and an analog video signal supplied from a host with multiple display modes, includes a mode distinction circuit for generating first to third con... | 10/31/2000 |
| 6008859 | Image data processing apparatus An image data processing apparatus is described that prevents the period of a horizontal timing signal from being shifted. The apparatus includes a separator, a phase-locked loop, a detector, a compensator and a timing signal generator. The detector delay... | 12/28/1999 |
| 6005357 | Vertical oscillation circuit for display device A vertical oscillation circuit includes a self raster discriminating circuit for selectively outputting a vertical sync signal and a vertical flyback signal; a vertical flyback pulse generator for determining the duty of the vertical flyback signal; a pul... | 12/21/1999 |
| 5982239 | Phase locked loop circuit and a picture reproducing device A first phase comparator 22 of digital type and a second phase comparator 32 of sampling type are provided. Near a lock phase, an output current Iout2 is fed from the second phase comparator 32 to a voltage-controlled oscillator 14 through a change-over s... | 11/09/1999 |
| 5977836 | Method and apparatus for controlling an output frequency of a phase locked loop A method and apparatus for controlling an output frequency of a phase locked loop is accomplished by determining a plurality of divider ratios which are based on an input frequency, parameters, and a desired output frequency. Each of the divider ratios is... | 11/02/1999 |
| 5959682 | Data segment sync detection circuit and method thereof A circuit for detecting a data segment sync signal of data segment consisting of a plurality of symbols in a high-definition television, includes a correlator for detecting a correlation value from a received data segment signal, a segment integrator for ... | 09/28/1999 |
| 5815214 | Oscillatory signal generator arrangement An arrangement for synchronizing a digitally generated color subcarrier signal to the color burst signal from another video signal, such as that from a video casette recorder or from a cable television signal, in a manner that allows a line locked clock t... | 09/29/1998 |
| 5777520 | Horizontal oscillation circuit capable of changing frequency A frequency detection circuit detects the frequency of a horizontal sync signal, and generates a mode switching signal corresponding to the detected frequency. A voltage-controlled oscillator constituting a PLL circuit has a plurality of oscillation modes... | 07/07/1998 |
| 5745314 | Clock generating circuit by using the phase difference between a burst signal and the oscillation signal A circuit for generating a clock of a predetermined frequency in folllowing-up relation to an input video signal, comprising a PLL circuit including a phase comparison circuit for comparing the phase of a synchronizing signal of the video signal with the ... | 04/28/1998 |
| 5719532 | Horizontal lock detector A horizontal lock detector circuit monitors charge pump control signals within a horizontal phase-lock loop to determine when the sampling pulses generated by the video system are locked in phase with the synchronization pulses of the input composite vide... | 02/17/1998 |
| 5712532 | Scalable CRT display device and phase synchronous circuit for use in display device A CRT display device capable of displaying a signal from the existing image signal source, in which a vertical frequency is approximately fixed and a horizontal frequency is widely distributed beyond a ratio of 3:1, on one image screen. The CRT display de... | 01/27/1998 |
