Bizarre Patents
Behavior Modification Wristwatch
A wristwatch including a watch band and a watch body having an octagon shaped perimeter and being red in color and having the word STOP thereon to resemble a stop sign.
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| Number | Title | Issue Date |
| 8258877 | Feed-back and feed-forward systems and methods to reduce oscillator phase-noise Systems, methods, and apparatus are described that provide for low phase-noise, spectrally-pure, and low-jitter signals from electrical oscillators. An aspect of the present disclosure includes utilization of an open-loop feed-forward phase-noise cancellation scheme... | 09/04/2012 |
| 8242848 | Oscillation frequency control circuit, and DC-DC converter and semiconductor device having the same An oscillation frequency control circuit configured to control a frequency of a second clock signal of an oscillation circuit generating and outputting the second clock signal having a frequency in response to an input control signal is disclosed. The oscillation fr... | 08/14/2012 |
| 8076979 | Lock detection circuit for phase locked loop A lock detector circuit for detecting a lock condition between a reference signal and a feedback signal includes a first counter for outputting a first counter value indicative of a number of clock cycles of the reference signal, and a second counter for outputting ... | 12/13/2011 |
| 8008978 | Oscillator circuit and memory system An oscillator circuit generates a constant delay time by use of a current source and a load element to determine a frequency of a clock. The oscillator circuit includes an integrator which integrates the clock, a first comparator which compares an output voltage of ... | 08/30/2011 |
| 7649420 | Frequency detecting and converting apparatus A frequency detecting and converting apparatus comprises a plurality of frequency-dividers, a multiplexer, a pulse width detector, a comparing unit and an encoder. The invention automatically detects the operating frequency of an input clock signal, divides the freq... | 01/19/2010 |
| 7646253 | Frequency-locked clock generator A frequency-locked clock generator includes a voltage-controlled oscillator (VCO), a frequency-to-current converter, a reference current source and a gain stage. The VCO generates an output signal. The frequency-to-current converter generates a converter current pro... | 01/12/2010 |
| 7528663 | Microwave oscillator tuned with a ferromagnetic thin film A microwave tuned oscillator utilizing a ferromagnetic thin film resonator comprises: a) a microwave resonator (1) comprising a ferromagnetic thin film resonance plate (110) such as a disc-shaped YIG crystal placed on a microwave integrated circuit ( | 05/05/2009 |
| 7498884 | Self calibrating RC oscillator There is disclosed a self-calibrating resistor-capacitor (RC) oscillator in which a resistor has a resistance value varied minimally by temperature change and process variation, a capacitor has a capacitance value selected adequately according to needs, and the resi... | 03/03/2009 |
| 7424280 | Frequency synthesizer and frequency synthesis method A dual frequency synthesizer includes a reference oscillator, an R counter, a first fractional-N phase-locked loop (for a receiving channel) and a second fractional-N phase-locked loop (for a transmitting channel) and one shared sigma-delta modulator. The reference ... | 09/09/2008 |
| 7411461 | Frequency and/or phase lock loops with beat frequency estimation A control loop (10) for producing an output signal with a stable nominal frequency is provided. The control loop includes inputs for reference (11) and oscillator (25) output signals, a beat frequency generator (12) for producing a signal... | 08/12/2008 |
| 7402821 | Application of digital frequency and phase synthesis for control of electrode voltage phase in a high-energy ion implantation machine, and a means for accurate calibration of electrode voltage phase An improved HE LINAC-based ion implantation system is disclosed utilizing direct digital synthesis (DDS) techniques to obtain precise frequency and phase control and automated electrode voltage phase calibration. The DDS controller may be used on a multi-stage linea... | 07/22/2008 |
| 7372338 | Self-adjusting clock generator with stable frequency output A self-adjusting clock generator is disclosed. The self-adjusting clock generator comprises a voltage control oscillator for generating a frequency output, a frequency to voltage converter for converting the frequency output into a voltage output, and a comparator f... | 05/13/2008 |
| 7372875 | Systems and methods for synchronization in asynchronous transport networks Techniques for synchronizing the clock of a local telecommunications network connected to a remote clock source through an asynchronous transport network such as an Ethernet metropolitan area transport network. A basic holdover loop for retaining the current reconst... | 05/13/2008 |
| 7373575 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated ... | 05/13/2008 |
| 7369000 | Adaptive frequency detector of phase locked loop An adaptive frequency detector used in a phase locked loop for detecting a frequency difference between an input signal and an output clock generated from an oscillator of the phase locked loop includes: a frequency comparator for generating an up signal or a down s... | 05/06/2008 |
| 7366251 | Transmitter for transmitting a combined clock signal and a digital data signal modulated on a carrier wave A transmitter circuit for transmitting a sine wave modulated with digital data, where the sine wave includes a clock signal, and a receiver circuit for demodulating the transmitted sine wave, where the receiver circuit extracts the clock signal and the digital data ... | 04/29/2008 |
| 7362185 | Analog based, state machine controlled, frequency smooth switching method for frequency timing generators A method and circuit for performing switching in a frequency timing generator is described. The method includes detecting a request for a new value for a feedback counter or an reference counter, upon which a loading operation is synchronized for the appropriate cou... | 04/22/2008 |
| 7353011 | Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitanc... | 04/01/2008 |
| 7342461 | Feedback circuit for minimizing VCO sensitivity System and method for adjusting supply voltage to VCO to minimize affects of circuit noise on VCO. Method includes obtaining a number of data points each by incrementing a counter by the number of VCO periods during a phase of a local oscillator, changing the supply... | 03/11/2008 |
| 7313379 | Generation of a self-correcting local oscillation A method and apparatus for generating a self-correcting local oscillation includes processing that begins by generating a frequency correction signal that represents undesired tones introduced by the self-correcting local oscillation. The processing continues by gen... | 12/25/2007 |
| 7288974 | Wave correction clock and method A wave correction clock of the present invention receives a wave signal including time information based on information defined by a pulse width of a rectangular pulse output at a predetermined period, and a period measuring section measures a signal period TRn of t... | 10/30/2007 |
| 7288975 | Method and apparatus for fail-safe and restartable system clock generation A method and apparatus for fail-safe and restartable system clock generation provides recovery from failures due to incorrect clock generator settings or from marginal clock distribution components. Clock failure is detected at a point along the clock distribution p... | 10/30/2007 |
| 7282972 | Bias generator with feedback control A bias generator for initializing a voltage controlled delay line by providing the voltage controlled delay line with a control signal having an initial voltage and monitoring the variable delay line for an output clock signal. The voltage of the control signal is v... | 10/16/2007 |
| 7265637 | Startup/yank circuit for self-biased phase-locked loops An apparatus for controlling a phase-locked loop includes a detector for detecting at least one of a startup condition and a yank condition and a controller for controlling current between a charge pump and the phase-locked loop. If a startup condition is detected, ... | 09/04/2007 |
| 7265711 | High-frequency oscillator, high-frequency transmission-reception apparatus using the same, radar apparatus, and radar-apparatus-equipped vehicle and small boat equipped with the same A high-frequency oscillator that can tune oscillation characteristics is provided. A high-frequency oscillator includes a Gunn diode serving as a high-frequency oscillation element that generates high-frequency signals, a resonator connected to the Gunn diode, a var... | 09/04/2007 |
| 7246025 | Method and apparatus for synchronizing signals in a testing system The preferred embodiments of the present invention provide approaches for synchronizing signals in a testing system. In some embodiments, the timing signal associated with each device under test (DUT) is maintained at an integer multiple of the tester timing signal.... | 07/17/2007 |
| 7242910 | Self-calibrating radio A self-calibrating radio is described. In one exemplary implementation, a radio signal from its local voltage controlled oscillator. The calibration system automatically calibrates the radio by: (i) receiving a reference signal having a calibrated reference frequenc... | 07/10/2007 |
| 7234070 | System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding A memory system includes a memory hub controller that sends write data to a plurality of memory modules through a downstream data bus and receives read data from the memory modules through an upstream data bus. The memory hub controller includes a receiver coupled t... | 06/19/2007 |
| 7230497 | System for controlling frequency of oscillator System for controlling the frequency of an oscillator. A first circuit is coupled to the oscillator and arranged for receiving an externally provided clock signal at a first input node. A second circuit coupled to the oscillator is arranged for receiving an external... | 06/12/2007 |
| 7230503 | Imbalanced differential circuit control A differential circuit includes first and second side circuits which are coupled to receive control signals in such a way as to introduce an intentional imbalance in the differential circuit for certain benefits discussed herein. An exemplary pseudo-differential LC ... | 06/12/2007 |
| 7227346 | Two channel digital phase detector The invention is directed to a digital phase detector that comprises a splitter and phase shifter to receive a signal of a device under test and produce a first signal that is substantially identical to the received signal and a second signal that is phase shifted r... | 06/05/2007 |
| 7218150 | Semiconductor integrated circuit device and differential small-amplitude data transmission apparatus An output driving circuit has a first and second differential output nodes connected to a first and second external output terminals, respectively. A capacitance connection circuit is connected between the first and second differential output nodes. The capacitance ... | 05/15/2007 |
| 7200188 | Method and apparatus for frequency offset compensation Frequency offsets between a received carrier signal and a receiver's LO frequency are compensated by determining the offset and adjusting the phase of a demodulated signal derived from the modulated carrier. For frequency offsets that produce DC voltage offsets in I... | 04/03/2007 |
| 7184507 | Residual phase error correction A phase error correction technique in data communication receivers such as WLAN (Wireless Local Area Network) receivers is provided. A signal having a phase error is received, and a phase error correction mechanism having a loop structure is operated on the input si... | 02/27/2007 |
| 7173749 | Opto-electronic feedback for stabilizing oscillators This application describes use of an opto-electronic feedback in oscillators to suppress phase noise based on the high Q factor of the opto-electronic feedback. ... | 02/06/2007 |
| 7174139 | Delay control in a digital radio transmitter system A relative delay between analog R.F. output signals of a plurality of digital radio transmitters in a digital radio transmitter system is controlled. At least one interface receives delay information for each transmitter. A processing unit determines the relative de... | 02/06/2007 |
| 7171323 | Integrated circuit having clock trim circuitry An integrated circuit is provided comprising a processor, an onboard system clock having a ring oscillator for generating a clock signal, a memory, and clock trim circuitry. The processor is arranged to, in response to receiving an external signal, determine the num... | 01/30/2007 |
| 7171182 | Frequency synthesizers for supporting voice communication and wireless networking standards Techniques are described that facilitate the generation of different waveforms at different frequencies required for transmission and reception of wireless voice signals and wireless data signals. For example, a technique may include generating a first waveform in a... | 01/30/2007 |
| 7159092 | Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same A method and circuit adaptively adjust respective timing offsets of digital signals relative to a clock output along with the digital signals to enable a latch receiving the digital signals to store the signals responsive to the clock. A phase command for each digit... | 01/02/2007 |
| 7155188 | Integrated circuit and receiving device Dispersing directions of oscillation frequency variable ranges of all voltage controlled oscillators provided in an integrated circuit are uniformed, and not only a range covering a frequency regardless of whether a dispersion occurs or not, but also a range coverin... | 12/26/2006 |
