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| Number | Title | Issue Date |
| 8183936 | Phase-locked loop frequency synthesizer and loop locking method thereof A phase-locked loop frequency synthesizer and a loop locking method thereof are provided. The phase-locked loop frequency synthesizer includes a reference route sigma-delta modulator feedback circuit, a reference phase integration circuit coupled to the output end o... | 05/22/2012 |
| 8169265 | Phase lock loop circuits A phase lock loop circuit is provided. A phase frequency detector detects a phase difference between a feedback signal and a reference signal, and generates a phase error signal in response to the detected phase difference. A charge pump consists of at least one cor... | 05/01/2012 |
| 8149065 | Low KVCO phase-locked loop with large frequency drift handling capability A phase-locked loop that supports a large frequency drift capability, yet maintains a low Kvco, and does not introduce noise or discontinuities in the frequency of the generated phase-locked loop output signal. The phase-locked loop may include a VCO with an LC tank... | 04/03/2012 |
| 8111107 | Charge pump control scheme An integrated circuit includes a charge pump having a voltage output. A voltage level detector is arranged to receive the voltage output, wherein the voltage level detector provides a first enable signal for the charge pump. A ring oscillator has multiple inverters.... | 02/07/2012 |
| 8098104 | Estimation and compensation of oscillator nonlinearities A device may include an oscillator circuit, a control circuit, a frequency detector circuit, and a processor circuit. The oscillator circuit may include a frequency control input to output an oscillator signal. The frequency of the oscillator signal depends on an in... | 01/17/2012 |
| 8085099 | Self-calibrating relaxation oscillator based clock source A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock ... | 12/27/2011 |
| 8081034 | Frequency synthesizer for integrated circuit radios An integrated circuit radio transceiver and method therefor includes capacitive loop filter with selectable capacitive elements that are operable to adjust a signal level provided to a voltage controlled oscillator to control a frequency of an output signal of the o... | 12/20/2011 |
| 8067988 | Low jitter and wide-range frequency synthesizer for low voltage operation A low jitter and wide-range frequency synthesizer for low voltage operation includes a detector to generate a detection signal based on a logic level difference between an input signal and a feedback signal, a charge pump to generate a control signal based on the de... | 11/29/2011 |
| 8063708 | Phase locked loop and method for operating the same A phase locked loop can reduce a locking time, thereby efficiently reducing power in a locking operation. The phase locked loop includes a phase detector, a control voltage generator, a voltage controlled oscillator and a start-up driver. The phase detector detects ... | 11/22/2011 |
| 8054137 | Method and apparatus for integrating a FLL loop filter in polar transmitters The invention relates to a method and apparatus for integrating the various circuit components controlling a voltage-controlled oscillator (“VCO”) on an integrated circuit formed on a semiconductor device. In one embodiment, the integrated circuit includes a fir... | 11/08/2011 |
| 8049568 | Feedback-based linearization of voltage controlled oscillator Embodiments of the present invention enable a feedback-based VCO linearization technique. Embodiments include a frequency locked loop formed by feeding back a VCO's output into the VCO's input in negative phase by means of a frequency-to-voltage (F/V) converter. Emb... | 11/01/2011 |
| 8044724 | Low jitter large frequency tuning LC PLL for multi-speed clocking applications The subject innovation relates to systems and/or methodologies for generating a low jitter large frequency tuning LC-based phase-locked loop circuit for multi-speed clocking applications. In addition to a plurality of noise reduction features, the phase-locked loop ... | 10/25/2011 |
| 8044723 | Oscillator signal generation with spur mitigation in a wireless communication device Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for d... | 10/25/2011 |
| 8040192 | Power supply voltage output circuit A power supply voltage output circuit includes: a power supply voltage generation unit generating a power supply voltage to be supplied into a ring oscillator; a reference clock oscillator oscillating a reference clock with respect to a clock oscillated by the ring ... | 10/18/2011 |
| 8022774 | Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic apparatus A phase-locked loop circuit includes a phase detection unit which detects phase information of an input signal, a loop filter unit including a series circuit of a resistor and a capacitor, first and second pulse-current output units which supply pulse currents corre... | 09/20/2011 |
| 7999624 | Radiation source A source of radiation comprises a first low frequency oscillator 200 for providing a reference signal and a plurality of phase shifters 210a, 210b, 210c coupled to the first oscillator. In addition there are a plurali... | 08/16/2011 |
| 7990225 | Low-jitter phase-locked loop A phase-locked loop (PLL) with a decreased frequency tuning gain KVCO and a loop filter using capacitor multiplication technique to get high chip area efficiency. To get decreased frequency tuning gain, KVCO, a voltage to current converter in a... | 08/02/2011 |
| 7973608 | Phase locked loop, semiconductor device, and wireless tag An object is to provide a PLL having a wide operating range. Another object is to provide a semiconductor device or a wireless tag which has a wide operating range in a communication distance or temperature by incorporating such a PLL. The semiconductor device or th... | 07/05/2011 |
| 7969249 | Phase locked loop circuit A phase locked loop circuit is provided comprising a voltage controlled oscillator (VCO), frequency divider, phase frequency detector (PFD), charge pump, waveform generator, loop filter, switching circuit, and lock detector. The VCO generates an oscillation signal. ... | 06/28/2011 |
| 7956695 | High-frequency low-gain ring VCO for clock-data recovery in high-speed serial interface of a programmable logic device A voltage-controlled oscillator operates at high frequency without high gain by dividing the frequency range into a plurality of subranges, which preferably are substantially equal in size. Within any subrange, the full extent of variation in the control signal chan... | 06/07/2011 |
| 7948325 | Apparatus and method for phase lock loop gain control using unit current sources A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit acc... | 05/24/2011 |
| 7944312 | Active free-running frequency circuit for phase-locked loop applications This disclosure relates to a Phase-Locked Loop (PLL) device and a method for providing a stable free-running voltage signal to a voltage controlled oscillator. ... | 05/17/2011 |
| 7944313 | Calibrating control loops Systems and techniques to calibrate a control loop include, in at least one implementation, a system including the control loop configured to generate a clock signal and lock the clock signal to timing marks detected on a machine readable medium, a repetitive error ... | 05/17/2011 |
| 7940129 | Low KVCO phase-locked loop with large frequency drift handling capability A phase-locked loop that supports a large frequency drift capability, yet maintains a low Kvco, and does not introduce noise or discontinuities in the frequency of the generated phase-locked loop output signal. The phase-locked loop may include a VCO with an LC tank... | 05/10/2011 |
| 7936223 | Low spur phase-locked loop architecture A low spur phase-locked loop (PLL) architecture is provided. A frequency-synthesizing PLL that includes a differential Kvco gain linearization circuit with adjustable DC offset is used to reduce clock jitter. The free-running oscillation frequency of the VCO of the ... | 05/03/2011 |
| 7928806 | Low voltage frequency synthesizer using boosting method for power supply voltage of charge pump Provided is a low voltage frequency synthesizer using a boosting method for a power supply voltage of a charge pump. The low voltage frequency synthesizer includes a phase/frequency detector (PFD) that receives and compares a reference frequency and a feedback frequ... | 04/19/2011 |
| 7902929 | Analogue self-calibration method and apparatus for low noise, fast and wide-locking range phase locked loop A method of operating a phase lock loop includes generating a control voltage based on both an output signal of a voltage-controlled oscillator and a reference signal. An operating mode is selected from one of a high-gain mode, a zero-gain mode and a low-gain mode b... | 03/08/2011 |
| 7902928 | Phase-locked circuit employing capacitance multiplication A phase-locked loop circuit. The phase-locked loop circuit comprises a phase detector, a proportional charge pump, a decimator, an integral charge pimp, and a voltage-controlled oscillator. The phase detector obtains an phase error information according to a phase d... | 03/08/2011 |
| 7898344 | Phase-locked oscillator and multi-radar system using same In a multi-radar system, configured comprising a plurality of radar units which generate and output signals the frequency of which increases and decreases periodically, each radar unit generates and outputs signals synchronized with a prescribed sync signal, such th... | 03/01/2011 |
| 7893774 | VCO driving circuit and frequency synthesizer A VCO driving circuit and a frequency synthesizer wherein the impedance viewed from a VCO control terminal is reduced to prevent the VCO phase noise characteristic from degrading. A VCO driving circuit and a frequency synthesizer having the VCO driving circuit, whic... | 02/22/2011 |
| 7893773 | Phase locked loop modulator calibration techniques A method for calibrating a phase locked loop begins by determining a gain offset of a voltage controlled oscillator of the phase locked loop. The processing then continues by adjusting current of a charge pump of the phase locked loop based on the gain offset. ... | 02/22/2011 |
| 7880550 | Voltage translation using feedback to adjust output voltage range Apparatus are provided for a voltage-controlled oscillator module. A voltage-controlled oscillator module comprises an input node for receiving an input voltage, a voltage-controlled oscillator, and voltage translation circuitry coupled between the input node and th... | 02/01/2011 |
| 7872535 | Phase locked loop with capacitive loop filter An integrated circuit radio transceiver and method therefor includes capacitive loop filter with selectable capacitive elements that are operable to adjust a signal level provided to a voltage controlled oscillator to control a frequency of an output signal of the o... | 01/18/2011 |
| 7872536 | Variance correction method, PLL circuit and semiconductor integrated circuit A variance correction method includes generating a reference current depending on a resistance within a lowpass filter and outputting the reference current to a voltage controlled oscillator, and correcting characteristics of the lowpass filter and a gain of the vol... | 01/18/2011 |
| 7859345 | Semiconductor integrated circuit The semiconductor integrated circuit incorporates a PLL circuit including a phase-frequency comparator 1, first and second charge pumps 2 and 3, a loop filter 4, a voltage-control oscillator 5 and a divider 6. The operation ... | 12/28/2010 |
| 7834707 | Linearized charge pump having an offset A charge pump provides charge based on a phase difference between a reference signal and a feedback signal. The relationship between the charge and the phase difference is referred to as the charge phase relationship. Charge pumps typically have a non-linear charge ... | 11/16/2010 |
| 7825738 | Method and system for implementing a low power, high performance fractional-N PLL Aspects of a method and system for implementing a low power, high performance fractional-N PLL synthesizer are provided. The synthesizer comprises a reference generator/buffer, a charge pump, a divider, a VCO, a loop filter, and a phase-frequency detector (PFD). The... | 11/02/2010 |
| 7825739 | Signal processing circuit, signal processing method, and playback apparatus A signal processing circuit includes a feedback control loop that includes a loop filter and that detects the difference between a target value and a control value to control the difference so that the difference has a predetermined value. A closed loop formed in th... | 11/02/2010 |
| 7812677 | Synthesizer characterization in real time A frequency synthesizer includes a phase locked loop (PLL) for generating a desired frequency. The PLL includes two loop filters. A characterization circuit is included, which is configured to receive a digital word for characterizing the PLL and provide a pre-charg... | 10/12/2010 |
| 7791416 | PLL circuit A PLL circuit which can absorb variation of phase noise characteristic due to temperature and individual difference and has a phase noise suppression characteristic stable in a wide frequency band is provided. The PLL circuit comprises, at the succeeding stage, a fi... | 09/07/2010 |
