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| Number | Title | Issue Date |
| 7994851 | PSK demodulator using time-to-digital converter A PSK demodulator using a time-to-digital converter includes: a filter unit that performs band pass filtering on a PSK signal; an amplitude limiting unit that limits the amplitude of an output signal of the filter unit; a clock signal generating unit that generates ... | 08/09/2011 |
| 7911266 | Low complexity and low power phase shift keying demodulator structure A low complexity and low power phase shift keying demodulator structure includes a digitizer, a phase-transition-independent carrier clock extractor, a binary correlater, a delay element, and a sampler. The digitizer digitizes a BPSK signal for an output waveform. T... | 03/22/2011 |
| 7313753 | Detector for detecting information carried by a signal having a sawtooth-like shape A detector for detecting information carried by a signal having a sawtooth-like shape. The detector includes a first band-pass filter with center frequency around a first frequency value for filtering the signal and generating a first filtered signal, a second band-... | 12/25/2007 |
| 7305030 | Method and apparatus for implementation of a zero forcing equalizer An equalizing apparatus includes an equalizer which has a plurality of adjustable tap weights that equalizes a received signal based on values of the adjustable tap weights, a tap weight update calculation unit coupled to the equalizer and which determines tap weigh... | 12/04/2007 |
| 7233634 | Maximum likelihood decoding A method of maximum likelihood decoding for detecting the signals transmitted over a Multiple-Input-Multiple-Output (MIMO) channel of a communication system in which there are N co-channel transmit antennas and M co-channel receive antennas. In a first method an ort... | 06/19/2007 |
| 7187730 | Method and apparatus for predicting CCK subsymbols An apparatus and a method for symbol decoding of baseband data in a wireless communications network is disclosed, and specifically CCK subsymbol prediction and symbol demodulation that occurs at 5.5 Mbps or 11 Mbps. The apparatus is configured to demodulate or predi... | 03/06/2007 |
| 7148743 | Demodulation device for reacquiring a modulated signal if reception is interrupted A demodulation device is provided that includes first and second power control circuits and demodulation circuits. The first power control circuit keeps the amplitude of a modulated input signal constant, and the demodulation circuits applying a demodulation process... | 12/12/2006 |
| 7088076 | Power management for battery powered appliances A power management topology for portable electronic devices that includes a feed-enabled AC/DC adapter that receives feedback data from a charge controller associated with the portable device. The feedback data can include battery charging current, battery voltage, ... | 08/08/2006 |
| 7079600 | FSK demodulator using DLL and a demodulating method A system and method are disclosed for providing a FSK demodulator using DLL and a demodulating method which detects a time order of the rising edges of square waves that correspond to two modulation frequencies and an in-between frequency and demodulates the relevan... | 07/18/2006 |
| 6971207 | Explosion-resistant wall construction A wall construction with increased resistance to overpressure, such as over-pressure as a consequence of explosions, comprises an essentially flat panel with a wall panel that is welded to adjoining structural components. The adjoining structural components are prov... | 12/06/2005 |
| 6879646 | Quadrature amplitude modulation demodulator and receiver A QAM demodulator comprises a timing synchronizer whose output is supplied via an adaptive equalizer to a carrier synchronizer, all of which are controlled by a controller. The timing synchronizer resamples the incoming signal in the digital domain with a sampling p... | 04/12/2005 |
| 6839389 | Digital quadrature demodulation and decimation without multipliers One embodiment of the present invention includes a gating circuit, a demultiplexer, and an integrator. The gating circuit gates an input sample with a first clock, the input sample being clocked by a sampling clock N times faster than the first clock. The demultiple... | 01/04/2005 |
| 6459743 | Digital reception with radio frequency sampling A radio frequency signal is received by using a sigma-delta analog-to-digital converter to sample the radio frequency signal at a sampling rate and to generate therefrom 1-bit digital samples representing a digital intermediate frequency signal. The inter... | 10/01/2002 |
| 6246281 | Absolute phasing circuit An absolute phasing circuit having a simplified phase rotating means constituting a remapper. The phase rotation angle of a receiving phase for the signal point arrangement on the transmitting side is detected, and a phase rotation signal RT (3) based on ... | 06/12/2001 |
| 6236263 | Demodulator having cross polarization interference canceling function A demodulator with a cross polarization interference canceling function for canceling interference of cross polarization in the main polarization includes a demodulating unit for demodulating a baseband signal of the main polarization, a phase control uni... | 05/22/2001 |
| 6163208 | One bit digital phase shift keyed carrier recovery and demodulator circuit A phase shift keyed carrier recovery and demodulator circuit which includes a phase detector and subsequent feedback control loop circuitry which maintains an initial phase relationship. By comparing an incoming phase modulated carrier with the multiple p... | 12/19/2000 |
| 6140869 | Device for demodulating a binary phase-shift keyed signal A device for demodulating a binary signal having a predetermined carrier frequency and phase-modulated by encoded pulses. The device includes a phase-locked loop circuit having a phase comparator followed by a low-pass filter and a voltage-controlled osci... | 10/31/2000 |
| 6133785 | False carrier lock receiver and associated methods for detection A receiver includes a demodulator and a false carrier lock detector circuit for a quadrature amplitude modulated (QAM) signal. The demodulator includes a controllable oscillator and an offset frequency generator for generating an offset frequency for the ... | 10/17/2000 |
| 6130577 | Digital demodulators for phase modulated and amplitude-phase modulated signals In a digital demodulator for phase modulated signals, logical values of a waveform-shaped phase-modulated signal are sampled based on a clock signal having a period that stands in integer ratio relationship to a carrier period of the modulated signal and ... | 10/10/2000 |
| 6075408 | OQPSK phase and timing detection A method and an apparatus for generating an error estimate as input for an error recovery loop of a demodulator which receives an offset quadrature phase shift keyed (OQPSK) signal having a symbol interval. The method comprises the following operations: (... | 06/13/2000 |
| 6075827 | DQPSK mapping circuit A DQPSK mapping circuit is disclosed which comprises: a parallel decoding circuit having inputs for decoding first to 2Nth bits of input data and one symbol period prior I and Q data which are prior by one symbol period from the present decoding cycle the... | 06/13/2000 |
| 6028475 | Method and apparatus for demodulating multi-level QAM signal Disclosed is a demodulating apparatus for preventing a reduction in reliability of demodulated data even if a signal point of a multi-level QAM signal is detected, because of influence from fading or noises, in a position where such a signal is not normal... | 02/22/2000 |
| 5977820 | Phase estimating circuit and demodulating circuit The presence or absence of a clock component is detected for an input signal. If the input signal does not comprise a clock component, the operation of a computing circuit is halted, thereby further improving the accuracy of phase estimation. A signal gen... | 11/02/1999 |
| 5977821 | Digital detection method and circuit for PSK modulated signals In a digital radio communication apparatus which receives PSK modulated signal, a plurality of items of quantized data are sampled at a plurality of points including a central point, which corresponds to one of each rising edge or each decaying edge of a ... | 11/02/1999 |
| 5945875 | π/n shift phase-shift keying demodulator A π/n shift PSK demodulator of this invention is formed with a digital logical means through the following method. XOR4 calculates the ex-OR operation between the present sample through π/4 shift QPSK output from SH2 and the previous one output from SH1... | 08/31/1999 |
| 5942937 | Signal detection circuit using a plurality of delay stages with edge detection logic A signal detection circuit employs a delay line with edge detection logic for capturing and buffering timing information about an input signal. A plurality of comparators for comparing the input signal to different reference potentials capture amplitude i... | 08/24/1999 |
| 5933053 | Burst demodulator A burst demodulator prevents transmission efficiency from being lowered, and a dynamic range of an input strength from being narrowed, by providing a stable frame signal even if the reaction is rapid against the input and the input strength is low. A loga... | 08/03/1999 |
| 5892797 | System and method for recovering data encoded using manchester code and other bi-phase level codes A data and clock recovery circuit includes a front end circuit for receiving a data signal encoded with a Manchester or other bi-phase level code having a sequence of bit frames, and for outputting a recovered data signal and a recovered clock signal in a... | 04/06/1999 |
| 5808509 | Receiver and demodulator for phase or frequency modulated signals In a quadrature receiver for phase and/or frequency modulated signals an intermediate phase signal is quantized to produce a quantized phase signal. The receiver includes a demodulator in which pulses are generated from the quantized phase signal and it i... | 09/15/1998 |
| 5805018 | High-speed demodulating method of burst data and apparatus for same A high-speed demodulating method of burst data capable of performing demodulation process at high speed in a single hardware structure. An input signal digitally modulated is taken in into an input unit to be sampled and latched therein by a sampling cloc... | 09/08/1998 |
| 5789988 | Clock recovery circuit for QAM demodulator In a clock recovery circuit in a demodulator of a multi-level quadrature amplitude modulation (QAM) system, an analog/digital (A/D) converter performs an A/D conversion upon a coherent-detected baseband analog signal in synchronization with a sampling clo... | 08/04/1998 |
| 5786725 | Reduced complexity maximum likelihood multiple symbol differential detector A reduced complexity maximum likelihood multiple symbol differential detector which utilizes a maximum likelihood sequence estimation of the transmitted phase and does so by expanding the observation window to observe the received symbol over N signal int... | 07/28/1998 |
| 5777511 | Data demodulation apparatus A digital modulating signal, which is a binary conversion of an RDS signal by a comparator, is sampled by a D-FF with a regeneration clock synchronized with a carrier regenerated by a carrier regeneration circuit. Next, a comparator output is input by an ... | 07/07/1998 |
| 5640427 | Demodulator A demodulator is described which includes a hard limiter, reference generator and a phase determiner. The hard limiter produces a binary phase-modulated signal from an analog phase modulated input signal having a first frequency. The reference generator p... | 06/17/1997 |
| 5614861 | N-phase modulated signal demodulation system with carrier reproduction A phase modulated signal demodulation system which is not affected by noise and distortion of an input signal. The system includes a carrier reproduction PLL circuit for generating a reproduction reference clock having a frequency which is N times of a ca... | 03/25/1997 |
| 5610948 | Digital demodulation apparatus A demodulation apparatus of digital detection processing type of the invention offers versatility as consumer equipment in mobile communications, ATV, satellite broadcasting, CATV, and the like. A modulated wave output is obtained by multiplying an input ... | 03/11/1997 |
| 5574399 | Coherent PSK detector not requiring carrier recovery A coherent phase-shift keying (PSK) detector in a receiver generates an unmodulated carrier signal, without attempting to synchronize the unmodulated carrier signal in frequency or phase to the carrier employed at the PSK transmitter. The instantaneous ph... | 11/12/1996 |
| 5526381 | Robust non-coherent detector for π/4-DQPSK signals A technique of demodulating a π/4-DQPSK composite carrier waveform using a non-coherent discriminator based receiver is presented. In particular, a means of recovering π/4-DQPSK modulated data symbols using a dual output discriminator in conjunction wit... | 06/11/1996 |
| 5524120 | Digital low power symbol rate detector This detector provides a computationally simple digital low power detector of symbol rate, also called baud rate. It uses an approximate Hilbert transform function to create approximate in-phase and quadrature signals. An approximate envelope detector (fe... | 06/04/1996 |
| 5521938 | Apparatus for performing frequency conversion in a communication system An efficient apparatus for performing frequency conversion from a final IF frequency to a baseband frequency is described. A counter (401) generates two logical signals G1 (402) and G2 (403) which are passed to an exclusive-OR gate (404) and a multiplexer... | 05/28/1996 |
