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3M employee and church chorister Art Fry needed something to temporarily mark pages in his hymnal. He was in luck because his colleague, Spencer Silver, accidentally developed a glue that was too weak for other purposes. After initially discouraging consumer response, Post-it Notes became a hit in 1979.
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| Number | Title | Issue Date |
| 8111091 | High speed track and hold circuit Examples of systems and methods are provided for tracking-and-holding an input signal. The system may produce a pair of differential voltage outputs responsive to a pair of differential voltage inputs. The system may couple, in response to a clock signal, an input a... | 02/07/2012 |
| 7990185 | Analog finite impulse response filter According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate parasitic capacitance from attenuating an output signal at both first and second differential output term... | 08/02/2011 |
| 7847601 | Comparator and pipelined ADC utilizing the same A comparator includes a plurality of switches, a capacitor, an amplifier, and a latch. The switches provide an input signal during a first period and provide a reference signal during a second period. A first switch among the switches is composed of a first transist... | 12/07/2010 |
| 7595666 | Amplifier circuit for double sampled architectures A double sampled switched capacitor architecture as described herein includes an amplifier having two separate inputs corresponding to two separate amplifier sections. The amplifier uses a first differential transistor pair for the first amplifier section, a second ... | 09/29/2009 |
| 7518414 | Track-and-hold peak detector circuit A track-and-hold peak detector circuit, which can operate at low input signal frequencies, includes a capacitor to hold a peak voltage of the input signal and logic circuitry that reduces an effect of leakage current into or out of the capacitor, and therefore, prov... | 04/14/2009 |
| 7495480 | Reference voltage driving circuit with a compensating circuit A compensating circuit for calibrating reference voltage, which is coupled to an operation amplifier having an input end and an output end within a reference voltage driving circuit, is provided in the present invention. The compensating circuit comprises a first ca... | 02/24/2009 |
| 7449923 | Amplifier circuit for double sampled architectures A double sampled switched capacitor architecture as described herein includes an amplifier having two separate inputs corresponding to two separate amplifier sections. The amplifier uses a first differential transistor pair for the first amplifier section, a second ... | 11/11/2008 |
| 7439778 | Signal sampling apparatus and method A signal sampling apparatus for generating an output signal according to an input signal is disclosed. The signal sampling system includes a sample and hold circuit and a gain controller. The sample and hold circuit is used for sampling the input signal to generate ... | 10/21/2008 |
| 7423458 | Multiple sampling sample and hold architectures A sample and hold circuit architecture samples using two capacitors that are cyclically switched between charge and discharge modes. The sample and hold circuit includes a buffer to receive an input signal to be sampled, a first sampling capacitor, a second sampling... | 09/09/2008 |
| 7403046 | Sample-and-hold circuits A sample-and-hold circuit including a first switch, a first capacitor and an amplifier is provided. The switch has a first terminal to receive the input signal and transmit it to a second terminal thereof in the sample period. The first terminal of the first capacit... | 07/22/2008 |
| 7397287 | Sample hold circuit and multiplying D/A converter having the same A sample hold circuit includes an op-amp, first capacitors provided on an inverting side of the op-amp and second capacitors provided on a non-inverting side. The sample hold circuit is configured such that a total capacitance of the first and second capacitors to w... | 07/08/2008 |
| 7372307 | Efficient current monitoring for DC-DC converters A current monitoring circuit for DC-DC switching converters includes a track and latch comparator circuit (30) having a preamplifier (32) that is controlled independently of a latch circuit (34). The comparator is small and operates very fast an... | 05/13/2008 |
| 7368900 | Constant voltage circuit and constant current source, amplifier, and power supply circuit using the same A constant voltage circuit is disclosed that includes a constant voltage generator circuit part converting an input voltage into a predetermined constant voltage in accordance with an externally input control signal and outputting the constant voltage; a first capac... | 05/06/2008 |
| 7365589 | Bandgap reference circuit A bandgap reference circuit, taking two or more power supplies as the input power supply for outputting a reference voltage, includes a first reference circuit, a second reference circuit, a power selection circuit and a switch circuit. The first and second referenc... | 04/29/2008 |
| 7365597 | Switched capacitor amplifier with higher gain and improved closed-loop gain accuracy A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the ... | 04/29/2008 |
| 7355456 | Wide linear range peak detector A wide linear range peak detector including first and second peak detectors and a compensation circuit. The first peak detector receives an input signal and has an output providing a first peak signal approximation which approximates a peak level of the input signal... | 04/08/2008 |
| 7339984 | Method and apparatus for jitter measurement using phase and amplitude undersampling An apparatus and method for measuring jitter using phase and amplitude undersampling. A sampling circuit samples an input signal to obtain amplitude and phase information, a computation circuit determines Time Interval Error (TIE) information from the amplitude and ... | 03/04/2008 |
| 7332941 | Analog switch circuit and sample-and-hold circuit including the same First and second analog switches are connected in series between first and second nodes. One terminal of a third analog switch is connected to a series connection node of the first and second analog switches. The other terminal of the third analog switch is supplied... | 02/19/2008 |
| 7315200 | Gain control for delta sigma analog-to-digital converter Gain control for delta sigma analog-to-digital converter. A method is disclosed for driving the input of an integrator in a delta-sigma converter having an amplifier with a non-inverting input, an output and a positive input connected to a reference voltage and an i... | 01/01/2008 |
| 7304881 | Ferroelectric memory with wide operating voltage and multi-bit storage per cell Apparatus and methods are described for a multi-level FeRAM memory device. Using write and read circuits associated with the memory device, multiple data states may be written to and read from the ferroelectric memory device which are associated with a single polari... | 12/04/2007 |
| 7304518 | Track and hold circuit A track and hold circuit (1) comprising:—a linear amplifier (2) receiving a differential analog signal (D+, D−) and being controlled by a first binary clock signal (H+) having a first phase,—the linear amplifier (2) providing a feed-forwar... | 12/04/2007 |
| 7295042 | Buffer A switched capacitor buffer operating by the push-pull method is taught. The buffer may include a pull-up device and a pull-down device. A switched capacitor circuit may be used to control the pull-up device and the pull-down device to achieve accurate push-pull ope... | 11/13/2007 |
| 7289698 | High bitrate transport over multimode fibers A multimode fiber system includes a transmitter for transmitting an optical signal and a receiver that receives the optical signal. At least one mode filter is coupled between the receiver and the transmitter and passes only a specific set of fiber modes from the tr... | 10/30/2007 |
| 7285999 | Circuit for use in frequency or phase detector A tracking data cell (10) comprising: —a pair of track and hold circuits (1, 1′) coupled to a first multiplexer (5), —a clock signal (H+, H−) being inputted substantially in anti-phase in the respective track and hold circuits (1, 1 | 10/23/2007 |
| 7283596 | PAM-4 data slicer having symmetrical offset A PAM-4 data slicer includes first, second, and third comparators which provide first, second, and third thresholds, respectively. Each of the comparators has an offset. The first and third comparators have an offset generating arrangement at their outputs to provid... | 10/16/2007 |
| 7279940 | Switched-capacitor circuit with time-shifted switching scheme A switched-capacitor circuit for sampling a pair of differential input signals includes a first bootstrapped switch and a first non-boosted switch connected in parallel between a first output terminal of an amplifier and a first feedback node of the switched-capacit... | 10/09/2007 |
| 7271625 | Sample-and-hold device having input stages of amplifier coupled to capacitors A sample-and-hold device including first and second capacitors, first and second switches, amplifier and feedback network is provided. The amplifier includes first and second input stages, output stage and switchable bias current source. The first switch and the fir... | 09/18/2007 |
| 7253664 | Reference voltage driving circuit with a compensating circuit and a compensating method of the same A compensating circuit for calibrating reference voltage, which is coupled to an operation amplifier having an input end and an output end within a reference voltage driving circuit, is provided in the present invention. The compensating circuit comprises a first ca... | 08/07/2007 |
| 7245536 | Precision non-volatile CMOS reference circuit A voltage reference circuit provides a reference voltage that can be precisely programmed. The threshold voltage of a first non-volatile memory (NVM) transistor is programmed while coupled in parallel with a reference NVM transistor. During programming, the referenc... | 07/17/2007 |
| 7239183 | Active current mode sampling circuit The invention relates to an active current mode sampling circuit comprising an operational amplifier (103) and at least one switched capacitor (C2, C2a, C2b). In order to reduce the power consumption of such a circuit... | 07/03/2007 |
| 7236656 | Optical transport network An optical transport network comprises a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip and a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip. ... | 06/26/2007 |
| 7233173 | System and method for providing a low jitter data receiver for serial links with a regulated single ended phase interpolator A system and method is disclosed for providing a clock and data recovery circuit that comprises a low jitter data receiver. The low jitter data receiver comprises a phase interpolator, an amplifier unit and a data sampling comparator. The phase interpolator and the ... | 06/19/2007 |
| 7224213 | Switched capacitor ripple-smoothing filter A switched-capacitor ripple-smoothing filter includes a first pair of capacitors. The filter is configured such that either capacitor in the first pair may be reset and have a terminal coupled to a first input port and such that the remaining capacitor in the first ... | 05/29/2007 |
| 7224858 | Optical transmission network with a receiver photonic integrated circuit (RxPIC) utilizing an optical service chanel (OSC) An optical receiver photonic integrated circuit (RxFIC) comprises a semiconductor monolithic chip having an input to receive from an optical transmissior link a combined channel signal originating from an optical transmitter source and comprising a plurality of chan... | 05/29/2007 |
| 7218650 | Wavelength reference filter A wavelength reference filter for receiving an input signal and producing a filtered output signal is provided. The operation of the filter is independent of the angle of incidence of the input signal. As a result, the output signal from the filter will maintain its... | 05/15/2007 |
| 7194156 | High bit rate optical communication over multimode fibers An optical communication system includes a transmitter that receives an input optical signal from an optical source and performs filtering so that an output signal from the transmitter includes a specific set of fiber modes that are allowed to pass for further proce... | 03/20/2007 |
| 7180354 | Receiver having full signal path differential offset cancellation capabilities There is described an improved receiver which first comprises an analog input amplifier a sample and hold differential circuit and two stages of differential comparators that are connected in series, wherein the first stage consists of two comparators and the second... | 02/20/2007 |
| 7176719 | Capacitively-coupled level restore circuits for low voltage swing logic circuits A level restore circuit includes differential sides and a capacitive network having capacitors cross-coupled between the differential sides to provide a capacitively-coupled positive feedback between the differential sides. The level restore circuit further includes... | 02/13/2007 |
| 7170433 | Analog I/O board providing analog-to-digital conversion and having a two-level buffer that allows demand based access to converted data A system and method for converting analog signals to digital signals minimize the latency of the analog to digital conversion for real-time systems. The conversion system and method implements the hardware of an analog to digital converter input/output (I/O) board a... | 01/30/2007 |
| 7158699 | Method of optimizing optical channel signal demultiplexing in a monolithic receiver photonic integrated circuit (RxPIC) A method is disclosed for optimizing optical channel signal demultiplexing in a monolithic receiver photonic integrated circuit (RxPIC) chip by providing an integrated channel signal demultiplexing with multiple waveguide input verniers provided to an WDM signal dem... | 01/02/2007 |
