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| Number | Title | Issue Date |
| 8446181 | Sampling circuit and image signal amplifying circuit each including feedback clamp block and image sensor including the image signal amplifying circuit A sampling circuit samples an input signal by using at least one switch, at least one capacitor, an amplifier, and a clamp block connected between an output terminal and a negative input terminal of the amplifier. The clamp block prevents a difference between a volt... | 05/21/2013 |
| 8410822 | Comparator-based buffer with resistive error correction A comparator-based buffer method and system enhance the driving capability of high-gain amplifiers with switched-capacitor loads. It includes a current source, a comparator, switches, sampling capacitor and overshoot correction resistor. A correction solution using ... | 04/02/2013 |
| 8319527 | Analog sampler with reduced input current Methods and systems for analog to digital converter and systems incorporating the same are provided. Specifically, an analog sampler that has a reduced input current is disclosed. According to the present teaching, an apparatus for sampling an input voltage includes... | 11/27/2012 |
| 8305114 | Track-and-hold circuit with low distortion A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates ... | 11/06/2012 |
| 8183889 | Common-mode insensitive sampler An approach to rejecting input common-mode voltage variations in a sampler/converter that avoids the use of a differential amplifier in the signal path, and without introducing added distortion or noise. In one embodiment, the input common-mode variations are sensed... | 05/22/2012 |
| 8179165 | Precision sampling circuit A sampling circuit including a number of state elements or flip-flops. The state elements or flip-flops are each clocked by a signal that causes them to sample their inputs at a predetermined time. In sampling a plurality of digital inputs, a captured delay chain va... | 05/15/2012 |
| 8115518 | Integrated circuit for reducing nonlinearity in sampling networks An integrated circuit allows for the correction of distortion at an input of a sampling network. The integrated circuit contains a first bootstrap circuit to drive a sampling network transistor and a second bootstrap circuit to separate the back-gate terminal of the... | 02/14/2012 |
| 8044688 | Systems and methods for determining an out of band signal Various embodiments of the present invention provide systems and circuits that provide for out of band detection. As one example, an out of band detection circuit is disclosed that includes an input signal, a clock generation circuit, and a sampling circuit. The clo... | 10/25/2011 |
| 8035421 | Versatile charge sampling circuits A charge sampling circuit, has a control signal generator for controlling an analog input signal to the charge sampling circuit to be integrated by an integrator during a sampling phase responsive to a sampling signal from the control signal generator. The current o... | 10/11/2011 |
| 7940091 | Bootstrapped switch for sampling voltages beyond the supply voltage Methods and apparatus for sampling an input voltage and apparatus incorporating the same are disclosed. An input voltage sampling apparatus includes a voltage sampling circuit coupled to the input voltage and configured to produce a sampled input voltage at an outpu... | 05/10/2011 |
| 7863943 | Sampling device and circuit having a single voltage supply In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various emb... | 01/04/2011 |
| 7843232 | Dual mode, single ended to fully differential converter structure A dual mode, single ended to fully differential converter structure is incorporated into a fully differential sample and hold structure which can be coupled with an ADC as a front end for mixed mode applications. The structure incorporates additional switches which ... | 11/30/2010 |
| 7812646 | Low-leakage switch for sample and hold An integrated electronic device includes a sample and hold stage. The sample and hold stage has a sampling capacitor (C) for an input voltage at an input node (Vin), a first switch (S1) coupled between the input node (Vin) and the sampling capacitor (C) for c... | 10/12/2010 |
| 7804337 | Method and apparatus of SFDR enhancement A track-and-hold or sample-and-hold (S/H) circuit for an analog-to-digital converter (ADC) is provided. A difference between the disclosed S/H circuit and conventional S/H circuits is the use of a peaking circuit. This peaking circuit generally provides increased cu... | 09/28/2010 |
| 7804336 | Track-and-hold circuit with low distortion A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates ... | 09/28/2010 |
| 7786767 | Common-mode insensitive sampler An approach to rejecting input common-mode voltage variations in a sampler/converter that avoids the use of a differential amplifier in the signal path, and without introducing added distortion or noise. In one embodiment, the input common-mode variations are sensed... | 08/31/2010 |
| 7782096 | Track-and-hold circuit with low distortion A track-and-hold circuit capable of tracking an analog input signal and holding a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. A first capacitor ... | 08/24/2010 |
| 7737732 | Constant slope ramp circuits for sample-data circuits A sample-data analog circuit includes a level-crossing detector. The level-crossing detector controls sampling switches to provide a precise sample of the output voltage when the level-crossing detector senses the predetermined level crossing of the input signal. A ... | 06/15/2010 |
| 7724043 | Common mode controller for a sample-and-hold circuit A common mode controller circuit (60) for maintaining a common mode voltage (Vcm) at a first node (52) and a second node (54) in a sample-and-hold circuit receiving a pair of AC coupled differential input signals (Vinp, Vinn) includes first and ... | 05/25/2010 |
| 7724041 | Circuit arrangement comprising a sample-and-hold device and method for signal processing in a sample-and-hold device In a circuit arrangement including a sample-and-hold device, the sample-and-hold device includes a first, a second, a third and a fourth charge store, and also a first and a second input terminal for feeding in a differential input signal comprising a first and a se... | 05/25/2010 |
| 7724042 | Reducing power consumption in an amplification stage driving a sample and hold circuit while maintaining linearity An input signal to be sampled by a sample and hold circuit is amplified separately by two amplifiers. The output of the first amplifier is provided to a boost circuit to maintain the impedance of a sampling switch contained in a signal dependent boost switch substan... | 05/25/2010 |
| 7656200 | Multiple-phase, differential sampling and steering Methods and systems to controllably steer multiple phases of a differential signal, including to generate a differential current in response to a differential voltage, to controllably steer the differential current between multiple output circuits in response to cor... | 02/02/2010 |
| 7635996 | Differential blocking sampler, in particular for an analog digital converter The invention relates to a blocking sampler intended in particular to be used upstream of a fast analog digital converter. The blocking sampler comprises two main semi-samplers each having a respective differential input (E, E′) and a respective differentia... | 12/22/2009 |
| 7564273 | Low-voltage comparator-based switched-capacitor networks Described is a switched-capacitor network and method for performing an analog circuit function. The circuit includes a switched-capacitor network, a comparator, and a voltage-offset network. The switched-capacitor network includes multiple switches, each having a re... | 07/21/2009 |
| 7541846 | Sample-and-hold apparatus and operating method thereof A sample-and-hold apparatus and an operating method thereof are provided. The sample-and-hold apparatus includes a sampling amplifier, a transistor, a first switch, a second switch, a sampling capacitor, and a drain-charge unit. A first input terminal of the samplin... | 06/02/2009 |
| 7532042 | Precision sampling circuit A sampling circuit includes an input voltage source; a first switch having an input operatively connected to the input voltage source; a sampling capacitor operatively connected to an output of the first switch; an operational amplifier having an inverting input ope... | 05/12/2009 |
| 7479810 | Slew-rate detection circuit using switched-capacitor comparators In general, in one aspect, the disclosure describes an apparatus that includes a first switched capacitor comparator to be charged to a first reference voltage and to compare an input signal to the first reference voltage and to generate a first output signal when t... | 01/20/2009 |
| 7477078 | Variable phase bit sampling with minimized synchronization loss Variable phase bit sampling implementations are disclosed which minimize requirements for downstream digital processing resynchronization in systems that incorporate adjustable bit phase sampling that utilize variable delay elements which can interrupt the clocking ... | 01/13/2009 |
| 7459943 | High accuracy sample and hold circuit having a common negative input terminal A high accuracy sample and hold circuit including a first switch, a second switch, a first capacitor, a second capacitor and an amplifier is disclosed. The first capacitor receives and saves a sampling voltage from the first switch during a first period, while the s... | 12/02/2008 |
| 7453291 | Switch linearized track and hold circuit for switch linearization Circuits that provide a gate boost to address non-linear threshold voltage variation in a CMOS T/H circuit. In embodiments of the invention, a boost capacitor and a feedback amplifier add a signal-dependent threshold voltage to the switch gate over-drive voltage of ... | 11/18/2008 |
| 7436221 | Methods and apparatus for ultra-low leakage analog storage An analog storage cell circuit includes a switch that minimizes subthreshold conduction and diode leakage, as well as an accumulation-mode coupling mechanism to minimize overall switch leakage to minimize accumulation-mode leakage. In one embodiment, an analog stora... | 10/14/2008 |
| 7423458 | Multiple sampling sample and hold architectures A sample and hold circuit architecture samples using two capacitors that are cyclically switched between charge and discharge modes. The sample and hold circuit includes a buffer to receive an input signal to be sampled, a first sampling capacitor, a second sampling... | 09/09/2008 |
| 7397287 | Sample hold circuit and multiplying D/A converter having the same A sample hold circuit includes an op-amp, first capacitors provided on an inverting side of the op-amp and second capacitors provided on a non-inverting side. The sample hold circuit is configured such that a total capacitance of the first and second capacitors to w... | 07/08/2008 |
| 7358834 | Transmission line voltage controlled nonlinear signal processors Waveguide nonlinear signal processors include transmission lines defined on a substrate. A plurality of varactors or pairs of varactors are situated along the transmission line and are in communication with a signal conductor of the transmission line and one or more... | 04/15/2008 |
| 7355456 | Wide linear range peak detector A wide linear range peak detector including first and second peak detectors and a compensation circuit. The first peak detector receives an input signal and has an output providing a first peak signal approximation which approximates a peak level of the input signal... | 04/08/2008 |
| 7332940 | Voltage hold circuit and clock synchronization circuit A voltage hold circuit which holds an input signal voltage includes a voltage comparator unit configured to output a result of comparison between a voltage of an externally inputted control signal and a voltage of an outputted analog hold signal, a digital value hol... | 02/19/2008 |
| 7332941 | Analog switch circuit and sample-and-hold circuit including the same First and second analog switches are connected in series between first and second nodes. One terminal of a third analog switch is connected to a series connection node of the first and second analog switches. The other terminal of the third analog switch is supplied... | 02/19/2008 |
| 7321735 | Optical down-converter using universal frequency translation technology A method and system for converting an optical signal to electrical information signals, including demodulated baseband information signals and modulated baseband signals at multiple harmonics. In an embodiment, the optical information signal is amplitude modulated w... | 01/22/2008 |
| 7317414 | Digital to analog converter with reduced ringing Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matri... | 01/08/2008 |
| 7315200 | Gain control for delta sigma analog-to-digital converter Gain control for delta sigma analog-to-digital converter. A method is disclosed for driving the input of an integrator in a delta-sigma converter having an amplifier with a non-inverting input, an output and a positive input connected to a reference voltage and an i... | 01/01/2008 |
