Did You Know...
...that in 1800 ether was first used by partyers as a fun diversion? Sniffing the gas led to hilarious and raucous laughter as people watched each other become more and more intoxicated and silly. Several doctors independently realized the value ether would have to anesthetize surgery patients. Of those who claimed rights to the "discovery," none had a happy ending. One had a seizure and died defending his rights. Another spent his life in an asylum because he had been denied acclaim. A third became addicted to chloroform and, in a New York City jail, he soaked a cloth in the drug, severed an artery and bled to death.
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| Number | Title | Issue Date |
| 8067979 | Semiconductor device and power supply device using the same A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, a... | 11/29/2011 |
| 7978006 | Quantum interference transistors and methods of manufacturing and operating the same A quantum interference transistor may include a source; a drain; N channels (N≧2), between the source and the drain, and having N−1 path differences between the source and the drain; and at least one gate disposed at one or more of the N channels. One or more of... | 07/12/2011 |
| 7948307 | Dual dielectric tri-gate field effect transistor A dual dielectric tri-gate field effect transistor, a method of fabricating a dual dielectric tri-gate field effect transistor, and a method of operating a dual dielectric tri-gate effect transistor are disclosed. In one embodiment, the dual dielectric tri-gate tran... | 05/24/2011 |
| 7911265 | Interfacing at low temperature using CMOS technology This invention concerns interfacing to electronic circuits or systems operating at low temperature or ultra-low temperature using complementary metal-oxide semiconductor (CMOS) technology. Low temperature in this case refers to cryogenic temperatures in particular, ... | 03/22/2011 |
| 7852148 | Method of forming a sensing circuit and structure therefor In one embodiment, a sensing circuit includes a sense transistor and a compensation circuit to improve the accuracy of a sensing signal formed by the sensing circuit. ... | 12/14/2010 |
| 7847626 | Structure and method for coupling signals to and/or from stacked semiconductor dies Signals are coupled to and from stacked semiconductor dies through first and second sets of external terminals. The external terminals in the second set are connected to respective conductive paths extending through each of the dies. Signals are coupled to and from ... | 12/07/2010 |
| 7839209 | Tunnel field effect transistor A tunnel transistor includes source diffusion (4) of opposite conductivity type to a drain diffusion (6) so that a depletion layer is formed between source and drain diffusions in a lower doped region (8). An insulated gate (16) controls ... | 11/23/2010 |
| 7449943 | Matching for time multiplexed resistors An embodiment of the present invention is directed to a method of matching time-multiplexed resistors to a known ratio including generating a control signal from a control circuit, which includes a value that defines a configuration. The method also includes receivi... | 11/11/2008 |
| 7443224 | Multi-threshold MIS integrated circuit device and circuit design method thereof On a chip 50A, disposed are macro cell 20A not including a virtual power supply line and a leak-current-shielding MOS transistor of a high threshold voltage, and a leak-current-shielding MOS transistor cell 51 of the high threshold voltage. The ... | 10/28/2008 |
| 7391200 | P-channel power chip An integrated circuit device for delivering power to a load includes a P-MOS power transistor, an N-MOS bypass transistor and a gate driver circuit. The P-MOS power transistor is coupled between a supply voltage node and a power output node of the integrated circuit... | 06/24/2008 |
| 7378884 | MOSFET for synchronous rectification This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed f... | 05/27/2008 |
| 7372334 | Output match transistor A power transistor, having: a semiconductor having an electrode formed thereon, wherein the electrode comprises a plurality of interdigitated transistors each having input and output terminals; a first output blocking capacitor having a first terminal electrically c... | 05/13/2008 |
| 7368980 | Producing reference voltages using transistors An exemplary circuit embodiment includes a depletion-mode transistor and an enhancement-mode transistor. The circuit also includes a circuit portion coupled to a gate region of the depletion-mode transistor and to a gate region of the enhancement-mode transistor. In... | 05/06/2008 |
| 7355248 | Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same A semiconductor device includes a first semiconductor layer that is formed on a first insulating layer; a second insulating layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the second insulating layer; a first gat... | 04/08/2008 |
| 7351998 | Proton or ion movement assisted molecular devices There are disclosed molecular scale devices for performing logic functions. Devices comprise at least one input molecular unit, at least one output molecular unit, at least one molecular unit for performing logic or memory functions, and a means for effecting charge... | 04/01/2008 |
| 7342440 | Current regulator having a transistor and a measuring resistor The invention relates to a current regulator having the following features: a first semiconductor body (1; 1′) having a first and second terminal contact (11, 12), a transistor (T) having a control ... | 03/11/2008 |
| 7335395 | Methods of using pre-formed nanotubes to make carbon nanotube films, layers, fabrics, ribbons, elements and articles Methods of Using Preformed Nanotubes to Make Carbon Nanotube Films, Layers, Fabrics, Ribbons, Elements and Articles are disclosed. To make various articles, certain embodiments provide a substrate. Preformed nanotubes are applied to a surface of the substrate to cre... | 02/26/2008 |
| 7327592 | Self-identifying stacked die semiconductor components A semiconductor die having a functional circuit (e.g., a memory array) and a decode circuit suitable for use in a stacked die semiconductor component (e.g., a random access memory component) is described. The decode circuit permits individual die in a stacked die st... | 02/05/2008 |
| 7323753 | MOS transistor circuit and voltage-boosting booster circuit To an output of an NMOS having one end connected to a power source, a capacitor and a PMOS are connected. A capacitor is connected to the output of the PMOS. The NMOS and the PMOS are turned on alternately. A pulse is applied to other end of the capacitor which is c... | 01/29/2008 |
| 7315201 | Methods and systems for reducing leakage current in semiconductor circuits Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Vari... | 01/01/2008 |
| 7304526 | Switching circuit for handling signal voltages greater than the supply voltage Analog bidirectional switches (20) comprising a first (1) and a second (2) transistor function badly in case of the signal voltage at an input or an output of the switch (20) exceeding the supply voltage used for operating the switch (... | 12/04/2007 |
| 7291887 | Protection circuit for electrostatic discharge A protection circuit protects an integrated circuit (“IC”) from peak voltages and includes a voltage divider coupled to a silicon controlled rectifier. The voltage divider allows for adjustment of the trigger voltage, trigger current, and holding voltage of the ... | 11/06/2007 |
| 7286379 | Content addressable memory (CAM) architecture and method of operating the same An improved Content Addressable Memory (CAM) architecture and method for operating the same is provided herein. The improved CAM architecture may generally include an array of memory cells arranged into rows and columns, where each row includes a number of memory ce... | 10/23/2007 |
| 7279963 | Low inductance semiconductor device having half-bridge configuration A semiconductor device has first, second, and third connecting leads (1, 2, 3), whose respective base points (1f, 2f, 3f) have centroids (1m, 2m, 3m). The connecting leads are... | 10/09/2007 |
| 7276172 | Method for preparing a nanowire crossbar structure and use of a structure prepared by this method The present invention relates to a method for preparing a nanowire crossbar structure, comprising: (a) providing a substrate; (b) depositing thereon a composite structure comprising a nucleic acid-block copolymer having equidistant nucleic acid-catalyst binding site... | 10/02/2007 |
| 7268409 | Spiral inductor with electrically controllable resistivity of silicon substrate layer A microelectronic device including, in one embodiment, a plurality of active devices located at least partially in a substrate, at least one dielectric layer located over the plurality of active devices, and an inductor located over the dielectric layer. At least on... | 09/11/2007 |
| 7265591 | CMOS driver with minimum shoot-through current A CMOS driver with minimum shoot-through current is disclosed. The potential for shoot-through current may be eliminated or reduced with a break-before-make circuit driving an output stage. The break-before-make circuit may include a first logic element followed by ... | 09/04/2007 |
| 7256639 | Systems and methods for integrated circuits comprising multiple body bias domains Systems and methods for integrated circuits comprising multiple body bias domains. In accordance with a first embodiment of the present invention, an integrated circuit is constructed comprising active semiconductor devices in first and second body bias domains. A f... | 08/14/2007 |
| 7233197 | Methods and systems for reducing leakage current in semiconductor circuits Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Vari... | 06/19/2007 |
| 7227774 | MRAM integrated circuits, MRAM circuits, and systems for testing MRAM integrated circuits An integrated circuit includes operational circuitry; a sensor configured to sense an environmental parameter; and adjustment circuitry coupled to the sensor and to the operational circuitry and configured to affect the operational circuitry to at least partially co... | 06/05/2007 |
| 7220638 | Method for fabricating semiconductor device A method for fabricating a semiconductor device in which plural transistors including a first transistor and a second transistor are integrated includes a first step for forming the first transistor such that a distance between a drain contact and a gate electrode o... | 05/22/2007 |
| 7212065 | Semiconductor integrated circuit device capable of restraining variations in the power supply potential To restrain variations in the power supply potential caused among a plurality of integrated circuits as well as the voltage drop of the power supply potential that has reached each block. A semiconductor integrated circuit device is provided with integrated circuits... | 05/01/2007 |
| 7208779 | Semiconductor device A semiconductor device includes a substrate having an active layer, an element region provided in the active layer, a P-type semiconductor region provided in the element region, and first and second N-type semiconductor regions provided in the element region, locate... | 04/24/2007 |
| 7199648 | Semiconductor integrated circuit including first and second switching transistors having operation states corresponding to operation states of first and second logic circuits A semiconductor integrated circuit is provided having first and second logic circuits coupled to first and second sub-power supply lines, respectively. First and second switching transistors are also provided to connect the first and second sub-power supply lines to... | 04/03/2007 |
| 7190232 | Self-biased active VCO level shifter A voltage-controlled oscillator (VCO) circuit includes first, second, third, and fourth transistors, each with a first terminal, a second terminal, and a control terminal. The first terminal of the first transistor communicates with the first terminal of the second ... | 03/13/2007 |
| 7175961 | Photopatternable molecular circuitry Bistable molecules are provided with at least one photosensitive functional group. As thus constituted, the bistable molecules are photopatternable, thereby allowing fabrication of micrometer-scale and nanometer-scale circuits in discrete areas without relying on a ... | 02/13/2007 |
| 7176751 | Voltage reference apparatus, method, and system A trimmable voltage reference uses a flash cell with a variable threshold voltage and a feedback loop to trim a reference voltage. The threshold voltage of the flash cell can be programmed to affect the reference voltage. ... | 02/13/2007 |
| 7176505 | Electromechanical three-trace junction devices Three trace electromechanical circuits and methods of using same. A circuit includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. An insulative layer is disposed on one of the f... | 02/13/2007 |
| 7173882 | Methods and systems for performing horological functions using time cells A simple electronic horological device, termed a time cell, is presented with associated methods, systems, and computer program products. A time cell has an insulated, charge storage element that receives an electrostatic charge through its insulating medium, i.e. i... | 02/06/2007 |
| 7164307 | Bias generator for body bias A bias generator unit is provided that includes a central bias generator to provide a bias voltage, a local bias generator to receive the bias voltage and a reference voltage and to provide a forward body bias signal or a reverse body bias signal. The bias generator... | 01/16/2007 |
