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| Number | Title | Issue Date |
| 7768321 | Single-ended sense amplifier using dynamic reference voltage and operation method thereof A single-ended differential sense amplifier comprises a dynamic reference voltage generation circuit and a differential sense amplifier circuit. Input data with an input data line voltage is provided to the differential sense amplifier circuit. The input data line v... | 08/03/2010 |
| 7417471 | Voltage comparator having hysteresis characteristics A voltage comparator having hysteresis includes a comparing section that compares an input voltage with a reference voltage so as to output a high-level or low-level signal; and a reference voltage changing section that changes the reference voltage when a low-level... | 08/26/2008 |
| 7400177 | Amplifier circuit having constant output swing range and stable delay time Provided is an amplifier circuit having a constant output swing range and a stable delay time, where the amplifier circuit includes a first bias unit, a second bias unit, a comparison unit, and an amplifier unit, and the first bias unit responds to an internal refer... | 07/15/2008 |
| 7388409 | Offset independent sense circuit and method An offset current independent sense circuit is switchable between a store state and a sense state. In the store state, the sense circuit stores an offset current to a capacitor, and the influence of the offset current is eliminated by a transistor to regenerate the ... | 06/17/2008 |
| 7368955 | Current-balanced logic circuit In accordance with some embodiments, a current-balanced logic circuit includes a first sense amplifier, a second sense amplifier, and a current-source transistor which provides bias current to the first and second sense amplifiers. The first and second sense amplifi... | 05/06/2008 |
| 7360005 | Software programmable multiple function integrated circuit module An electrically programmable multiple selectable function integrated circuit module has a plurality of optionally selectable function circuits, which receive and manipulate a plurality of input data signals. The outputs of the plurality of optionally selectable func... | 04/15/2008 |
| 7345512 | Sense amplifier for low voltage high speed sensing A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input o... | 03/18/2008 |
| RE40075 | Method of multi-level storage in DRAM and apparatus thereof A method of processing data having one of four voltage levels stored in a DRAM cell is comprised of sensing whether or not the data voltage is above or below a voltage level midway between a highest and a lowest of the four levels, setting the voltage on a reference... | 02/19/2008 |
| 7327186 | Fast wide output range CMOS voltage reference A circuit is disclosed that compensates for changes in temperature as well as for fluctuations in a supply voltage (Vcc) so that voltage reference values generated thereby are maintained at substantially constant levels irrespective of changes in temperature or fluc... | 02/05/2008 |
| 7312641 | Sense amplifiers with high voltage swing A sense amplifier includes a reference voltage generator for generating a reference output voltage and a core output voltage generator for generating a core output voltage. The core output voltage generator includes a core front-end stage and a core back-end stage o... | 12/25/2007 |
| 7279939 | Circuit for differential current sensing with reduced static power Returning to FIG. 2, sense circuit 201 represents the circuit that must sense the signaling on an interconnect. NMOS device 202 is always on so that there is a continuous path to ground whenever PMOS driver 204 is on. Since leakage power ... | 10/09/2007 |
| 7274590 | Random access memory with stability enhancement and early read elimination A random access memory includes a memory cell having an access device. The access device is switched on or off in accordance with a signal on a wordline to conduct a memory operation through the access device. A logic circuit is coupled to the wordline to delay or g... | 09/25/2007 |
| 7274219 | Offset independent sense circuit and method An offset current independent sense circuit is switchable between a store state and a sense state. In the store state, the sense circuit stores an offset current to a capacitor, and the influence of the offset current is eliminated by a transistor to regenerate the ... | 09/25/2007 |
| 7265596 | Data latch circuit of semiconductor device A data latch circuit for latching a data signal in synchronization with a clock signal includes a hold time delay unit for generating a first clock signal by delaying the clock signal for a hold time of the data signal and an inverse first clock signal as a second c... | 09/04/2007 |
| 7236894 | Circuits, systems and methods for dynamic reference voltage calibration A circuit, system and method adjusts a reference voltage, such as an internal or external reference voltage VREF, in response to a first voltage at a first contact, such as a pin on a memory controller used for reading or writing data, and a second voltag... | 06/26/2007 |
| 7224010 | Voltage-controlled amplifier for a signal processing system A voltage-controlled amplifier for a signal processing system includes an input voltage reception end, a first voltage-to-current converter, a reference current generator, a gain adjustment circuit, a first current mirror, and an output circuit. The voltage-controll... | 05/29/2007 |
| 7202575 | Semiconductor integrated circuit device There is disclosed a semiconductor integrated circuit device capable of eliminating an influence of a power voltage drop generated in a circuit disposed in the semiconductor integrated circuit device to inhibit an operation defect or an operation speed decrease of t... | 04/10/2007 |
| 7199657 | Amplification gain stages having replica stages for DC bias control An amplification apparatus is provided that includes a plurality of gain stages including a first gain stage having first and second transistors and a second gain stage having third and fourth transistors. A plurality of replica stages may also be provided that incl... | 04/03/2007 |
| 7196495 | Dual battery and monitor arrangement A redundant battery power supply with combined battery charge indication which incorporates a main cell, conductively coupled to the supply bus which powers the load when activated, and a predictive cell, coupled to the bus by an optional diode which becomes forward... | 03/27/2007 |
| 7193447 | Differential sense amplifier latch for high common mode input A sense amplifier latch that is operable to interface with high common-mode input voltages with wide ranges for all process variations. The sense amplifier latch comprises a cross-coupled latch having first and second rail signals; a pre-charge device; an equalizati... | 03/20/2007 |
| 7180798 | Semiconductor physical quantity sensing device A semiconductor physical quantity sensing device to perform electrical trimming at low cost by using a CMOS manufacturing process and a small number of terminals. The semiconductor physical quantity sensing device includes a wheatstone bridge circuit, which is a sen... | 02/20/2007 |
| 7162376 | Circuits, systems and methods for dynamic reference voltage calibration A system comprises a master device and a plurality of memory devices coupled to the master device by an interconnect in an embodiment. The master device obtains a plurality of values representing reference voltage values and selects a first value in the plurality of... | 01/09/2007 |
| 7151520 | Liquid crystal driver circuits A liquid crystal driver circuit is equipped with a memory circuit that temporarily stores inputted image data, a first selector circuit that successively selects image data of multiple channels that are read from the memory circuit and outputs the same in a time-div... | 12/19/2006 |
| 7142022 | Clock enable buffer for entry of self-refresh mode A clock enable buffer for entry of a self-refresh mode. The clock enable buffer includes a current mirror load connected between a voltage source and first and second nodes, wherein the current mirror load has first and second transistors; a third transistor connect... | 11/28/2006 |
| 7106188 | Method and system for providing an activation signal based on a received RF signal A method and apparatus are described for providing an activation signal based on a received radio frequency (RTF) signal. The apparatus includes an RF receiver configured to admit a received RF signal in a given frequency band and a converter configured to convert t... | 09/12/2006 |
| 7102394 | Programming and control of an integrated circuit using an externally connected resistor network A circuit in an integrated circuit having input terminals coupled to a resistor network for selecting one of multiple digital states includes a tri-state circuit, a multiplexer, a comparator and a control circuit. A DAC can be used to generate a set of comparison vo... | 09/05/2006 |
| 7095640 | Multiple match detection circuit and method A multiple matchline sense circuit for detecting a single, more than one, or no match conditions during a search-and-compare operation of a content addressable memory is disclosed. The circuit compares the rising voltage rate of a multiple matchline to the rising vo... | 08/22/2006 |
| 7061308 | Voltage divider for integrated circuits A voltage divider for integrated circuits that does not include the use of resistors. In one embodiment, voltage node VDD is connected with two n-type transistors, NFET1 and NFET2, which are connected in series. NFET 1 includes a source (12 | 06/13/2006 |
| 7049857 | Asymmetric comparator for low power applications A method and structure for comparing an input signal to a reference signal using a comparator comprises a circuit for setting a trip point of a rising edge of an input signal according to a value of an external voltage reference; and at least two transistors, in the... | 05/23/2006 |
| 7046078 | Method and apparatus for distributed voltage compensation with a voltage driver that is responsive to feedback An integrated circuit has one or more components that operate with reference to a distributed reference voltage. A reference voltage driver produces a compensated reference voltage, and the compensated reference voltage is distributed to form the distributed referen... | 05/16/2006 |
| 7031212 | Double read stage sense amplifier The present invention relates to a sense amplifier for reading a memory cell, comprising a read node linked directly or indirectly to the memory cell, a first active branch connected to the read node, comprising means for supplying a read current at the read node, a... | 04/18/2006 |
| 7026854 | System for producing high-voltage, low-power driver circuitry The present invention provides a system for producing high voltage, low power driver circuitry (300) that addresses a number of disparate design requirements. The present invention provides circuitry comprising a voltage supply (308) and an output node... | 04/11/2006 |
| 6970124 | Inherent-offset comparator and converter systems Comparator systems are provided that include first and second differential pairs of transistors with inherent offsets that are a function of their tail currents. Some system embodiments configure the pairs to have substantially-equal, nonzero inherent offset voltage... | 11/29/2005 |
| 6958926 | Current switching sensor detector A sensor for a switching circuit detects the logical state of the switching circuit by monitoring the current flow through the switching circuit. The current flow is conditioned by one or more current limiters and a voltage regulator, coupled in series with the swit... | 10/25/2005 |
| 6956427 | Electrically insulated switching element drive circuit An electrically insulated type of switching element drive circuit supplies an AC voltage via a transformer to a control electrode drive circuit that controls a switching element, with the frequency or amplitude of the AC voltage being modulated in accordance with re... | 10/18/2005 |
| 6952375 | Self-timed voltage-subtraction sneak current cancellation method and apparatus A single bit line reference signal path or line is used for both voltage subtraction and self-timing of a second sense that is longer than a first sense in a dual-sense, single-read memory cell. The self-timing mechanism includes an analog circuit. ... | 10/04/2005 |
| 6949961 | Power switch structure with low RDSon and low current limit In one embodiment, a power switch device (33) includes a first MOSFET device 41 and a second MOSFET device (42). A split gate structure (84) including a first gate electrode (48,87) controls the first MOSFET device (41). A s... | 09/27/2005 |
| 6943591 | Apparatus and method for detecting a fault condition in a common-mode signal The invention is directed to an apparatus and a method for generating a fault detection signal when a differential signal is in a fault condition. The fault condition arises when the data transmission path in a differential signaling device is either open, shorted, ... | 09/13/2005 |
| 6940315 | High speed sense amplifier for memory output A sense amplifier circuit includes a latch circuit to enhance the speed of a sensing operation and to obviate the need for a latch circuit to capture the output value of the sense amplifier circuit. In one embodiment, first and second differential amplifiers provide... | 09/06/2005 |
| 6927606 | Low voltage differential to single-ended converter Method and circuitry for converting a differential logic signal to a single-ended logic signal eliminate slower PMOS transistors and speed up the conversion process. In specific embodiments differential logic signals of the type employed in, for example, current-con... | 08/09/2005 |
