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Vehicular Impact Signaling Device
An apparatus for the deployment of a visible plume to alert other motorists that a proximate motor vehicle has been involved in a collision.
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| Number | Title | Issue Date |
| 7948295 | Miniaturized demultiplexer and electronic device using same A demultiplexer includes an input terminal for providing an input signal, a plurality of output terminals for outputting the input signal, and a switching circuit coupled among the input terminal and the plurality of output terminals, and outputting the input signal... | 05/24/2011 |
| 7825717 | Electronic apparatus and control method thereof An electronic apparatus includes a main output part to output an image signal, a sub output part to output the image signal to an external apparatus, a connecting sensor to sense whether the external apparatus is connected to the sub output part, and an image proces... | 11/02/2010 |
| 7633329 | Single signal-to-differential signal converter and converting method In an example embodiments, a single signal-to-differential signal converter includes a first inverter for receiving and inverting a single input signal and outputting an inverted single input signal to a first node, and a first differential signal generating portion... | 12/15/2009 |
| 7579896 | Method and apparatus for generating multiple analog signals using a single microcontroller output pin A method and apparatus are disclosed for generating multiple separate analog signals using a single microcontroller output pin. The microcontroller generates a waveform that is used to concurrently generate multiple separate analog signals. The microcontroller outpu... | 08/25/2009 |
| 7463080 | Methods and systems for converting a single-ended signal to a differential signal Methods and systems are described for converting single-ended signals to differential signals. In one exemplary embodiment, an input single-ended signal is received and converted into a differential signal having minimized jitter without using a DC-cancellation loop... | 12/09/2008 |
| 7365578 | Semiconductor device with pump circuit In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the... | 04/29/2008 |
| 7355534 | Serial-to-parallel conversion circuit, and semiconductor display device employing the same In a serial-to-parallel conversion (SPC) circuit for digital data which converts the digital data serially inputted, into parallel digital data, and which outputs the parallel digital data; clock signals at frequencies which are, at the highest, ½ of the frequency ... | 04/08/2008 |
| 7352217 | Lock phase circuit Systems and techniques for producing a signal with a known phase relationship to a source clock at an output of an indeterminate circuit element such as a clock divider. The systems and techniques may be used to allow circuit test data to be accurately compared with... | 04/01/2008 |
| 7292498 | Factored nanoscale multiplexer/demultiplexer circuit for interfacing nanowires with microscale and sub-microscale electronic devices Embodiments of the present invention are related to nanoscale multiplexers and demultiplexers that employ randomly fabricated interconnections between nanowire signal lines and microscale or sub-microscale address lines. A greater number of address lines than a mini... | 11/06/2007 |
| 7286001 | High-frequency switching device and semiconductor device The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FE... | 10/23/2007 |
| 7212062 | Power supply noise insensitive multiplexer CMOS circuitry used to multiplex between data inputs suffers from high sensitivity to power supply noise, resulting in delay variations. By utilizing current controlled inverters in a multiplexer structure, power supply insensitivity can be achieved with either of t... | 05/01/2007 |
| 7199635 | High-frequency switching device and semiconductor The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FE... | 04/03/2007 |
| 7148737 | Semiconductor switching circuit The invention discloses a semiconductor switching circuit suitable for a Single Pole n Throw (SPnT) switching circuit having: a common terminal; first through third terminals, ground and control terminals, through FETS, shunt FETs, wherein when a first electric pote... | 12/12/2006 |
| 7119602 | Low-skew single-ended to differential converter A single-ended to differential converter uses a cross-coupled latch that maximizes the output zero-crossing symmetry and is self compensating over PVT variations. An in-phase driving signal is provided by an always-on transmission gate coupled to the input. An out-o... | 10/10/2006 |
| 7088275 | Variable clock rate analog-to-digital converter An algorithmic analog-to-digital converter (ADC) includes a sample-and-hold circuit and an ADC processing unit operating in parallel and sharing a single operational amplifier. The ADC processing unit includes an MDAC with a switched capacitor topology and a sub-ADC... | 08/08/2006 |
| 7064597 | Complementary signal generator A complementary signal generator, for outputting complementary positive-phase and antiphase signals that vary between a first logical value and a second logical value, which includes a signal forming unit for outputting a positive-phase intermediate signal being in ... | 06/20/2006 |
| 7043670 | Reducing the effect of simultaneous switching noise An integrated circuit comprises a microprocessor for generating data signals along a data bus by way of an inverter to a plurality of input/output switching buffers. The buffers pass the data signals to a transmission bus for onward transmission to a receiving integ... | 05/09/2006 |
| 7007214 | Diagnosable scan chain A method and system for locating connector defects in a defective scan chain that has a parallel non-defective scan chain on a different wiring level, with both scan chains being laid out in a regular array pattern. A predetermined bit sequence is scanned into the d... | 02/28/2006 |
| 6995585 | System and method for implementing self-timed decoded data paths in integrated circuits A self-timed data transmission system includes a data bit group defined by at least two data bits to be transmitted from a corresponding plurality of transmitting storage elements. A corresponding plurality of data receiving storage elements receives the data transm... | 02/07/2006 |
| 6973290 | Radio architecture A digital radio transceiver integrated circuit includes MOS transistors with normal threshold voltages in the digital circuits, and with reduced threshold voltages in at least some of the analog RF components. This allows the transceiver to be reduced in size and we... | 12/06/2005 |
| 6897688 | Input/output buffer having analog and digital input modes An input/output buffer is operative in an analog mode and a digital mode. The buffer includes a pad, a digital signal line which includes a transmission gate connected to the pad, an analog signal line connected to the pad, an analog/digital mode controller which se... | 05/24/2005 |
| 6891426 | Circuit for providing multiple voltage signals A method of providing multiple voltage outputs includes receiving an input signal from a multifunctional pump. The method also includes sending a first output signal based on the input signal using a first switch and sending a second output signal based on the input... | 05/10/2005 |
| 6750792 | Serial-to-parallel conversion circuit, and semiconductor display device employing the same In a serial-to-parallel conversion (SPC) circuit for digital data which converts the digital data serially inputted, into parallel digital data, and which outputs the parallel digital data; clock signals at frequencies which are, at the highest, ½ of the frequency ... | 06/15/2004 |
| 6583659 | Reduced clock-skew in a multi-output clock driver by selective shorting together of clock pre-outputs A clock driver chip has several banks of clock outputs driven by a single clock reference. Each clock output is driven by large pull-up and pull-down transistors, which have gates driven by pre-driver lines generated by a pre-driver circuit. Individual cl... | 06/24/2003 |
| 6580313 | System and method for providing single pin bypass for multiple circuits Disclosed are systems and methods which provide a common bypass node with respect to multiple circuits of an integrated circuit. According to a preferred embodiment, a circuit for filtering bias noise introduced by components of the integrated circuit may... | 06/17/2003 |
| 6566890 | Circuit for improved test and calibration in automated test equipment In at least one embodiment, a circuit for a multi-channel tester having a central resource, a plurality of outputs, and a switching matrix coupling the central resource to the plurality of outputs via a plurality of selectable channels. Each of the select... | 05/20/2003 |
| 6545524 | Configurable multiplexing circuit and method A configurable multiplexing circuit and arrangement suited for phase locked loop applications. The multiplexing circuit includes an EX-OR element, a multiplexer element and a summer element. Each element is configured for receiving a particular type of de... | 04/08/2003 |
| 6535049 | Multipurpose test chip input/output circuit A system for testing an integrated circuit. The system includes a plurality of simultaneous switching output (SSO) cells with each of the plurality of simultaneous SSO cells including an output driver providing an output signal to a respective signal pin ... | 03/18/2003 |
| 6483888 | Clock divider with bypass and stop clock A clock divider circuit receives a first clock signal and frequency divides the first clock signal to generate a second clock signal. The first and second clocks are inputs to multiplexer (MUX) that selects one of the clocks as the MUX output based on the... | 11/19/2002 |
| 6420981 | Oversampling circuit and method An oversampling circuit and method is proposed, which is used for converting an input serial data stream into a parallel data format. The proposed oversampling circuit comprises an array of transmission gates arranged into N cascaded stages of main sampli... | 07/16/2002 |
| 6414528 | Clock generation circuit, serial/parallel conversion device and parallel/serial conversion device together with semiconductor device A clock generation circuit that generates multi-phase output clock signals which immediately follow any change in the period of an input clock signal. This clock generation circuit comprises a voltage-controlled oscillator (14) that generates an output si... | 07/02/2002 |
| 6407614 | Semiconductor integrated switching circuit The semiconductor integrated switching circuit S1 employed in a dual-band mobile phone comprises the first through fourth field effect transistor 1, 2, 3, 4 by which electrical connection between either of the first through fourth input/output terminal 22... | 06/18/2002 |
| 6407613 | Multipurpose test chip input/output circuit The circuit to be used either to create a simultaneously switching outputs (SSO) event or to create a simultaneously switching inputs (SSI) event. The circuit uses a toggle register to generate a toggling signal and a signal line to operate logic to selec... | 06/18/2002 |
| 6380785 | Method and apparatus for eliminating shoot-through events during master-slave flip-flop scan operations A novel method and apparatus for eliminating shoot-through events during master-slave flip-flop scan operations to allow minimal test time of electronic circuit components is presented. Shoot-through scan problems introduced by loading mismatches on the T... | 04/30/2002 |
| 6351175 | Mode select circuit In accordance with the present invention a mode select circuit includes a bias circuit and a voltage level encoder. The mode select circuit further includes a mode select terminal capable of being selectively coupled to one or more of a plurality of confi... | 02/26/2002 |
| 6323716 | Signal distributing circuit and signal line connecting method A signal distributing circuit of the invention includes a first element which outputs a first signal and a second signal which is opposite to that of the first signal. The circuit is provided with a first signal line on which the first signal is transmitt... | 11/27/2001 |
| 6285237 | Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice An inventive integrated circuit die includes a bond pad connected to first and second input buffers in the die through laser fuses. In one operating configuration of the die, the die uses the first input buffer but does not use the second input buffer, so... | 09/04/2001 |
| 6255884 | Uniform clock timing circuit A plurality of intermediate driving devices are included in stages between a clock generator and a bank of synchronous logic devices. The outputs of the intermediate devices in each stage are connected in parallel over a wide linear dimension. The timing ... | 07/03/2001 |
| 6208186 | Differential signal generator A differential signal generator accepts a single-ended signal on an input node and produces a differential signal on differential output nodes. The differential output nodes include a true output node and a complementary output node. In one embodiment, th... | 03/27/2001 |
| 6087887 | Signal routing circuits having selective high impedance and low impedance output states A dual-purpose transmission circuit capable of receiving two or more signals or voltages, or a signal and a voltage, using one input pad, and an input method using the circuit. The dual-purpose transmission circuit includes an internal signal line for tra... | 07/11/2000 |
