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| Number | Title | Issue Date |
| 8111094 | Analog multiplexer circuits and methods A sample and hold circuit is disclosed that provides longer hold times. An analog multiplexer circuit is also disclosed that exhibits low switch leakage. The analog multiplexer circuit comprises a shared node, a plurality of input circuits, a control input for selec... | 02/07/2012 |
| 8085082 | High speed multiplexer According to one embodiment, a high speed multiplexer includes a number of data inputs, a number of hot code select inputs, and a final data output. In one embodiment, the high speed multiplexer utilizes a number of intermediate multiplexers, each receiving respecti... | 12/27/2011 |
| 7973588 | Analog insulation/multiplexer An analog insulation multiplexer not causing magnetic saturation even if a small transformer is used and having a wide use temperature range. The analog insulation multiplexer includes: a first switching element for generating a drive control signal in accordance wi... | 07/05/2011 |
| 7969224 | Circuit to reduce duty cycle distortion A method and a circuit for correcting duty cycle distortion. A delay insertion gate corrects data dependent delay distortion that is generated by CMOS flip-flop circuits. The delay insertion gate includes two field effect transistors and a current mirror. The two tr... | 06/28/2011 |
| 7928793 | Voltage selection circuitry Techniques, systems and apparatus are described for providing a voltage selection circuitry and a DC-to-DC converter having such voltage selection circuitry. The voltage selection circuitry includes a first terminal voltage sensing unit that senses a voltage of a fi... | 04/19/2011 |
| 7898315 | Analog multiplexer with insulation power supply An analog multiplexer with an insulated power supply includes: an analog signal transformer receiving an analog signal input in its primary winding via an FET, and ON/OFF driving the FET to generate a pulse with an amplitude of the analog signal in its secondary win... | 03/01/2011 |
| 7816972 | Multiplexer circuit Disclosed herein is a multiplexer circuit. The multiplexer circuit includes a first differential output unit, a second differential output unit, and a selection unit. The first differential output unit receives NRZ input signals (D1 and D1 | 10/19/2010 |
| 7764107 | Multiplexer circuit with combined level shifting and delay control functions A digitally controlled circuit is arranged to provide the combined functions of level shifting, multiplexing, and delay control functions. The circuit is compact, and uses lower power and lower overall noise susceptibility over other solutions. A programmable bias c... | 07/27/2010 |
| 7592851 | High performance pseudo dynamic pulse controllable multiplexer A high performance, set associative, cache memory tag multiplexer provides wide output pulse width without impacting hold time by separating the evaluation and restore paths and using a wider clock in the restore path than in the evaluation path. A clock controls th... | 09/22/2009 |
| 7586359 | Signal coupling circuit and method The invention provides a signal coupling circuit and method for coupling an analog input signal to a processing circuit. The signal coupling circuit includes a number of first coupling units, a second coupling unit and a first multiplexer. The first coupling units a... | 09/08/2009 |
| 7583129 | Integrated circuit and method for operating the integrated circuit An integrated circuit having cascade-connected multiplexers and a precharge unit. The cascade-connected multiplexers each have a plurality of data inputs, a data output, wherein each data input and each data output has two terminals for the application of a dual-rai... | 09/01/2009 |
| 7579895 | Clock-generator architecture for a programmable-logic-based system on a chip A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic bloc... | 08/25/2009 |
| 7564293 | Signal conversion circuit A signal conversion circuit for converting an inputted differential signal into a single-ended signal comprises a differential amplifier circuit for amplifying the differential signal, and generating a first non-inverted signal and a first inverted signal being inve... | 07/21/2009 |
| 7492210 | Voltage selection circuit A first switch circuit includes first and second N-type MOSFETs. A second switch circuit includes third and fourth N-type MOSFETs. A control signal is input to a first inverter and a third inverter, the output of the first inverter input to a second inverter and the... | 02/17/2009 |
| 7482853 | Method and apparatus for switching audio and data signals through a single terminal A MOSFET-based, multi signal-switching circuit controllably passes analog/audio signals and digital signals through a common terminal to a single connector. Analog/audio signals are coupled through a single N-channel MOSFET analog signal switch which, when turned-ON... | 01/27/2009 |
| 7436238 | Integrated voltage switching circuit An integrated circuit can be switched between operating modes without the need for a dedicated mode selection pin. A circuit for operation at a specified maximum supply voltage comprises first and second supply terminals, a first signal input for application of a re... | 10/14/2008 |
| 7432754 | Voltage control circuit having a power switch A voltage control circuit includes a first transistor coupled to a first voltage supply terminal having a first voltage, a second transistor coupled to the first transistor and a node, a third transistor coupled to a second voltage supply terminal and the node, wher... | 10/07/2008 |
| 7423455 | Systems and methods for A 5:1 multiplexer with a one-fifth ratio duty cycle clock The present invention provides methods and systems for multiplexing five channels, such as 10 Gb/s to 50 Gb/s, into a single data sequence using a 5:1 multiplexer using a ⅕th ratio duty cycle clock. The ⅕th ratio duty cycle clock is a clock... | 09/09/2008 |
| 7423472 | Power switching circuit There is provided a power switching circuit capable of completely breaking a current in an OFF state of a switch connecting power sources even when a voltage difference is generated between the power sources of a plurality of functional blocks separated from each ot... | 09/09/2008 |
| 7417482 | Adaptive voltage scaling for an electronics device Techniques for adaptively scaling voltage for a processing core are described. In one scheme, the logic speed and the wire speed for the processing core are characterized, e.g., using a ring oscillator having multiple signal paths composed of different circuit compo... | 08/26/2008 |
| 7411429 | System and method for clock switching A system for clock-switching applied in the field of integrated circuits is described. A phase interpolator converts an input clock signal into a clock_A and a clock_B having a phase difference therebetween and transmitting the clock_A and the clock_B. A switch comm... | 08/12/2008 |
| 7411440 | System located in an integrated circuit for reducing calibration components An embodiment of this invention provides a circuit and method for reducing the number of electronic components needed to calibrate circuits on an IC. A multiplexer is located on the IC where the outputs of a plurality of circuits located on the IC are each connected... | 08/12/2008 |
| 7403058 | Test clock generating apparatus A test clock generating apparatus is provided in the invention. The test clock generating apparatus includes an at-speed clock generator and a multiplexer. The at-speed clock generator is for receiving a reference clock signal and a scan chain enable signal and outp... | 07/22/2008 |
| 7385431 | Input circuit and an electronic control unit provided with such an input circuit An input circuit commonly uses input ports of a microcomputer for a plurality of contact input terminals such as switches provided on the way to the ground. Transistors (Q1) to (Q8) whose bases are connected with contact input terminals (IN1) to... | 06/10/2008 |
| 7378897 | Input stage for multiplexing and methods for using an input stage for multiplexing Input stages for use in multiplexing, and methods for using the same, are provided herein. An input stage includes an input terminal and an output terminal. A voltage input signal is accepted at the input terminal of the input stage. When the input stage is selected... | 05/27/2008 |
| 7372685 | Multi-fault protected high side switch with current sense An integrated high side switch with multi-fault protection. When a fault condition is detected, the switch is turned off. The switch includes a pair of transistors that are connected such that the source of the first transistor is connected with the source of the se... | 05/13/2008 |
| 7373575 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated ... | 05/13/2008 |
| 7372717 | Methods for resistive memory element sensing using averaging A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled voltage supply, an electronic charge reservoir, a current source, and a pulse counter. The controlled voltage su... | 05/13/2008 |
| 7368959 | Voltage regulator with synchronized phase shift An IC incorporating a multiphase voltage converter with synchronized phase shift including a phase shift pin, a frequency select pin, a master clock pin, and a voltage regulator. The phase shift pin is coupled to a first voltage for a master mode or a first resistor... | 05/06/2008 |
| 7365575 | Gated clock logic circuit A gated clock logic circuit includes a pulse generator and a precharged latch. The pulse generator generates a pulse signal in response to a clock signal, and the precharged latch generates a gated clock signal in response to the clock signal, the pulse signal, and ... | 04/29/2008 |
| 7365589 | Bandgap reference circuit A bandgap reference circuit, taking two or more power supplies as the input power supply for outputting a reference voltage, includes a first reference circuit, a second reference circuit, a power selection circuit and a switch circuit. The first and second referenc... | 04/29/2008 |
| 7362161 | Power supply switching circuit, data processing device, and method of controlling data processing device A power supply switching circuit includes a detection circuit which detects a reduction in a voltage level of the main power supply and outputs a detection signal; a first switch circuit which connects a main power supply to an internal power supply node before a re... | 04/22/2008 |
| 7362142 | Current source apparatus, light-emitting-device apparatus and digital-analog converting apparatus A current source apparatus includes a first MOS transistor having a drain serving as current input terminals with the gate connected to the drain, a first switch connected to the source of the first MOS transistor, a second MOS transistor having a drain serving as a... | 04/22/2008 |
| 7362134 | Circuit and method for latch bypass A device includes a first combinatorial logic stage having a first input to receive a first data value, a second input to receive a bypass value and an output to provide one of a representation of the first data value or a first predetermined value based on the bypa... | 04/22/2008 |
| 7358761 | Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes Logic design apparatus and method provides serial multiplexer chains in a programmable logic fabric, each element in the chain either selects output of block, or passes output from earlier element of the chain. Select line is a decoder structure or output from confi... | 04/15/2008 |
| 7358767 | Efficient multiplexer for programmable chips Methods and apparatus are provided for implementing efficient multiplexers on a programmable chip using a lookup table. A load logic input line associated with a lookup table having limited input lines is used to augment the number of input lines that can be handled... | 04/15/2008 |
| 7358760 | Efficient 4:1 multiplexer for programmable chips Methods and apparatus are provided for implementing efficient multiplexers on a programmable chip using a lookup table (LUT). A load logic input line associated with a LUT having limited input lines is used to augment the number of input lines that can be handled by... | 04/15/2008 |
| 7358872 | Method and apparatus for converting parallel data to serial data in high speed applications A method and apparatus to convert parallel data to serial data. More specifically, there is provided a parallel-to-serial converter comprising a data pipeline configured to receive parallel data, and binary sort logic comprising a plurality of switches arranged to r... | 04/15/2008 |
| 7355435 | On-chip detection of power supply vulnerabilities On-chip sensor to detect power supply vulnerabilities. The on-chip sensor employs a sensitive delay chain and an insensitive delay chain to detect power supply undershoots and overshoots without requiring external off-chip components. Undershoots and overshoots outs... | 04/08/2008 |
| 7355458 | Output driver circuit and a method of transmitting an electrical signal via an output driver circuit In an output driver circuit, the signal propagation time of an electrical signal which is to be transmitted between two selected driver stages is ascertained. If the ascertained signal propagation time is at least equal to half the period duration of the signal whic... | 04/08/2008 |
