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| Number | Title | Issue Date |
| RE40053 | Delay circuit having delay time adjustable by current A delay circuit includes a delay part delaying a signal by a delay time which can be varied based on a control current, and a control current adjustment circuit adjusting the control current so that the delay time changes linearly based on a variation in a resistanc... | 02/12/2008 |
| 7274243 | Adaptive gate drive for switching devices of inverter An adaptive gate drive for an inverter includes control circuitry having a Field Programmable Gate Array (FPGA) and includes power circuitry having a plurality of FETs for operating a switching device, such as a Trench Gate Insulated Gate Bipolar Transistor (IGBT de... | 09/25/2007 |
| 7274318 | Control module, related control chip and identifying method thereof A control module includes a plurality of switching elements, a control chip, and an identification unit. The switching elements are connected to a power terminal through a corresponding resistor each, wherein the resistances of corresponding resistors or equivalent ... | 09/25/2007 |
| 7250660 | ESD protection that supports LVDS and OCT Circuits are described that provide electrostatic discharge protection for I/O circuits that support the low voltage differential signaling (LVDS) and on-chip termination (OCT) standards. At least one additional transistor is connected across an I/O transistor. In t... | 07/31/2007 |
| 7187227 | Driver circuit A driver circuit includes first and second three-terminal active elements, and first and second delay units. The first and second three-terminal active elements are series-connected. Each of the first and second three-terminal active elements has an amplification fu... | 03/06/2007 |
| 7049669 | LDMOS transistor A semiconductor device comprises an active region of a first conductivity type including a transistor structure, and a ring shaped region of the first conductivity type extending from a surface of the active region into the active region and substantially surroundin... | 05/23/2006 |
| 7049845 | Programmable delay line using configurable logic block A configurable logic block (“CLB”) in a programmable logic device (“PLD”), such as a complex programmable logic device (“CPLD”) or a field programmable gate array (“FPGA”), routes a timing signal, such as an external clock signal, through the CLB to ... | 05/23/2006 |
| 6975978 | Method and apparatus for fault simulation of semiconductor integrated circuit A test pattern sequence is generated (101), then a logic simulation of the operation of an IC under test in the case of applying each test pattern of the test pattern sequence, and a logic signal value sequence occurring in each signal line of the IC under te... | 12/13/2005 |
| 6914305 | Circuits and methods for electrostatic discharge protection in integrated circuits An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transi... | 07/05/2005 |
| 6850402 | Circuit and method for controlling current flow through a solenoid A solenoid control circuit that includes two switching networks that are selectively opened and closed in a current limit cycle to control the magnitude of the current flowing through the solenoid. The configuration of the switching networks is such that current flo... | 02/01/2005 |
| 6812762 | Fast mono-cycle generating circuit using full rail swing logic circuits A mono-cycle generating circuit comprises a control circuit, a multiplexer, and a driver switch circuit. The control circuit generates sets of timing pulses. The multiplexer selects one of the sets of timing pulses. The driver switch circuit outputs a mono-cycle bas... | 11/02/2004 |
| 6614275 | Adjustable capacitances for DLL loop and power supply noise filters A delay locked loop having an adjustable capacitance stage is provided. The adjustable capacitance stage facilitates a selective post-silicon adjustment of capacitance amounts between a DLL loop filter capacitance and a power supply noise filter capacitan... | 09/02/2003 |
| 6600347 | Dynamically producing an effective impedance of an output driver with a bounded variation during transitions thereby reducing jitter A method and system for reducing a reflection coefficient below a predetermined value thereby reducing jitter by the variation of the effective impedance of a driver appearing to be bounded during state transitions. The driver may include a pull-up driver... | 07/29/2003 |
| 6380770 | Low ground bounce and low power supply bounce output driver with dual, interlocked, asymmetric delay lines Ground bounce and power supply bounce are reduced in an output driver by utilizing a plurality of p-channel and n-channel driver transistors which are connected to an output pad, by insuring that the p-channel driver transistors are quickly and sequential... | 04/30/2002 |
| 6346840 | Electronic device for controlling the "bouncing" in electronic circuits integrated on semiconductor substrate An electronic device for controlling oscillation of an output voltage about a final value includes a semiconductor substrate, and at least one output stage on the semiconductor substrate. The at least one output stage includes at least one output transist... | 02/12/2002 |
| 6134688 | Electronic device selectably operable as a sequential logic circuit or a combinatorial logic circuit and circuit testing method An electronic device, with a plurality of logic stages for functional collaboration, is provided with selection means for selectively operating the plurality of stages to form either a sequential logic circuit or a combinatorial logic circuit. This enable... | 10/17/2000 |
| 6105106 | Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times A balanced switching circuit comprises a plurality of transfer gates, each transfer gate having an input terminal, an output terminal, and at least one control terminal adapted to receive a control signal. Each transfer gate, which may be comprised of pas... | 08/15/2000 |
| 6094155 | Dual reference voltage buffer and method for updating CDAC bit capacitors A circuit for producing a stable CDAC reference voltage in a successive approximation analog-to-digital converter includes a circuit (27) producing an input reference voltage (VREFIN), and a buffer circuit (12) producing a stable reference voltage in resp... | 07/25/2000 |
| 6037828 | Transmission line driver with high output impedance at power off Circuit techniques for allowing the sharing of the same output terminals between transmission line drivers that comply with differing protocols. By inserting isolation transistors at the outputs of line driver circuits, and in a preferred embodiment along... | 03/14/2000 |
| 6005433 | Low charge injection mosfet switch When turned on by an input CONTROL signal, a MOSFET transistor switch in accordance with the present invention connects a low impedance voltage source to a moderate to high impedance load. The switch includes a relatively large first MOSFET transistor (Q1... | 12/21/1999 |
| 5936448 | Integrated circuit having independently testable input-output circuits and test method therefor An integrated circuit in which Schmitt input circuits can be tested in a short time and a highly accurate test result can be obtained. The integrated circuit includes switches each passing outputs of Schmitt inverters with inputs connected to input-output... | 08/10/1999 |
| 5914627 | Isolation circuit for I/O terminal Circuits and method for isolating internal nodes of an integrated circuit from external signals applied to I/O terminals of the IC even under no-power conditions are disclosed. The invention senses the most positive voltage level (in case of a p-channel i... | 06/22/1999 |
| 5877648 | Integrated circuit having a control circuit for controlling connection of monitor points to electrode pads A functional circuit is formed in a chip. A selector circuit is provided, which connects monitor points to electrode pads for external connections for testing the monitor points of the functional circuit. A control circuit is provided for supplying to the... | 03/02/1999 |
| 5821640 | Electrical switching assembly The invention relates to switching apparatus having a pair of input terminals (102, 104) and 2P pairs of output terminals (106a, 106b). The switch comprises p rows of switches Ki,j with the ith row having 2i unit switches.... | 10/13/1998 |
| 5684422 | Pipelined microprocessor including a high speed single-clock latch circuit A pipelined microprocessor is provided including a latch circuit wherein a first transmission gate is electrically coupled in series with a second transmission gate between an output line of a first pipeline stage and an input stage of a subsequent pipeli... | 11/04/1997 |
| 5614771 | Extended high voltage SCR switch A high voltage switch in which an extended SCR is built in an insulated polysilicon layer for providing a single structure high voltage switch. The high voltage SCR is built by building unit SCRs comprising a cathode, a gate, an anode and a voltage sustai... | 03/25/1997 |
| 5610507 | Power control switch According to a first aspect of the invention, a power control switch comprises two solid state switching elements (14, 15) in parallel, the second switching element (15) having a higher resistance but faster turn-off time than the first element. In operat... | 03/11/1997 |
| 5598121 | Switching circuit for embodying an I/O signal in a single terminal A switching circuit for outputting input and output signals from a single terminal includes an I/O signal interface circuit for forming a current path in parallel with a switch when a voltage at both terminals of the switch changes from high state to low ... | 01/28/1997 |
| 5554949 | Circuit arrangement for delaying a functional signal A circuit arrangement for delaying a useful signal which is stored in the form of time-discrete signal samples in a row of storage devices at time intervals which are determined by a clock signal and is read therefrom after expiration of a selectable dela... | 09/10/1996 |
| 5552744 | High speed IDDQ monitor circuit A process for determining a quiescent power supply current (IDDQ) of a device under test (DUT) at a first node. The process includes the steps of providing a reference current to the first node and decoupling a power supply from the first node.... | 09/03/1996 |
| 5378950 | Semiconductor integrated circuit for producing activation signals at different cycle times A semiconductor integrated circuit has n number of operating circuits that each operate at a predetermined cycle time; n number of wirings that transmit activation signals with respect to said n number of wirings; and a selector drive circuit that sends a... | 01/03/1995 |
| 5274274 | Dual threshold differential discriminator An embodiment of the present invention is a high-side driver comprising a pair of differential input controls each of which are coupled to a pair of comparators having first and second thresholds set at Vddh-1.5 volts and Vddh-2.5 volts, respectively. A l... | 12/28/1993 |
| 5216289 | Asynchronous reset scheme for ultra-low noise port tri-state output driver circuit A circuit for providing digital output signals carrying large amounts of currents without generating large transients at an output terminal connected to a load comprising apparatus for providing gradually increasing amounts of current of a first polarity ... | 06/01/1993 |
| 5208483 | Automatic power-operated window and roof panel system for a motor vehicle An electronic system for automatically operating the power-operated windows and roof panel in a motor vehicle. Also to provide driver and occupant safety and co]fort by controlling the vehicle's radio/stereo system, air conditioning/climate control system... | 05/04/1993 |
| 4967110 | Master-slice type integrated circuit including macrocells associated with delay circuit A master slice type integrated circuit includes at least one macrocell having a predetermined function, a delay circuit connected to an output of the macrocell and capable of giving a plurality of different delay times, and an output buffer having an inpu... | 10/30/1990 |
| 4950919 | MOS-transistor bridge circuit In this MOS-transistor bridge circuit, for obtaining a fast flyback conduction of the current after a normal operation of the circuit, instead of the flyback diodes associated with each transistor of the bridge, the MOS transistors themselves are employed... | 08/21/1990 |
| 4620119 | Dual-mode timer circuit A dual mode timer circuit has first and second two-input NOR gates with inputs connected to receive a trigger pulse and outputs respectively coupled to first and second RC charging networks. An output NOR gate has its two inputs connected to the RC chargi... | 10/28/1986 |
| 4323789 | Sequencer for power supply voltages A sequencer for two power supply voltages includes a master on-off switch, and two transistor switches which operate in response to the closing and then the opening of the master switch to turn on one voltage before the other is turned on, and to turn the... | 04/06/1982 |
| 4286174 | Transition detector circuit A circuit for detecting the transitions of an input signal between first and second voltage levels includes first and second signal paths connected between a first point of operating potential and an output point. Each signal path includes first and secon... | 08/25/1981 |
| 4284954 | Sequential light circuit A sequential activation control for selective sequential switching of at least two power circuits including: direct current power supply means to provide direct current source of power at selected voltage, clock means to provide output timing pulses at se... | 08/18/1981 |
