...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 8159279 | Current driving circuit In current driving circuit a desired value of a driving current is promptly written in a load of each pixel despite load variations that may occur in each pixel. A constant current source circuit delivers a driving current Idata to a load. An output voltage differen... | 04/17/2012 |
| 7760004 | Clamp networks to insure operation of integrated circuit chips Clamp networks are provided to insure successful operation of a variety of electronic circuits that are realized in the form of integrated circuit chips. These networks are especially suited for use in chips in which on-chip circuits generate a voltage to bias the c... | 07/20/2010 |
| 7372291 | Circuits having precision voltage clamping levels and method A slew rate control circuit includes a receiver for receiving input signals and an output generator for generating output signals based on the input signals. The slew rate control circuit also includes an electrical interconnection coupling an output of the receiver... | 05/13/2008 |
| 7280002 | Method and apparatus for biasing a metal-oxide-semiconductor capacitor for capacitive tuning A method and apparatus is presented for generating a reference voltage that biases a metal-oxide-semiconductor (MOS) transistor used as a varactor in capacitive tuning applications. In one embodiment, a biasing circuit is implemented. The biasing circuit comprises a... | 10/09/2007 |
| 7271635 | Method and apparatus for reducing duty cycle distortion of an output signal A method and apparatus for reducing the duty cycle distortion of a periodic signal in high speed devices. More specifically, there is provided a device having a switching point modulation circuit coupled to input logic and configured to modulate the periodic output ... | 09/18/2007 |
| 7268603 | Method and apparatus for reducing duty cycle distortion of an output signal A method and apparatus for reducing the duty cycle distortion of a periodic signal in high speed devices. More specifically, there is provided a device having a switching point modulation circuit coupled to input logic and configured to modulate the periodic output ... | 09/11/2007 |
| 7262650 | Amplitude adjusting circuit An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third... | 08/28/2007 |
| 7259609 | Clamping circuit A clamping circuit containing a transistor and a current amplifier. The transistor is designed to turn on when the voltage at a node exceeds (falls below) a specified upper (lower) level. The current amplifier is designed to draw substantial amount of current when t... | 08/21/2007 |
| 7254157 | Method and apparatus for generating a phase locked spread spectrum clock signal A method of and apparatus for generating a spread spectrum clock signal on an integrated circuit are provided. A target frequency generated by a ring oscillator can be modulated by varying a supply voltage to the ring oscillator, thereby changing the target frequenc... | 08/07/2007 |
| 7245175 | Semiconductor switch A semiconductor switch includes first and second normally off type FETs Q1, Q2 and a normally on type FET Q3 connected between the first normally off type FET Q1 and the second normally off type FET Q2. Further, in the semiconducto... | 07/17/2007 |
| 7215172 | Clamping circuit transistor driving circuit using the same A clamping circuit including a current mirror circuit including transistors constituting a mirror pair disposed at ground side, each of the transistors being connected to a power source through a resistance element; a plurality of adjusting transistors connected in ... | 05/08/2007 |
| 7215193 | Method and apparatus for limiting power amplifier voltage excursions A power amplifier circuit includes a circuit topology with first and second switching elements. The first and second switching elements have a closed state and an open state, wherein current flows between the switching elements when they are both in the closed state... | 05/08/2007 |
| 7190625 | Method and apparatus for data compression in memory devices A test circuit for a memory device having a pair of arrays each of which includes a plurality of memory cells arranged in rows and columns. A pair of complementary digit lines is provided for each column of each array. The digit lines are selectively coupled to a pa... | 03/13/2007 |
| 7138836 | Hot carrier injection suppression circuit A method of preventing Hot Carrier Injection in input/output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can tolerate. By placing input/output devices, in series, ext... | 11/21/2006 |
| 7135914 | High voltage CMOS switch with reduced high voltage junction stresses A high voltage switch circuit is disclosed for reducing high voltage junction stresses. The circuit contains a cascode device structure having one or more transistors of a same type connected in a series and being operable with a normal operating voltage and a high ... | 11/14/2006 |
| 7119999 | Pre-regulator with reverse current blocking An apparatus includes a blocking N-channel MOS (LDMOS) transistor that prevents current flow when the supply connection is reversed. When connected properly, the body diode conducts to provide a start-up function. A bias generator is employed to enable the low drop-... | 10/10/2006 |
| 7091752 | Method and apparatus for simplifying the control of a switch A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the vo... | 08/15/2006 |
| 7079677 | Automatic intelligent yield improving and process parameter multivariate system and the analysis method thereof An automatic intelligent yield improving and process parameter multivariate analysis system and the analysis method thereof. The system is applied to a computer to set up analysis procedures for analyzing process parameters obtained from each measuring machine in se... | 07/18/2006 |
| 7072427 | Method and apparatus for reducing DC offsets in a communication system Methods and apparatuses for reducing DC offsets in a communication system are described. In a first aspect, a feedback loop circuit reduces DC offset in a wireless local area network (WLAN) receiver channel. The frequency response of the feedback loop circuit can be... | 07/04/2006 |
| 7071763 | Transistor circuits for switching high voltages and currents without causing snapback or breakdown A switching circuit is disclosed for switching high voltages and high currents, if necessary, without causing snapback or breakdown. The disclosed high voltage, high current switching circuit comprises a first set of series-connected transistors that includes a plur... | 07/04/2006 |
| 7064586 | Input buffer circuit including reference voltage monitoring circuit A buffer circuit includes a differential amplifier, a buffering inverter, and a reference voltage monitoring circuit. The differential amplifier has a reference voltage and a current source as inputs. The buffering inverter has an output of the differential amplifie... | 06/20/2006 |
| 7046079 | Circuit for generating a reference voltage A circuit for generating a reference voltage of an image sensor is provided. The circuit comprises a signal differential amplifier, a gain amplifier, a source follower and a clamp circuit. The signal differential amplifier is adapted for receiving and comparing a bi... | 05/16/2006 |
| 7042276 | Charge pump with improved regulation A semiconductor integrated circuit device having an internal voltage generating circuit which generates a voltage two or more times higher than an operating voltage while at the same time reducing the voltage applied to a device, thereby ensuring the device reliabil... | 05/09/2006 |
| 7026839 | Circuits, architectures, systems and methods for overvoltage protection Circuits, architectures, a system and methods for protecting against overvoltages in a high-speed differential signal or circuit. The circuit generally includes (a) a differential signal transmission line, (b) a common mode circuit coupled to and configured to reduc... | 04/11/2006 |
| 7012456 | Circuit and method for discharging high voltage signals A circuit for discharging a high voltage signal to a supply voltage line. In one embodiment, the circuit includes a first switch receiving the high voltage signal; a second switch having an input coupled with the output of the first switch; and a third switch having... | 03/14/2006 |
| 7002379 | I/O circuit using low voltage transistors which can tolerate high voltages even when power supplies are powered off An apparatus for providing bias voltages for input/output (I/O) connections on low voltage integrated circuits. In one embodiment, the invention comprises an I/O pad, a pull-down transistor device that has a protective transistor coupled to said I/O pad, and a pull-... | 02/21/2006 |
| 6980048 | Voltage generating circuit capable of supplying stable output voltage regardless of external input voltage A voltage generating circuit capable of generating a stable output voltage irrespective of a variation in external voltage. The voltage generating circuit includes a voltage comparing circuit that operates in response to an activation signal and outputs output volta... | 12/27/2005 |
| 6970337 | High-voltage low-distortion input protection current limiter A floating symmetrical current limiter device blocks large bipolar input signals to the input circuit of an instrumentation device by transitioning between a low-impedance mode and a high-impedance mode. The current limiter device includes a signal path and a contro... | 11/29/2005 |
| 6922072 | Signal crosstalk inhibition unit and a signal processing apparatus A crosstalk inhibition unit which can inhibit crosstalk without causing an enlargement of a signal processing apparatus. A crosstalk inhibition unit 10 in order to inhibit crosstalk is provided to a signal processing apparatus. The crosstalk inhibition... | 07/26/2005 |
| 6906545 | Voltage measurement device tolerant of undershooting or overshooting input voltage of pad There is provided a voltage measurement device that is stable with respect to an undershot or overshot input voltage of a pad. The voltage measurement device includes a voltage line, a pad, a signal generating unit, a first switch, and a second switch. The first swi... | 06/14/2005 |
| 6903594 | Capacitor-free leaky integrator A leaky integrator is formed from a capacitor-free, non-linear delay resistor having a parasitic capacitance and a capacitor-free amplifier. The amplifier utilizes utilize the parasitic capacitance of the delay resistor to provide differing time constants for the ri... | 06/07/2005 |
| 6897702 | Process variation compensated high voltage decoupling capacitor biasing circuit with no DC current Disclosed is a high voltage decoupling capacitor-biasing circuit with no dc current. In one embodiment, the circuit includes a power supply node, a ground node, a common node, a first p-channel FET, a first n-channel FET, and a common node biasing circuit. The first... | 05/24/2005 |
| 6892086 | Medical electrode for preventing the passage of harmful current to a patient A medical electrode designed to prevent the passage of harmful electric current to a patient, thereby preventing tissue damage and electrocution. In the preferred embodiment, the inventive medical electrode is comprised of a proximal end, a distal end, a conductive ... | 05/10/2005 |
| 6847248 | Sub-micron high input voltage tolerant input output (I/O) circuit which accommodates large power supply variations A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can handle. By placing input and output devices, in series, external ... | 01/25/2005 |
| 6812766 | Input/output circuit of semiconductor integrated circuit The input/output circuit of the present invention includes a first p-channel transistor and a charge drawing circuit. The first p-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit, driven with ... | 11/02/2004 |
| 6784720 | Current switching circuit In a current switching circuit, a complementary circuit switches, in response to an input signal, a pair of current mirror circuits between a first state, enabling the first of the current mirror circuits, through a first current mirror current and disabling the sec... | 08/31/2004 |
| 6744297 | Inverter circuit An inverter circuit includes an input end receiving an input signal having a low level and a high level, wherein the low level is greater than zero, a P-channel metal-oxide-semiconductor (PMOS) transistor having a gate electrode coupled to the input end and a source... | 06/01/2004 |
| 6703889 | In-rush current protection A circuit for controlling inrush current to a load is provided. The circuit includes a variable impedance device having a control input. The variable impedance device is coupled between a power supply interface and a load interface. The circuit also inclu... | 03/09/2004 |
| 6700431 | I/O pad overvoltage protection circuitry A protection circuit for a transmission gate having a PMOS transmission gate transistor and an NMOS transmission gate transistor coupled between a core circuit and an I/O pad. Biasing transistors are coupled to gates of the NMOS and PMOS transmission gate... | 03/02/2004 |
| 6661273 | Substrate pump circuit and method for I/O ESD protection A substrate pump circuit and method for I/O ESD protection including NMOS fingers connected to the interconnection between an I/O pad and an internal circuit comprises a MOS device connected to the interconnection between the I/O pad and the internal circ... | 12/09/2003 |