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| Number | Title | Issue Date |
| 7375578 | Radio frequency envelope detector An RF envelope detection circuit that operations at low currents, high sensitivity, and high dynamic range. The circuit receives an AC signal at its input terminal and applies a signal on its output terminal that is a function of the envelope magnitude of the AC sig... | 05/20/2008 |
| 7342430 | Write strategy with multi-stage delay cell for providing stable delays on EFM clock Present invention provides a method and apparatus for generating multiple phase shifted clocks with clocks delayed from EFM clock. ... | 03/11/2008 |
| 7262650 | Amplitude adjusting circuit An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third... | 08/28/2007 |
| 7239189 | Clock generating circuit A clock generating circuit includes a first delay circuit array, which has a plurality of delay circuits, for measuring delay of an input signal, and a second delay circuit array for delay-replay having a plurality of delay circuits and being arranged in a direction... | 07/03/2007 |
| 7227397 | System, method and circuits for generating a signal The present invention relates to the field of electronics. More particularly, forms of the present invention relate to systems, methods and circuits for generating a signal. A system, method and circuit for generating a signal are described. Forms of this system, me... | 06/05/2007 |
| 7212058 | Method and apparatus for robust mode selection with low power consumption A low power method and apparatus for selecting operational modes of a circuit. One circuit according to the teachings of the disclosed method and apparatus includes a first current limiting circuit coupled between a selector terminal and a first voltage bus. The fir... | 05/01/2007 |
| 7212046 | Power-up signal generating apparatus In a power-up signal generating device, a power-up signal is activated at a certain level of the power supply voltage VDD by adjusting the turn-on resistance value of the MOS transistor so that the chip reliability can be improved. The power-up signal generating dev... | 05/01/2007 |
| 7138836 | Hot carrier injection suppression circuit A method of preventing Hot Carrier Injection in input/output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can tolerate. By placing input/output devices, in series, ext... | 11/21/2006 |
| 7084698 | Band-gap reference circuit A band-gap reference circuit for generation of voltages and currents independent of process, voltage, and temperature includes three inversely proportional to absolute temperature (IPTAT) current generators. The IPTAT current generators generate three currents that ... | 08/01/2006 |
| 7046971 | Distortion-correcting circuit, integrated circuit, and radio communication device To down size a distortion-correcting circuit. In the case of a distortion-correcting circuit 1, a basic-wave-amplifying section 10 and a distortion-extracting section 20 have the same circuit configuration. Therefore, the basic-wave-amplifying s... | 05/16/2006 |
| 7034622 | Phase-locked loop circuit and data reproduction apparatus This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functi... | 04/25/2006 |
| 7020450 | Active inductors using bipolar silicon transistors An active inductor includes bipolar transistors T1, T2, T3 and TD (TD being arranged in diode), where T1's emitter is connected to an output port and to T2's collector. T2's base is connected to a first voltage line and betw... | 03/28/2006 |
| 7009438 | Trans-admittance trans-impedance logic for integrated circuits A logic circuit with improved performance when operating at the limits of the transistor's bandwidth. In particular, a latch includes a clocked trans-admittance stage circuit for receiving a voltage and producing a current output, and an active load, such as a trans... | 03/07/2006 |
| 7002379 | I/O circuit using low voltage transistors which can tolerate high voltages even when power supplies are powered off An apparatus for providing bias voltages for input/output (I/O) connections on low voltage integrated circuits. In one embodiment, the invention comprises an I/O pad, a pull-down transistor device that has a protective transistor coupled to said I/O pad, and a pull-... | 02/21/2006 |
| 6992521 | Switch in bipolar technology A switch in bipolar technology including a first main transistor of a first type connecting an input terminal, intended to be connected to a first terminal of application of a D.C. supply voltage, to an output terminal intended to be connected to a load to be suppli... | 01/31/2006 |
| 6949964 | Sub-micron high input voltage tolerant input output (I/O) circuit A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can handle. By placing input and output devices, in series, external ... | 09/27/2005 |
| 6924692 | Voltage reference generator According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to recei... | 08/02/2005 |
| 6917095 | Integrated radio frequency circuits A plurality of devices, such as devices that are utilized for implementing radio frequency applications, can be formed in the same substrate. Each of these devices may be formed over a triple well that includes at least one well capable of being biased. Each of the ... | 07/12/2005 |
| 6914456 | Sub-micron high input voltage tolerant input output (I/O) circuit A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can handle. By placing input and output devices, in series, external ... | 07/05/2005 |
| 6897703 | Voltage clamp circuit A voltage clamp circuit is disclosed and claimed. The voltage clamp circuit includes a bypass device and a differential sense amplifier or comparator adapted to control operation of the bypass device. The bypass device is activated in response to the differential se... | 05/24/2005 |
| 6882206 | Enabling method to prevent glitches in waveform of arbitrary phase The present invention includes a system that has been developed to vary the starting and stopping of a pulse train of arbitrary phase without glitches, spurious pulses, or spurious change in duty cycle. This is accomplished by a system for generating a gated periodi... | 04/19/2005 |
| 6859084 | Low-power voltage modulation circuit for pass devices Power supply voltages are selectively modulated to correspond with degraded input voltages to a logic device. Modulated power supply voltages are provided to transistors within the logic device, so that the degraded input voltages supplied to the transistors are suf... | 02/22/2005 |
| 6859083 | Circuits for reducing leakage currents in pull-up and pull-down circuits using very small MOSFET devices A pull-down circuit for pulling a high-impedance node to ground when a pull-down (PD) signal driving the pull-down circuit is Logic 1. The pull-down circuit comprises: 1) a first pull-down N-channel transistor having a drain coupled to the high-impedance node, a gat... | 02/22/2005 |
| 6828865 | Phase-locked loop circuit and data reproduction apparatus This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functi... | 12/07/2004 |
| 6822842 | Switching device for switching at a high operating voltage A switching device for switching at a high operating voltage includes an LV switching element and a first HV switching element that are connected together in a cascode circuit. Furthermore, at least a second HV switching element is connected in series with the first... | 11/23/2004 |
| 6734715 | Two terminal rectifier using normally off JFET A two terminal semiconductor circuit that can be used to replace the semiconductor diodes used as rectifiers in conventional DC power supply circuits. Three semiconductor circuits that can efficiently supply the DC currents required in both discrete and integrated c... | 05/11/2004 |
| 6653884 | Input interface circuit for semiconductor integrated circuit device An input interface circuit for a semiconductor integrated circuit device is provided which includes a pair of diodes, first, second, and third PMOSFETs, and first, second, and third NMOSFETs. The diodes serve to clamp a high positive or negative voltage i... | 11/25/2003 |
| 6636109 | Amplification circuit with constant output voltage range An amplification circuit of the present invention includes a first MOS transistor having a gate to which a first input terminal for inputting a positive logic input signal or a reference potential is connected and a drain to which a first load is connecte... | 10/21/2003 |
| 6617904 | Electronic circuit with clock generating circuit An electronic circuit has a clock input for receiving an input clock signal. A clock processing circuit derives derived clock signals from the input clock signal, for example by frequency dividing the input clock signal. A dual edge triggered sampling cir... | 09/09/2003 |
| 6598171 | Integrated circuit I/O using a high performance bus interface The present invention includes a memory subsystem comprising at least two semiconductor devices, including at least one memory device, connected to a bus, where the bus includes a plurality of bus lines for carrying substantially all address, data and con... | 07/22/2003 |
| 6570431 | Temperature-insensitive output current limiter network for analog integrated circuit An output current limiter circuit is effectively insensitive to variations in temperature. A first arm of each of an NPN and a PNP network has a first auxiliary resistor, the current through which is proportional to temperature, and compensates for the ne... | 05/27/2003 |
| 6570428 | Adjustable clock skew apparatus and method for generating clock signals The present invention relates to an adjustable clock skew apparatus and method for generating clock signals, which resolves the drawbacks of costing a user much time and effort to adjust clock skews of all components on a motherboard. In order to accompli... | 05/27/2003 |
| 6566936 | Two terminal rectifier normally OFF JFET A two terminal semiconductor circuit that can be used to replace the semiconductor diodes used as rectifiers in conventional DC power supply circuits. Three semiconductor circuits that can efficiently supply the DC currents required in both discrete and i... | 05/20/2003 |
| 6534998 | Semiconductor device and control method thereof Disclosed is a semiconductor device capable of stabilizing a gate voltage at high voltage and high current, protecting the device from breakdown by preventing current nonuniformity and oscillations and the like, thereby improving reliability, and a method... | 03/18/2003 |
| 6529059 | Output stage ESD protection for an integrated circuit An integrated circuit including a transistor having a first electrode coupled to an output bond pad and a second electrode coupled to a reference potential, such as ground bond pad. A degeneration device is coupled between the second electrode and the ref... | 03/04/2003 |
| 6518815 | Power device with protection against undesirable self-activation A MOS-type power device having a drain terminal, a source terminal, and a gate terminal; and a protection circuit having a first conduction terminal connected to the gate terminal, via a diffused resistor, and a second conduction terminal connected to the... | 02/11/2003 |
| 6501317 | High speed, low-power CMOS circuit with constant output swing and variable time delay for a voltage controlled oscillator A delay circuit is provided for use in a ring oscillator of a phase locked loop (PLL). The delay circuit includes a differential pair of NMOS transistors 102 and 103 with an NMOS transistor 101 providing the tail current for the differential pair. Complem... | 12/31/2002 |
| 6496049 | Semiconductor integrated circuit having a current control function This semiconductor integrated circuit is constituted by any one of a p-channel MOS transistor and an n-channel MOS transistor, and is connected between the control terminal and the common terminal so as to produce predetermined voltage. The comparing circ... | 12/17/2002 |
| 6486723 | Programmable differential delay circuit with fine delay adjustment Circuitry that provides additional delay to early arriving signals such that all data signals arrive at a receiving latch with same path delay. The delay of a forwarded clock reference is also controlled such that the capturing clock edge will be optimall... | 11/26/2002 |
| 6437626 | Device for removing noise in AC power waveform A "PN junction element ta which produces the Peltier effect and Seebeck effect within the same element and imparts a noise reducing effect," which prevents an adverse influence of white noise included in an AC waveform to be supplied from a commercially a... | 08/20/2002 |
