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| Number | Title | Issue Date |
| 7719339 | Circuit arrangement and method for limiting a signal voltage The invention relates to the field of signal processing. It is an object of the invention to provide for limitation of a signal voltage to a predetermined maximum voltage (Vmax). To this end, an input signal (Vin) is applied to a voltage divider which includes a var... | 05/18/2010 |
| 7649397 | Internal voltage detection circuit and internal voltage generation device using the same An internal voltage detection circuit and an internal voltage generation device using the same are disclosed. The internal voltage detection circuit includes a first detect signal generator for generating a first detect signal to detect a level of an internal voltag... | 01/19/2010 |
| 7554377 | Apparatus and method for signal voltage limiting A circuit and method for limiting a signal voltage in which the minimum and maximum levels of the output signal can be controlled by selectively applying different lower and higher reference voltages from which the minimum and maximum output signal levels are derive... | 06/30/2009 |
| 7466181 | Dose rate event protection clamping circuit A novel system for protecting one or more circuits during a dose rate event is presented. A clamping circuit is utilized that outputs a voltage signal that may be used to control prevent circuits from receiving input signals during a dose rate event. The clamping ci... | 12/16/2008 |
| 7429885 | Clamping circuit to counter parasitic coupling A clamper circuit for receiving an input signal from a victim wire, the clamper circuit being capable of receiving aggressor signals from aggressor wires, the aggressor wires being the signal wires that can potentially induce crosstalk on the victim wire and an outp... | 09/30/2008 |
| 7375573 | De-emphasis system and method for coupling digital signals through capacitively loaded lines A system for de-emphasizing digital signals, such as address signals, boosts the level of the signals for one clock period prior to transmitting the signals through signal lines that may have a relatively large capacitance. The system may include a delay circuit tha... | 05/20/2008 |
| 7372681 | Electrostatic discharge (ESD) protection device with simultaneous and distributed self-biasing for multi-finger turn-on An electrostatic discharge (ESD) protection circuit for a semiconductor integrated circuit (IC) that protects core circuitry of the IC during normal operations, and shunts ESD events during non-powered mode of the IC. The ESD protection circuitry includes a multi-fi... | 05/13/2008 |
| 7365584 | Slew-rate control apparatus and methods for a power transistor to reduce voltage transients during inductive flyback Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power ... | 04/29/2008 |
| 7362156 | Reliable phase adjustment circuit A phase adjustment circuit generates multiple clock signals by, for example, successively delaying a first clock signal. One of the generated clock signals is selected and output. A phase difference detector determines whether the phase of the selected clock signal ... | 04/22/2008 |
| 7362141 | Logic device with low EMI A logic device with low electromagnetic interference. The logic device includes a digital logic gate, a voltage-limited circuit and a current-limited circuit. The digital logic gate provides a corresponding digital logic function. The voltage-limited circuit is conn... | 04/22/2008 |
| 7339770 | Electrostatic discharge protection circuit having a ring oscillator timer circuit An electrostatic discharge protection circuit is provided having a first electrically conductive element (such as a current sinking transistor) to couple between a power source and a first node. The first electrically conductive element has a control input terminal.... | 03/04/2008 |
| 7259609 | Clamping circuit A clamping circuit containing a transistor and a current amplifier. The transistor is designed to turn on when the voltage at a node exceeds (falls below) a specified upper (lower) level. The current amplifier is designed to draw substantial amount of current when t... | 08/21/2007 |
| 7254003 | Differential nulling avalanche (DNA) clamp circuit and method of use A circuit for protecting an electronic device including a differential nulling avalanche clamp circuit (200, 300) and method of using the circuit in an electronic system (100) to limit radio frequency overdrive. The electronic system (100) inclu... | 08/07/2007 |
| 7248092 | Clamp circuit device In a clamp circuit device, reference voltages are set up by a series circuit of an FET, a resistor and an FET. Gate potentials of FETs are set up by performing addition and subtraction of these reference voltages and a reference voltage generated by a bandgap refere... | 07/24/2007 |
| 7236339 | Electrostatic discharge circuit and method therefor An ESD protection circuit (81) and a method for providing ESD protection is provided. In some embodiments, an N-channel transistor (24), which can be ESD damaged, is selectively turned on and made conducting. The purpose of turning on the N-channel tra... | 06/26/2007 |
| 7220953 | Photodiode circuit with improved response time A circuit has a voltage source, a node, a photodetector electrically coupled between the voltage source and the node, a resistor electrically coupled between the node and ground, and a voltage clamp electrically connected to the node, the voltage clamp configured to... | 05/22/2007 |
| 7215592 | Memory device with reduced word line resistance A memory device includes a plurality of blocks, with each block having a respective array of memory cells and respective local word lines. The memory device also includes a respective switching device coupled between each local word line and a common voltage node. A... | 05/08/2007 |
| 7200063 | Circuitry for a programmable element As part of anti-fuse circuitry for a memory device, a preferred exemplary embodiment of the current invention provides a direct connection between an anti-fuse and a contact pad used to provide voltage to that anti-fuse. The contact pad also serves as a voltage sour... | 04/03/2007 |
| 7199604 | Driver circuit with low power termination mode Driver circuits and methods for operating driver circuits in automatic test equipment are provided. The driver circuit includes an output circuit operable in a dynamic mode and in a termination mode, and a mode control circuit for supplying a first current to the ou... | 04/03/2007 |
| 7167408 | Circuitry for a programmable element As part of anti-fuse circuitry for a memory device, a preferred exemplary embodiment of the current invention provides a direct connection between an anti-fuse and a contact pad used to provide voltage to that anti-fuse. The contact pad also serves as a voltage sour... | 01/23/2007 |
| 7156082 | Controlling spark for an engine with controllable valves A system and method to control spark in a cylinder of a multi-cylinder engine. Spark can be controlled in a cylinder while reducing the possibility of producing a spark at a spark plug coupled to an ignition coil. ... | 01/02/2007 |
| 7154954 | Communication system A communication system in which a reception signal can be accurately obtained from a signal transmitted over two-wire type transmission lines without any significant reduction in the communication speed. The communication system utilizing two-wire type transmission ... | 12/26/2006 |
| 7148725 | Voltage clamp A pre-driver 102 has a data signal input 110 to receive a data signal, a pair of voltage inputs 103,107 to receive supply voltages, and a data output 135 to provide an output voltage. A voltage clamp 130 is connected between a pred... | 12/12/2006 |
| 7138821 | Digital filter circuit and method for blocking a transmission line reflection signal A digital blocking filter and filtering method are provided for a device receiving signals from a transmission line. The transmission line, which may comprise part of a complex bus system, is incompletely terminated, thereby resulting in a reflection signal within t... | 11/21/2006 |
| 7135912 | Methods and systems for decoupling the stabilization of two loops Circuits and methods for dynamically stabilizing a circuit having a relatively small capacitive load two current loop sub circuits are provided. A main current loop and an associated sensing loop are coupled such that a compensation capacitance supplied to each sub ... | 11/14/2006 |
| 7109761 | Comparator circuit A reference voltage and an input signal voltage are applied to gates of FETs each equipped with a LOCOS-drain structure, respectively, and currents according to the voltages are made to flow from a power supply voltage Vbat to drain sides through resistors and sourc... | 09/19/2006 |
| 7102863 | Electrostatic breakdown preventing circuit for semiconductor device An electrostatic breakdown preventing circuit has first and second conductive lines, a diode, a power clamp circuit and first and second capacitors. The first and second conductive lines are connected to a first potential source and a second potential source, respec... | 09/05/2006 |
| 7088111 | Enhanced isolation level between sampling channels in a vector network analyzer A system and method for providing improved isolation between sampling channels in a vector network analyzer and sampling circuit. A vector network analyzer sampling channel includes a non-linear transmission line, an isolation device, a band-pass filter, and a sampl... | 08/08/2006 |
| 7082934 | Controlling spark for an engine with controllable valves A system and method to control spark in a cylinder of a multi-cylinder engine. Spark can be controlled in a cylinder based on operating conditions of a selectively operable valve. ... | 08/01/2006 |
| 7075956 | Optical semiconductor device An optical semiconductor device comprises: an optical semiconductor element; and a circuit. The circuit is connected to the optical semiconductor element and has a series rectifying circuit including a plurality of zener diodes connected in series. The circuit furth... | 07/11/2006 |
| 7068098 | Slew rate enhancement circuit An operational amplifier (op-amp) (200, 800, 900) having at least a first stage and a second stage has a feedback path (825) from the output to the input of a second stage, the feedback path includes a first capacitor (801) and a second capacito... | 06/27/2006 |
| 7068482 | BiCMOS electrostatic discharge power clamp A BiCMOS electrostatic discharge (ESD) protecting circuit is triggered by a bipolar junction transistor (BJT) for achieving ESD protection. Due to the layout area of the BJT ESD protecting circuit being smaller than the layout area of an RC circuit, layout area can ... | 06/27/2006 |
| 6999292 | Active protection device for low voltage circuits in items of low voltage equipment The invention establishes a method and a device for supplying external circuit units with an overvoltage (101), present on a high voltage circuit (100), in which connected items of low voltage equipment (116) are protected from damage due to the... | 02/14/2006 |
| 6963219 | Programmable differential internal termination for a low voltage differential signal input or output buffer A configurable low voltage differential signal (LVDS) system is located on a chip, such as a programmable logic device. The configurable LVDS system includes a pair of I/O pads, an LVDS transmitter for driving a differential output signal onto the I/O pads, an LVDS ... | 11/08/2005 |
| 6958896 | Early triggered ESD MOSFET protection circuit and method thereof An early triggered MOSFET ESD protection circuit based on reduction of the trigger voltage is described. A transient negative voltage is generated and applied to a gate of a MOSFET during a positive ESD event. The instant invention improves ESD performance, and is p... | 10/25/2005 |
| 6954168 | Active load clamp for a track-and-hold circuit A method and apparatus are provided for tracking and holding a voltage. The method includes the steps of providing an external analog voltage on an input of the track and hold circuit during a tracking mode of the track and hold circuit, storing a representation of ... | 10/11/2005 |
| 6946904 | USB with over-voltage and short-circuit protection A transceiver circuit includes driver circuits, receiver circuits, and suspend-mode buffers that are arranged to withstand an over-voltage conditions that would otherwise damage those circuits. An over-voltage sense circuit is arranged to detect the over-voltage con... | 09/20/2005 |
| 6919751 | Dynamic receiver clamp that is enabled during periods in which overshoot is likely A dynamic clamp 200 selectively clamps overshoot on a signal line 100 when overshoot is likely, while not clamping the received signal at times when overshoot is not likely encountered. A Driver Disable signal 102 disables the output of an outpu... | 07/19/2005 |
| 6897702 | Process variation compensated high voltage decoupling capacitor biasing circuit with no DC current Disclosed is a high voltage decoupling capacitor-biasing circuit with no dc current. In one embodiment, the circuit includes a power supply node, a ground node, a common node, a first p-channel FET, a first n-channel FET, and a common node biasing circuit. The first... | 05/24/2005 |
| 6882861 | Wireless user terminal and system having signal clipping circuit for switched capacitor sigma delta analog to digital converters A wireless user terminal (42) and system (40) implementing a mixed signal CODEC (100) including an improved sigma-delta ADC (18) which limits input signals into a switched capacitor configuration and avoids adding circuit overhead in the ... | 04/19/2005 |
