Bizarre Patents
User-operated amusement apparatus for kicking the user's buttocks
An apparatus including a user-operated and controlled apparatus for self-infliction of repetitive blows to the user's buttocks by a plurality of elongated arms bearing flexible extensions that rotate under the user's control.
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| Number | Title | Issue Date |
| 7940107 | Clamp circuit for clamping inrush voltage induced by hot plugging and related chip An inrush voltage clamping circuit for an electronic device for clamping an inrush voltage induced by hot plugging is disclosed. The clamp circuit includes a buffer unit and a clamp unit. The buffer unit is coupled to an input power end for receiving an inrush curre... | 05/10/2011 |
| 7936202 | Method and apparatus for robust mode selection with low power consumption A low power method and apparatus for selecting operational modes of a circuit. One circuit according to the teachings of the disclosed method and apparatus includes a first current limiting circuit coupled between a selector terminal and a first voltage bus. The fir... | 05/03/2011 |
| 7667518 | Method and apparatus for robust mode selection with low power consumption A low power method and apparatus for selecting operational modes of a circuit. One circuit according to the teachings of the disclosed method and apparatus includes a first current limiting circuit coupled between a selector terminal and a first voltage bus. The fir... | 02/23/2010 |
| 7436225 | Semiconductor device having output transistor and current control circuit A semiconductor device includes: a semiconductor substrate having first and second pads; an output transistor; and a current control circuit having first and second resistors, a control signal generation circuit, first and second switching circuits. The first or sec... | 10/14/2008 |
| 7369182 | Generating a scan velocity modulation signal The processing unit (1) for generating a scan velocity modulation signal (DS) has an input for receiving a video signal (VS) and an output for supplying a modulation signal (DS). The unit (1) comprises a series connection of, successively, a coring cir... | 05/06/2008 |
| 7358771 | System including a single ended switching topology for high-speed bidirectional signaling A system including a single ended switching topology for high-speed bidirectional signaling includes a device coupled to a plurality of bidirectional signal paths. The device includes a plurality of voltage mode driver circuits, each coupled to a respective signal p... | 04/15/2008 |
| RE40038 | Latch-up recovery in quantized feedback DC restorer circuits A method and apparatus for avoiding and or recovering from the latch-up condition in a quantized feedback DC restorer circuit for use in a digital data communication system receiver. An automatic gain control (AGC) circuit controls the level of the received data by ... | 01/29/2008 |
| 7254003 | Differential nulling avalanche (DNA) clamp circuit and method of use A circuit for protecting an electronic device including a differential nulling avalanche clamp circuit (200, 300) and method of using the circuit in an electronic system (100) to limit radio frequency overdrive. The electronic system (100) inclu... | 08/07/2007 |
| 7233195 | Generator for supplying reference voltage and reference current of stable level regardless of temperature variation A reference voltage and reference current generator supplies a reference voltage and a reference current, both having stable levels regardless of temperature variation. The reference voltage and reference current generator includes a reference voltage generating uni... | 06/19/2007 |
| 7212058 | Method and apparatus for robust mode selection with low power consumption A low power method and apparatus for selecting operational modes of a circuit. One circuit according to the teachings of the disclosed method and apparatus includes a first current limiting circuit coupled between a selector terminal and a first voltage bus. The fir... | 05/01/2007 |
| 7187228 | Method of programming an antifuse An antifuse, which has a programmable material disposed between two conductive elements, is programmed using multiple current pulses of opposite polarity. The first pulse has a current that is insufficient to fully program the antifuse, i.e., produce a desired level... | 03/06/2007 |
| 7180337 | Method for switching driving of a semiconductor switching element A method of driving a semiconductor switching element includes applying a drive signal configured to switch the semiconductor element such that a change in the charge stored on the drive electrode occurs over time, the drive signal having one or more predetermined p... | 02/20/2007 |
| 7157954 | Semiconductor type two phase locked loop filter There is described a semiconductor Type Two phased locked loop filter having a passive capacitor part and a variable active resistor part, the variable active resistor part being integrated with the passive capacitor part. Integrating an active variable resistor wil... | 01/02/2007 |
| 7155005 | Apparatus for ring-back constriction An apparatus for ring-back constriction is provided. The apparatus includes a comparator, a termination controller, a termination variable resistor, a constriction controller, and a constriction variable resistor. The comparator is coupled to the transmission line, ... | 12/26/2006 |
| 7135908 | Input stage resistant against high voltage swings An input stage includes a signal input (IN) for receiving an input signal s(t) and a digital input stage (15) designed for operation at a supply voltage (VDD). The input stage (15) includes CMOS transistors, which are sensitive to voltages across trans... | 11/14/2006 |
| 7132873 | Method and apparatus for avoiding gated diode breakdown in transistor circuits An N-channel transistor protection circuit and method are disclosed that prevent gated diode breakdown in N-channel transistors that have a high voltage on their drain. The disclosed N-channel protection circuit may be switched in a high voltage mode between a high ... | 11/07/2006 |
| 7133268 | Current control via a variable voltage snubbing network System and method for controlling current across a load. A preferred embodiment comprises a current varying circuit (such as current varying circuit 525) that can create a sequence of voltage drops in a driver circuit (such as the driver circuit 505) c... | 11/07/2006 |
| 7121721 | Apparatus and method for measuring operating temperatures of an electrical component An apparatus and a method for measuring operating temperatures Tj of a component, particularly transient temperatures Tj in the breakdown region of the component 2 during a breakdown operation, are provided. The component temperature T | 10/17/2006 |
| 7026839 | Circuits, architectures, systems and methods for overvoltage protection Circuits, architectures, a system and methods for protecting against overvoltages in a high-speed differential signal or circuit. The circuit generally includes (a) a differential signal transmission line, (b) a common mode circuit coupled to and configured to reduc... | 04/11/2006 |
| 7026860 | Compensated self-biasing current generator A compensated current generator includes a first current source and a second current source coupled in series. The first and second current sources have temperature coefficients with opposite signs to produce a temperature compensated current. The first current sour... | 04/11/2006 |
| 7009545 | Semiconductor device having on-chip reference voltage generator A analog to digital converter is implemented in one chip. The one chip analog to digital converter includes an on-chip reference voltage generator for generating N number of reference voltages, N being a positive integer; and a conversion means for converting the in... | 03/07/2006 |
| 6922072 | Signal crosstalk inhibition unit and a signal processing apparatus A crosstalk inhibition unit which can inhibit crosstalk without causing an enlargement of a signal processing apparatus. A crosstalk inhibition unit 10 in order to inhibit crosstalk is provided to a signal processing apparatus. The crosstalk inhibition... | 07/26/2005 |
| 6914454 | High speed low power input buffer The input buffer circuit includes an input stage providing a switching point voltage based on a predetermined switching point set between a first and second reference voltages that maximizes the high and low noise margins of the input buffer. The input buffer circui... | 07/05/2005 |
| 6859087 | Half-bridge high voltage gate driver providing protection of a transistor A gate drive integrated circuit for switching power transistors using an external controller includes a gate driving capability and low quiescent current and allows use of a bootstrap supply technique for providing the logic supply voltage. The gate driver integrate... | 02/22/2005 |
| 6853232 | Power switching device A power switching device has a power switching transistor connected in series in a load circuit with an inductive load portion and a commutation circuit. The commutation circuit is connected in parallel with the gate-drain or base-collector path of the power transis... | 02/08/2005 |
| 6844768 | Dynamic method for limiting the reverse base-emitter voltage In a circuit having two input stages multiplexed to a common output stage having an output, one of the two input stages including transistor having a base, a collector and an emitter; a method of protecting the transistor from μ-degradation when the one of the two ... | 01/18/2005 |
| 6744297 | Inverter circuit An inverter circuit includes an input end receiving an input signal having a low level and a high level, wherein the low level is greater than zero, a P-channel metal-oxide-semiconductor (PMOS) transistor having a gate electrode coupled to the input end and a source... | 06/01/2004 |
| 6731150 | Amplifiers with variable swing control An amplifying circuit includes an amplifying stage for receiving input signals to generate output signals. A swing detect unit detects signal levels of the output signals. A clamp unit variably limits signal levels of the input signals based on the signal levels of ... | 05/04/2004 |
| 6700428 | Circuit configuration with a controllable current limiting circuit for driving a load A circuit configuration for driving a load is described. The circuit configuration has a first and a second connecting terminal for connecting the load, a first drive input for applying a first drive signal, and a first semiconductor switching element hav... | 03/02/2004 |
| 6670840 | Input clamp circuit for 5V tolerant and back-drive protection of I/O receivers using CMOS process In a receiver input back-drive protection circuit and method, a pass gate is provided between the high pad voltage and the receiver input and a clamping circuit is provided, to present a reduced voltage to the receiver input during stress mode.... | 12/30/2003 |
| 6633191 | Clock buffer with DC offset suppression A circuit includes a differential amplifier providing a differential signal to a voltage follower. The output of the voltage follower is fed back through resistors to an additional differential amplifier to the respective inputs to the voltage follower. T... | 10/14/2003 |
| 6603347 | Amplifier having controllable input impedance An amplifier circuit includes a circuit input, and a circuit output. An inverter, including first and second MOS transistors is connected between first and second supply voltages, and has an inverter input connected to the circuit input, and an inverter o... | 08/05/2003 |
| 6563381 | Circuits and methods for extending the input common mode voltage range of JFET op-amps Circuits and methods for extending the input common mode voltage range of a JFET op-amp are provided. The circuits and methods consist of modifying the input stage of a JFET op-amp to include a BJT pair as the input differential pair and use a JFET pair a... | 05/13/2003 |
| 6559676 | Output buffer circuit An output buffer circuit includes first and second MOS transistors connected in series between a power supply and ground, a first pull up transistor coupled between the power supply and a gate of the first MOS transistor, a first pull down transistor coup... | 05/06/2003 |
| 6507227 | Device and method for monitoring current delivered to a load The device and method monitor the current delivered to a load through a power transistor including a sense transistor. The circuit includes a disturbances attenuating circuit that has a differential stage, and first, second and third stages referenced to ... | 01/14/2003 |
| 6504424 | Low voltage metal oxide semiconductor threshold referenced voltage regulator and method of using Depletion mode pass transistor (38) accepts input voltage Vin and provides regulated output voltage Vout. The regulated output voltage is referenced to the threshold voltage of MOSFET (40) and is directly proportional to the ratio of... | 01/07/2003 |
| 6498516 | Minimizing the effect of clock skew in bit line write driver A system for minimizing the effect of clock skew in a bit line write driver includes a first control circuit coupled to the bit line write driver; and a second control circuit coupled to the bit line write driver. The bit line write driver outputs a first... | 12/24/2002 |
| 6404574 | Write driver with diodes to improve switching rate and reliability A write driver, having a pair of head nodes for connection to a write head, includes two diodes connected, respectively to the head nodes and the emitters of first and second upper drive transistors. The diodes increase the voltage necessary to breakdown ... | 06/11/2002 |
| 6333661 | Insulated-gate transistor signal input device An insulated-gate transistor signal input device includes an insulating substrate, a first clock line formed on the insulating substrate to receive a clock signal externally supplied, a clock buffer formed on the insulating substrate to process the clock ... | 12/25/2001 |
| 6323712 | Delay circuit with voltage compensation A delay circuit that is insensitive to variations in an input signal voltage level has a voltage clamp at its input terminal to fix the input voltage level so as to remove the sensitivity of the delay circuit to the variations in the input signal voltage ... | 11/27/2001 |
