A portable partition for use in an automobile having a seat with a seat bench and a seat backrest.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8159272 | System and method for on-chip jitter and duty cycle measurement An apparatus for measuring time interval between two selected edges of a clock signal. includes an edge generator, a first multi-tap delay module, a second multi-tap delay module, and a multi-element phase detector. The edge generator produces a first edge at a firs... | 04/17/2012 |
| 7426239 | Method and transmission apparatus for transmitting a bivalent signal A method and an apparatus for transmitting information contained in a transmission signal via at least one channel includes a number of processing steps at the transmitter end. At least one pulse sequence with at least one pulse is produced as stipulated by the tran... | 09/16/2008 |
| 7400282 | Quantum turing machine A quantum Turing machine constituted using a quantum bit created by localizing a phase difference soliton S between superconducting electrons existing in each of multiple of bands in a ring R0 that includes a ring main body R1 formed of a superconducto... | 07/15/2008 |
| 7266039 | Circuitry and method for adjusting signal length A circuit for adjusting a signal length is adapted for a memory device. The circuit adjusts a signal length of an ATD signal. The circuit includes a timing module, an encoding module and a logical control unit. Wherein, the timing module generates a plurality of tim... | 09/04/2007 |
| 7256632 | Pulse width modulation (PWM) controlling module and method for adjusting a PWM signal thereof A pulse width modulation (PWM) controlling module, includes: a PWM controller, a load detector, and an adjusting module. The PWM controller generates a PWM signal that is utilized for controlling a supply voltage applied to an electronic system. The load detector, c... | 08/14/2007 |
| 7242330 | Dynamic compensation of analog-to-digital converter (ADC) offset errors using filtered PWM A system and method of dynamic offset compensation that is particularly adaptable to analog-to-digital conversion performed in control applications employing highly integrated Digital Signal Processor (DSP) devices. The system providing dynamic compensation of Analo... | 07/10/2007 |
| 7233618 | Circuit configuration and method for transmitting digital signals To transmit digital signals, binary signals are transformed into a series of pulses, the pulses being modulated in their pulse length as a function of an information content of the binary signals. In a corresponding circuit configuration, a modulation unit is connec... | 06/19/2007 |
| 7231621 | Speed verification of an embedded processor in a programmable logic device Method and apparatus for generating a test program for a programmable logic device having an embedded processor. Predetermined code is obtained to exercise at least one speed limiting path identified. To the predetermined code is added wrapper code to provide the te... | 06/12/2007 |
| 7227387 | Measuring pulse edge delay value relative to a clock using multiple delay devices to address a memory to access the delay value A pulse width measurement system is provided with components in an FPGA so that pulse widths can be measured that are smaller than the frequency limits of the FPGA system clock. For the measurement, an incoming pulse is fed into the FPGA to many (e.g. 32) I/O inputs... | 06/05/2007 |
| 7203883 | Integrated circuit An integrated semiconductor memory, which can be operated in a normal operating state and a test operating state, includes a current pulse circuit with an input terminal for applying an input signal. The current pulse circuit is connected to an output terminal via a... | 04/10/2007 |
| 7200187 | Modulator for digital amplifier A digital modulator for driving a digital amplifier. The digital modulator has a subtractor which receives a digital input signal. A filter amplifier receives the output of the filter amplifier and is tuned to an idle frequency of the digital modulator. The digital ... | 04/03/2007 |
| 7141936 | Driving circuit for light emitting diode A driving circuit for a light emitting diode may include two transistors and an operational amplifier. The operational amplifier may act to cause the output voltages of the drain terminals of the transistors to be substantially equal, making the light emitting diode... | 11/28/2006 |
| 7093975 | Semiconductor integrated circuit with simply configured temperature detection circuit A clock divider circuit outputs a divided clock. A delay circuit is formed of at least one inverter to delay the divided clock to output a delayed, divided clock. An EXOR circuit receives the divided clock and the delayed, divided clock. A pulse width measurement ci... | 08/22/2006 |
| 7053667 | Single wire digital interface A single-wire digital interface for receiving digital data as a stream of pulses, with ‘1’ and ‘0’ logic levels represented with pulses having “first” and “second” pulse widths, respectively. A low-pass filter produces an output that increases at a k... | 05/30/2006 |
| 6975158 | Noise canceling circuit A low-pass filter eliminates a high-frequency component contained in an input signal. An inverter outputs a signal at a high level or a low level in response to an output of the low-pass filter that is larger or smaller than a threshold level. A one-shot pulse gener... | 12/13/2005 |
| 6940325 | DLL circuit A DLL circuit synchronizes an external input clock applied from an outside of a system with an internal input clock used inside the system using a divider unit. The DLL circuit includes a detection unit for detecting whether a pulse width of the external input clock... | 09/06/2005 |
| 6940926 | Digital phase/frequency detector A digital phase/frequency detector capable of being implemented with on-chip components and configured to detect signals having small modulation indices. Transition points within the signal are detected and the width between successive transition points measured and... | 09/06/2005 |
| 6930526 | Quasi-feedforward PWM modulator Devices, circuits, and methods generate a substantially constant output voltage. A power storage element generates a DC output voltage from an input voltage. The output is sampled to generate a feedback signal. An error amplifier generates an error signal from the f... | 08/16/2005 |
| 6927385 | Optical sensor and method of suppressing interference light therefor An optical sensor includes a light transmitter for transmitting pulsed light signals and a light receiver for receiving them. In order to suppress the effects of interfering noise light, the light signals are transmitted according to a specified pattern including pu... | 08/09/2005 |
| 6925170 | Wire-bound telecommunication device and a circuit for use in such a device In known telephone subscriber end stations a caller_ID IC detects a tone alerting signal TAS alerting that successive caller_ID information can be received for displaying on a display of the phone. The known station applies narrow frequency band filters to detect to... | 08/02/2005 |
| 6917235 | Low voltage circuit for interfacing with high voltage analog signals An integrated circuit (IC) uses a current source coupled to means for current-to-voltage conversion to reject the unwanted high voltage signal and detects the wanted small voltage signal. In particular, the current source produces mirrored currents proportional to t... | 07/12/2005 |
| 6917191 | Frequency measurement circuit A frequency measurement circuit measures a frequency of an input signal. The frequency measurement circuit includes a frequency measurement unit for counting a reference clock during a counting period having a predetermined number of waves of the input signal. The f... | 07/12/2005 |
| 6859912 | Method and circuit arrangement for clock recovery Clock recovery from transmitted data signals is carried out entirely digitally, and in a manner that is essentially insensitive to dynamic changes in the phase of the data signal. To this end, at least four phase-shifted sample signals are produced from a predetermi... | 02/22/2005 |
| 6650403 | Distance measuring device for a vehicle In a distance measuring device, reflected pulsed light beams with respect to one transmitted light beam are amplified by plural amplifiers (22a, 22b) of different gains. The retroreflection times of the reflected pulsed light beams are detected by retrore... | 11/18/2003 |
| 6573759 | Apparatus and method for extracting data values from a signal encoded with AES3 data Apparatus for determining nominal pulse duration values in a signal encoded with an AES3 data stream includes a first circuit for measuring duration of each pulse of the signal and providing a sequence of duration values. A second circuit detects a maximu... | 06/03/2003 |
| 6532260 | Pulse transmission device for use in long-distance communication A device for transmitting a pulse signal via a metallic line to a receiver end at which equalization is applied to the received pulse signal. The device includes a waveform adjustment unit which adjusts a pulse width in accordance with differences between... | 03/11/2003 |
| 6469544 | Device for detecting abnormality of clock signal A circuit for detecting abnormality of a subject clock signal, includes a frequency dividing circuit for frequency-dividing a monitoring clock signal to provide a frequency-divided monitoring clock signal; a shift register which stores the frequency-divid... | 10/22/2002 |
| 6393069 | Circuit and method for compensating for degradation in pulse width of burst data The output from a digital signal amplitude regenerator circuit in which the amplitude of a transmitted burst data signal is amplified, and an initial potential generator circuit, are connected to a switch. While there are no burst data, the initial potent... | 05/21/2002 |
| 6392459 | Gate signal generating circuit, semiconductor evaluation apparatus, and semiconductor evaluating method When continuously outputted pulses from a first pulse to an (N+1)th (where N is an integer) are received, a pulse specifying circuit specifies a number N of a pulse whose properties are to be measured. Further, a gate generating circuit generates a gate s... | 05/21/2002 |
| 6389548 | Pulse run-length measurement for HF data signal by dividing accumulated phase difference between first and second zero-crossings by single-cycle range using multiple cycle range sawtooth waveform A system and method for accurately measuring a pulse run length in a high frequency (HF) data signal while utilizing a low analog-to-digital conversion (ADC) sampling rate. Four bits are added to the most significant end of an oscillator's accumulator reg... | 05/14/2002 |
| 6262600 | Isolator for transmitting logic signals across an isolation barrier A logic isolation circuit has a transmitter circuit for receiving a logic input signal and providing a periodic signal to an isolation barrier, and a receiving circuit for receiving the periodic signal from the isolation barrier and for providing an outpu... | 07/17/2001 |
| 6108528 | Receive squelch circuit having function of detecting pulse width A receive squelch circuit detects a pulse width of an input data signal to prevent errors from occurring during detection of received data. The squelch circuit adds a function of detecting a pulse width to an input side to detect normal and abnormal pulse... | 08/22/2000 |
| 6075750 | Method and circuit for generating an ATD signal to regulate the access to a non-volatile memory A method and a circuit generate a pulse synchronization signal (ATD) for timing the memory cell read phase in semiconductor integrated electronic memory devices. The pulse signal (ATD) is generated upon detection of a change in logic state of at least one... | 06/13/2000 |
| 6075751 | Signal transition detector for asynchronous circuits An apparatus for synchronizing a plurality of signals entering an electronic device. In one embodiment, the apparatus comprises a filter to receive a signal of the plurality of signals entering the electronic device, wherein if a pulse width of the signal... | 06/13/2000 |
| 6072338 | Method of and device for determining pulse width A pulse width determining device includes a down counter for counting down from a first initial count value reloaded thereinto. If the down counter underflows, it can start counting down from a second initial count value reloaded thereinto as needed. Ever... | 06/06/2000 |
| 6064237 | Device for removing noise A device for removing a noise, in which a delay circuit is used for positively removing a noise contained in a signal regardless of the signal transitioning either from high to low or vice versa. The device includes a noise detecting part for comparing an... | 05/16/2000 |
| 6049358 | Counter control circuit for controlling counter having a pulse period measuring function A counter control circuit of a counter for measuring a pulse period of a video synchronization signal includes a main control unit having a synchronization signal input Sync, and a control signal producing unit including a stop signal generator, a latch s... | 04/11/2000 |
| 5966034 | Method and device for the filtering of a pulse signal In a pulse filtering device, the pulse signal is sampled to enable the counting of this signal by an asynchronous counter. A pulse of calibrated duration is generated when the counting reaches a predetermined number.... | 10/12/1999 |
| 5949255 | Method and apparatus for generating active pulse of desired polarity A method for generating an output signal of desired polarity from an input periodical signal of frequency f1 via a clock signal of frequency f2, wherein f2 is substantially greater than f1, is provided. The input periodical signal includes a cyclic durati... | 09/07/1999 |
| 5923191 | Device and a method for monitoring a system clock signal A system clock signal monitor that monitors a system clock signal by comparing a pulse width of a logic high pulse and a pulse width of a logic low pulse of each system clock duty cycle of the system clock signal to one or more reference clock duty cycles... | 07/13/1999 |