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Neuroimaging as a Marketing Tool
Neuroimaging as a means for validating whether a stimulus such as advertisement, communication, or product evokes a certain mental response such as emotion, preference, or memory, or to predict the consequences of the stimulus on later behavior such as consumption or purchasing.
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| Number | Title | Issue Date |
| 8183905 | Configurable clock signal generator A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power volta... | 05/22/2012 |
| 8174301 | Phase-error reduction circuitry for an IQ generator Phase-error-reduction circuitry for an IQ generator, wherein the phase-error-reduction circuitry is arranged to receive I and Q input signals from the IQ generator and to produce I and Q output signals, and wherein the phase-error-reduction circuitry is arranged to ... | 05/08/2012 |
| 8174302 | Pulse signal generator, and method of generating pulse signal A pulse signal generator includes a period setting unit that receives a period set signal including an information indicative of a pulse period, and that outputs a period control signal controlling the pulse period, a duty ratio setting unit that receives a duty rat... | 05/08/2012 |
| 8164374 | Clock gating circuit having a selector that selects one of a control signal and a scan signal Provided is a clock gating circuit which receives a first clock signal and controls an output of a second clock signal corresponding to the first clock signal in response to a control signal. The clock gating circuit includes: a first latch that latches a signal val... | 04/24/2012 |
| 8164375 | Delay line synchronizer apparatus and method A synchronizer system and method that can be used with a conventional adjustable delay circuit to preserve a pseudo-synchronous phase relationship between clock signals of different clock domains when the time delay of the adjustable delay circuit from which one of ... | 04/24/2012 |
| 8149039 | Integrated picosecond pulse generator circuit A picosecond pulse generator apparatus and methodology is disclosed. A pulse generator is provided by forming a transmission line and a switching element on a common semiconductor substrate or semiconductor chip. The transmission line and the switching element can b... | 04/03/2012 |
| 8143931 | Flag signal generation circuit and semiconductor device having the same A flag signal generation circuit includes a first periodic signal detection unit, a second periodic signal detection unit, and a flag signal output unit. The first periodic signal detection unit is configured to detect a change in a level of a first periodic signal ... | 03/27/2012 |
| 8134397 | Minimum leading edge blanking signal generator and method for generating minimum leading edge blanking signal A minimum leading edge blanking (MLEB) signal generator is provided. The MLEB signal generator includes a buck unit and a signal generation unit. The buck unit receives an error amplification signal, and generates a reference blanking signal. The reference blanking ... | 03/13/2012 |
| 8130019 | Clock signal propagation method for integrated circuits (ICs) and integrated circuit making use of same A method is provided for propagating clock signals in a circuit segment having a first clocked device, a second clocked device and a data path between the first clocked device and the second clocked device. The data path propagates data released by the first clocked... | 03/06/2012 |
| 8093936 | Semiconductor device and control method thereof According to an aspect of the embodiment, a skew detecting unit includes at least one over delay path or racing path for detecting skew. A clock adjusting unit sets a set value of delay based on the skew detected by the skew detecting unit. A clock cell adjusts dela... | 01/10/2012 |
| 8058920 | Flag signal generation circuit and semiconductor device having the same A flag signal generation circuit includes a first periodic signal detection unit, a second periodic signal detection unit, and a flag signal output unit. The first periodic signal detection unit is configured to detect a change in a level of a first periodic signal ... | 11/15/2011 |
| 8049547 | Semiconductor integrated circuit and signal adjusting method A semiconductor device includes a first signal generator that generates a plurality of second signals having a delay relative to a first signal and having states that change at different timings. A second signal generator generates a third signal having a delay rela... | 11/01/2011 |
| 8030984 | Circuit for clock extraction from a binary data sequence The invention relates to an electronic circuit making it possible to extract a clock signal from an incident binary data sequence arriving at a constant rate. The electronic circuit comprises an oscillator (VCO) with voltage-controlled frequency providing a sinusoid... | 10/04/2011 |
| 8030983 | Common mode tracking receiver A clock receiver (301) on an integrated circuit (202) includes a programmable AC voltage divider (502) for receiving, through an input capacitor (406), a clock signal (206) from a clock generator (204) off the integrated cir... | 10/04/2011 |
| 8030985 | System and method for compensating pulse generator for process and temperature variations An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a Î... | 10/04/2011 |
| 8030982 | Systems and methods using improved clock gating cells A clock gating cell that comprises a latch in communication with an input enable logic and an output logic circuit, wherein the latch includes a pull-up and/or a pull-down circuit at an input node of the output logic circuit and circuitry preventing premature charge... | 10/04/2011 |
| 8022744 | Signal generator Embodiments include a signal generator circuit for generating a time-varying signal, comprising capacitive element; FET to supply to or from the capacitive element a current matched to the FET drain current; a bias voltage generator to provide a bias voltage to the ... | 09/20/2011 |
| 8008961 | Adaptive clock generators, systems, and methods Adaptive clock generators, systems, and related methods than can be used to generate a clock signal for a functional circuit to avoid or reduce performance margin are disclosed. In certain embodiments, a clock generator autonomously and adaptively generates a clock ... | 08/30/2011 |
| 8004338 | Pulse generator At an occasion of a level transition when a second periodic voltage becomes equal to a main reference voltage a first periodic voltage generating circuit starts a first monotonically changing time-period in which a voltage value of a first periodic voltage increases... | 08/23/2011 |
| 7999593 | Electric circuit for and method of generating a clock signal An electric circuit (30) for generating a clock-sampling signal (CLK) for a sampling device (31) comprises a clock generator (1, 40, 50, 60) for generating a plurality of clock signals (21-24, 51-54, 61-64), a correla... | 08/16/2011 |
| 7994838 | Clock distribution circuit A circuit includes a clock generator to provide a clock signal, and a clock distribution circuit coupled to the clock generator and a plurality of pairs of outputs. The clock distribution circuit includes a plurality of adjustment circuits to generate a plurality of... | 08/09/2011 |
| 7990198 | Apparatus and method for generating clock signal The invention is related to an apparatus and a method for generating an output clock. The method comprises: receiving a transmitted signal comprising at least one data signal and at least one synchronized signal; producing a reference signal according to the synchro... | 08/02/2011 |
| 7990199 | Clock gater system A clock gater includes a first circuit configured to receive a clock signal. The first circuit includes a first subcircuit and a second subcircuit. A latch is configured to receive the clock signal. The latch is connected to the first circuit at each of a first node... | 08/02/2011 |
| 7982519 | Centralizing the lock point of a synchronous circuit A system and method to establish the lock point of a digital synchronous circuit (e.g., a DLL) at the center of or close to the center of its delay line is disclosed. The synchronous circuit is configured to selectively use either a reference clock or its inverted v... | 07/19/2011 |
| 7982518 | Controlling timing in asynchronous digital circuits A timing circuit for generating asynchronous signals is provided that uses minimal area while maximizing speed. This timing circuit can include a timing control block and disable/enable circuitry. The timing control block can include an SR latch and first and second... | 07/19/2011 |
| 7977996 | Pulse generator with precision edge placement A digital pulse generator including a fractional delay filter is provided as having a plurality of step response functions that can be selected on a sample by sample basis by selection of filter coefficients. The step response functions are all identical but each ha... | 07/12/2011 |
| 7977995 | Configurable pulse generator The described embodiments provide a circuit that can be configured as a pulse generator or as an oscillator. The circuit includes a pulse generator circuit and a test circuit that is coupled to the pulse generator circuit. In the described embodiments, an disable si... | 07/12/2011 |
| 7973583 | A/B-phase signal generator, RD converter and angle detection unit An A/B-phase signal generator wherein an up/down count unit 52C counts up by an up-count command or counts down by a down-count command at fixed intervals, an angle comparison unit 51 compares the count result ACNT of up/down count unit 52C with... | 07/05/2011 |
| 7973584 | Waveform generator Timing setting data include an arbitrary combination of a set timing signal indicating a positive edge timing and a reset timing signal indicating a negative edge timing. A sort unit sorts n pieces of the timing setting data in accordance with timing orders indicate... | 07/05/2011 |
| 7969221 | Electronic device and square wave generator thereof A square wave generator includes a sawtooth wave generator for generating a sawtooth wave, and a convertor for generating a square wave based on the sawtooth wave. The sawtooth wave generator includes a capacitor and a switching unit connected parallel to each other... | 06/28/2011 |
| 7961027 | Clock integrated circuit The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise. ... | 06/14/2011 |
| 7952412 | Audio device using AC power clock reference A clock generating apparatus for use in an electronic device, such as a radio or other audio device, which generates a clock signal based on an AC input signal received, for example, from a wall outlet. The clock generating apparatus detects and monitors the frequen... | 05/31/2011 |
| 7944265 | Clock generator, method for generating clock signal and fractional phase lock loop thereof A clock generator includes a delta sigma modulator, a counter and a first phase lock loop. The delta sigma modulator sequentially generates a plurality of variable parameters according to a predetermined value and a first input clock signal. The counter, which is co... | 05/17/2011 |
| 7940104 | Signal generating apparatus, filter apparatus, signal generating method and filtering method There is provided a signal generating apparatus including: a multiphase oscillating portion for generating a number of base signals having the same frequency and a predetermined phase difference of which the signal level transitions between a first level and a secon... | 05/10/2011 |
| 7936198 | Progamable control clock circuit for arrays A programmable clock control circuit includes a base block, a chop block, and a pulse width variation block coupled between the chop block and the base block that receives the chop block output and provides a pulse width variation output to the base block. The pulse... | 05/03/2011 |
| 7932768 | Apparatus and method for generating a clock signal An apparatus and method are disclosed for generating one or more clock signals. A clock signal is generated based on pattern signals and a reference clock signal. When the reference clock signal transitions high, the state of a first pattern signal is output, and wh... | 04/26/2011 |
| 7920007 | Apparatus for outputting data of semiconductor integrated circuit A data outputting apparatus of a semiconductor integrated circuit if presented for use in standardizing output timing brought about by different electrical output path lengths. The apparatus includes a data clock signal generating section and a data output section. ... | 04/05/2011 |
| 7920006 | Clocking scheme for efficient digital noise reduction in mixed-signal systems-on-chip In one embodiment of the present invention, a clock generator circuit receives a clock signal having a period. The clock signal is employed by a digital circuit that is resident on the same substrate as an analog circuit, the digital circuit generates disturbance cl... | 04/05/2011 |
| 7911251 | Clock signal generating circuit and semiconductor memory apparatus including the same A clock signal generating circuit includes a main clock buffering unit and a sub clock buffering unit. The main clock buffering unit is capable of generating both a differential clock signal pair and a single clock signal. The main clock buffering unit selectively o... | 03/22/2011 |
| 7911252 | Clock signal generation circuit A clock signal generation apparatus includes a clock signal generation circuit generating a plurality of clock signals, and a self-test circuit measuring a phase difference of one pair of clock signals. The self-test circuit includes a clock signal selection circuit... | 03/22/2011 |
