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| Number | Title | Issue Date |
| 7420404 | Phase adjuster circuit and phase adjusting method A phase adjustor circuit and a phase adjusting method are capable of preventing a phase shift amount from fluctuating even if a frequency of a transmission carrier wave of a sensor signal fluctuates. A chopping wave converter circuit converts a pulse string signal i... | 09/02/2008 |
| 7274236 | Variable delay line with multiple hierarchy Disclosed herein are improved, simplified designs for a hierarchical delay line (HDL). The HDL is useful in providing precise phase control between an input clock signal and an output clock signal, and has particular utility as the variable delay in a delay-locked l... | 09/25/2007 |
| 7205810 | Skew tolerant phase shift driver with controlled reset pulse width A phase shift driver for phase shifting an input clock signal at a first phase to generate an output signal at a second phase without missing subsequent input signals. Input logic circuitry of the phase shift driver may receive an input signal at a first phase. Outp... | 04/17/2007 |
| 7009434 | Generating multi-phase clock signals using hierarchical delays Circuits and methods for generating multi-phase clock signals using digitally-controlled hierarchical delay units (HDs) are provided. A plurality of serially-coupled HDs outputs clock signals that are phase-shifted relative to a reference clock signal. Each HD inclu... | 03/07/2006 |
| 6433604 | Phase adjustment technique An adjustment technique allowing easy adjustment of a phase shifter is disclosed. A programmable device (PLD) is connected to the phase shifter so as to correct a standard vector depending on correction data written thereto. When supplying a standard inpu... | 08/13/2002 |
| 6400200 | Semiconductor integrated circuit which generates waveforms which are out of phase with each other A semiconductor integrated circuit comprises a phase control unit for shifting the phase of an input signal by two or more different fixed phases so as to generate two or more output signals out of phase. A phase detector detects phase differences among t... | 06/04/2002 |
| 6388485 | Delay-locked loop circuit having master-slave structure A delay-locked loop (DLL) circuit having a master-slave structure wherein the DLL circuit includes a master delay loop and a slave stage. The master delay loop delays an external clock signal by a predetermined delay time and generates a feedback signal w... | 05/14/2002 |
| 6356131 | 90-degree phase shifter There is disclosed a 90-degree phase shifter so configured that an input signal is supplied through a variable gain amplifying circuit and a phase adjusting circuit to a low pass filter and also supplied through another variable gain amplifying circuit an... | 03/12/2002 |
| 6121810 | Integrated delay line calibration method and apparatus for direct access storage device (DASD) An integrated delay line calibration method and apparatus are provided for a direct access storage device (DASD). A delay line, such as used in a direct access storage device (DASD) is calibrated by configuring the delay line as a ring oscillator for cali... | 09/19/2000 |
| 6064244 | Phase-locked loop circuit permitting reduction of circuit size A phase-locked loop circuit is constituted in such a manner that a delayed signal created by causing an input signal to loop through a delay stage a plurality of times is compared in terms of phase with the input signal, and an amount of delay in the dela... | 05/16/2000 |
| 6052010 | Circuit, apparatus and method for generating signals phase-separated by ninety degrees An improved clock generation circuit is provided for changing the phase of one signal relative to the phase of another signal. Both signals presented to the clock generation circuit transition at the same frequency. One or both of those signals are delaye... | 04/18/2000 |
| 5994938 | Self-calibrating programmable phase shifter A self-calibrating programmable phase shifter includes a tapped delay line for successively delaying a periodic reference signal to produce a set of phase distributed tap signals. A multiplexer selects one of the tap signals as input to a programmable del... | 11/30/1999 |
| 5973532 | Circuit arrangement for generating two signals staggered in time from a clock signal and for measuring their time stagger The circuit arrangement for generating two signals staggered in time from a clock signal and for measuring their time stagger receives at its input a clock signal, from which it generates an undelayed signal and a signal delayed relative to the undelayed ... | 10/26/1999 |
| 5970110 | Precise, low-jitter fractional divider using counter of rotating clock phases A fractional divider divides an input by a non-whole number M.N, where M is the integer part and N is the fractional part of the divisor. A delay line generates a group of multi-phase clocks from an input clock. A mux selects one of the multi-phase clocks... | 10/19/1999 |
| 5914631 | Voltage generating circuit A voltage controlled delay circuit is formed by m number of gates connected in series, phases of a clock signal and a delay signal are compared by a phase comparator, an up signal or a down signal is output, an integrated signal is generated by an integra... | 06/22/1999 |
| 5914623 | 90°-phase shifter A 90°-phase shifter which operates in condition both of high-speed and low dissipation power, and an output signal with precise 90°-phase difference is capable of taking off is provided. It causes input signals with complementary relation each other to ... | 06/22/1999 |
| 5875219 | Phase delay correction apparatus A digital delay locked loop (DLL) includes a phase detector for outputting a comparing signal by comparing a system clock signal with a chip clock signal, a shift register for sequentially shifting data bit values in both the directions in accordance with... | 02/23/1999 |
| 5852380 | Phase adjusting circuit, system including the same and phase adjusting method A phase adjusting circuit includes a circuit for providing an internal clock signal in synchronization with a reference clock signal, a delay circuit for delaying the internal clock signal for a predetermined delay time and an adjusting section for adjust... | 12/22/1998 |
| 5828257 | Precision time interval division with digital phase delay lines A time interval division circuit that generates a delayed signal that is a precise integer fraction of the clock cycle. A digital delay loop including a digital delay line is locked to the clock cycle and controls a second digital delay line. The delay li... | 10/27/1998 |
| 5811999 | Power converter having switching frequency phase locked to system clock A circuit for synchronizing a periodic ramp signal utilized in a switching mode power converter to system clock signal. A capacitor is charged through a resistor. When a voltage across the capacitor reaches a predetermined level, the capacitor is discharg... | 09/22/1998 |
| 5644260 | RC/CR automatic quadrature network An IQ modulator incorporates a quadrature network that is responsive to a frequency dependent control signal and that has in-phase and quadrature signals that are of equal amplitude and in exact quadrature over a wide range of applied frequencies. The qua... | 07/01/1997 |
| 5561792 | Microprocessor with software switchable clock speed and drive strength A microprocessor circuit is provided that allows the internal microprocessor clock speed to vary depending upon a register that can be programmed by software. In addition, the drive strength of the internal clock generator may similarly be varied by softw... | 10/01/1996 |
| 5521499 | Signal controlled phase shifter A clock is phase shifted by an amount controlled by the value of a control signal by establishing at least several discrete delay times to be imposed on the clock. The control signal value controls selection of the imposed discrete delay time. An analog-t... | 05/28/1996 |
| 5485128 | Oscillation circuit having a current-controlled phase shift circuit An oscillator circuit including a current-controlled phase shift circuit and a feedback circuit including a quartz resonator is capable of varying the oscillation frequency in accordance with control current signals. A phase shift circuit included in the ... | 01/16/1996 |
| 5208545 | Apparatus and method for eliminating phase skew in a multi-channel data acquisition system In one embodiment, the sampling order of voltage/current data channels from a power transmission line is controlled so that the average sampling instant for each channel is the same. In one example involving a six-channel system, the sampling order will a... | 05/04/1993 |
| 5170130 | Phase lock loop circuit with a subsidiary loop filter A phase lock loop circuit comprising a charge pump circuit (13), a loop filter (14), and a voltage controlled oscillator (15), a subsidiary loop filter (20) connected to the charge pump circuit and the loop filter in a phase lock operation through first a... | 12/08/1992 |
| 5079440 | Apparatus for generating computer clock pulses A circuit for generating two clock pulse trains of opposite polarity to one another each at a frequency of a single input clock pulse train including a flip-flop for providing the two output clock pulse trains, apparatus for placing the flip-flop in a fir... | 01/07/1992 |
| 5059818 | Self-regulating clock generator There is disclosed a self-regulating clock generator for providing an output clock signal to clock a CMOS microprocessor. The output clock signal has first and second phases of sufficient length to accommodate microprocessor speed paths and is provided in... | 10/22/1991 |
| 5053639 | Symmetrical clock generator and method A device and method for generating a symmetrical clock signal. The device comprises a signal generator, buffer and differential amplifier. The signal generator generates a periodic wave signal. The buffer receives the periodic wave signal and provides a s... | 10/01/1991 |
| 4985639 | Logic edge timing generation An edge generation circuit phase delays pulses of a first signal propagated on an integrated circuit. The edge generation circuit includes a first variable delay circuit located on the integrated circuit, a delay line located off the integrated circuit an... | 01/15/1991 |
| 4924188 | Spread spectrum receiver having phase shifter for effecting phase synchronization of two convolvers A phase shifter is disclosed which performs a desired phase shift by distributing an input signal to two signals whose phases are different by 90° from each other which signals are added to each other after having been weighted with a sine and a cosine f... | 05/08/1990 |
| 4739279 | Method and a device for rapid adjustment of the phase of a clock signal in rapid phase A method and device for supplying a sinusoidal output signal of controlled phase. First and second input signals, of different phase but derived from a common sinusoidal source, are multiplied by second and first sinusoidal reference signals, respectively... | 04/19/1988 |
| 4700084 | Digital clock recovery circuit apparatus A circuit for using a high speed clock and a counter to obtain a recovered clock with incoming data resetting the counter whenever a logic "1" of more than a predetermined number of high speed clocks is received. Further, the presence of a data out logic ... | 10/13/1987 |
| 4680621 | Method and apparatus for variable phasing of periodic signals A periodic output signal is generated at a variable phase relative to a periodic input signal by comparing the input signal with a third periodic signal that has a frequency which is less than the frequency of the input signal and that has a duty cycle wh... | 07/14/1987 |
| 4631491 | Bipolar transistor RF power amplifier A bipolar transistor R.F. power amplifier in which feedback is used to control simultaneously amplitude and phase distortion. The power amplifier is operated by determining a set of collector supply voltages located at the onset of gain saturation in the ... | 12/23/1986 |
| 4348597 | Latchup resistant pseudorandom binary sequence generator A pseudorandom binary sequence generator employing a conditional feedback path between several individual outputs and the input of a clocked shift register. Enhanced reistance to a latchup condition is brought about by way of a delay of one of the outputs... | 09/07/1982 |
| 4137503 | Phase shifting apparatus Apparatus is provided for changing the phase, and possibly the duty cycle, of two amplitude levels, periodic input signal. This is accomplished by providing a phase measuring signal related to the phase point in each period of the input signal.... | 01/30/1979 |
| 4095185 | Electrical energy transmission network The delay elements of a signal energy transmission network are divided into separate portions through which the transmitted energy is phase shifted in sequence by substantially equal amounts. A phase correction circuit reverses the phase shift through one... | 06/13/1978 |
| 4039930 | Remotely controlled phase shifting circuit A circuit for shifting the phase of an input voltage provides an output voltage of the same magnitude but of a phase differing from that of the input voltage by a variable amount in accordance with a selectively variable control input.... | 08/02/1977 |
| 3971021 | Coherent frequency memory A single configuration-invariant hybrid phasing circuit is utilized for both phase detection and phase shifting in a quasi-coherent memory to produce an essentially constant amplitude CW signal which is later gated to produce constant amplitude false rang... | 07/20/1976 |
