...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
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| Number | Title | Issue Date |
| 7808285 | Driving circuit for capacitive load A power switch assembly for a capacitive load 10 which includes a common electrode 14 and first and second discrete electrodes 16, 18, includes a node n1 coupled to a voltage source Vcc for receiving power there from, a first switching de... | 10/05/2010 |
| 7598781 | Capacitive load driving device A capacitive load driving device applies a multi-level voltage to a capacitive load to drive the capacitive load. In the capacitive load driving device, a voltage control signal generator unit generates a voltage control signal. A voltage amplifier unit amplifies a ... | 10/06/2009 |
| 7511541 | Electronic driver device for an external load for which the slew rate of the output signal is independent of the external load capacity and the corresponding integrated component This disclosure relates to an electronic driver device for an external load to which an input signal is applied at its input and that produces an output signal to the external load from its output. Such an electronic driver device includes elements that reduce depen... | 03/31/2009 |
| 7436224 | Low variation voltage output differential for differential drivers The methods and systems presented herein provide an improved means of correcting the variation of Voltage Output Differential (VOD) in differential drivers. In some embodiments, a high-precision reference voltage is generated not only based on a desired VOD, but als... | 10/14/2008 |
| 7420395 | Output buffer circuit and system including the output buffer circuit An output buffer circuit, which minimizes or prevents output delay of output signal and degradation of slew rate while suppressing overshoot and undershoot, is provided. In a first time period when an input signal to a gate of an N-channel output transistor changes ... | 09/02/2008 |
| 7408388 | Switching power supply device, semiconductor integrated circuit device and power supply device There are provided a switching power supply device performing a stable operation with fast response, a semiconductor integrated circuit device, and a power supply device. A capacitor is provided between the output side of an inductor and a ground potential. A... | 08/05/2008 |
| 7368832 | Circuit and fault tolerant assembly including such circuit A circuit is provided that provides for the same power characteristics to an assembly of electrical resistive elements wired in parallel as to the assembly as wired in series. An input power source provides electrical resistive power to a plurality of load elements,... | 05/06/2008 |
| 7365585 | Apparatus and method for charge pump slew rate control An apparatus and method for improving memory cell reliability is disclosed. The slew rate is reduced in an applied voltage signal used to program a memory cell when Fowler-Nordheim (FN) tunneling injection is detected. The applied programming signal is provided by a... | 04/29/2008 |
| 7362146 | Large supply range differential line driver A differential transmission line driver with supplemental current sources that overcome switching anomalies and EMU issues when the logic state of the driver is switching. During a logic transition, a current source, that is directed to the output of the driver, may... | 04/22/2008 |
| 7348811 | Equalizing transceiver with reduced parasitic capacitance A signaling circuit having reduced parasitic capacitance. The signaling circuit includes a plurality of driver circuits each having an output coupled to a first output node, and a plurality of select circuits each having an output coupled to a control input of a cor... | 03/25/2008 |
| 7348914 | Method and systems to align outputs signals of an analog-to-digital converter Systems and methods are disclosed herein to provide improved alignment of output signals of an analog-to-digital converter (ADC). For example, in accordance with an embodiment of the present invention, a method of aligning digital signals appearing on signal paths o... | 03/25/2008 |
| 7336052 | Device for powering a variable speed drive Variable speed drive comprising a main rectifier module (10) including thyristors (K1, K2, K3) to power a main continuous bus (15) from an external power network (5), an inverter module (30) delivering a variable cont... | 02/26/2008 |
| 7324100 | Plasma display panel with energy recovery circuit and driving method thereof A plasma display panel with a driving apparatus including an inductor of which one end is electrically connected to one end of a panel capacitor. The driving apparatus of the plasma display panel alters a terminal voltage of the panel capacitors into a second voltag... | 01/29/2008 |
| 7323898 | Pin electronics driver Circuitry for driving a pin includes a first resistive circuit connected to the pin, a first transistor circuit to connect the first resistive circuit to a logic level voltage in response to a trigger voltage, the first transistor circuit and the first resistive cir... | 01/29/2008 |
| 7319347 | Bidirectional high voltage switching device and energy recovery circuit having the same Provided are a bi-directional high voltage switching device that includes an N-channel double diffused metal oxide semiconductor field effect transistor (DMOS FET) and a P-channel DMOS FET, each conducting current bi-directionally, and an energy recovery circuit tha... | 01/15/2008 |
| 7304871 | Boost circuit capable of step-up ratio control When a step-up ratio control circuit sets a step-up ratio of a charge pump circuit to 1.0 to enable a short mode, a path inside the charge pump circuit is short-circuited and a first transistor is completely turned on. This produces an inrush current derived from a ... | 12/04/2007 |
| 7301256 | Method and circuit configuration for operating a piezoelectric actuator A piezoelectric actuator, for instance a piezoelement for driving an injection valve of an internal combustion engine, is discharged from a charge state, in which a first control potential is present on a first piezo-terminal and a second control potential is presen... | 11/27/2007 |
| 7299789 | Fuel injection timer and current regulator A fuel injector control system and method provides precise fuel injection timing while eliminating the need for a voltage regulator by estimating or predicting ramp times between voltage application and actual fuel injection. In one embodiment, an estimated ramp tim... | 11/27/2007 |
| 7292075 | Rail-to-rail pad driver with load independent rise and fall times A pad driver is presented that in one form is capable of driving a wide range of capacitive loads with constant rise and fall times, over a wide range of temperature and process corners. A desirable form of the pad driver is characterized by the ability to charge an... | 11/06/2007 |
| 7285990 | High-precision buffer circuit A buffer circuit includes an input terminal operable to receive an input signal and an output terminal at which an output signal for the buffer circuit is provided. In the buffer circuit, three transistors at most provide signal currents. Two of the three transistor... | 10/23/2007 |
| 7282968 | Data output driver and semiconductor memory device having the same A data output driver and a semiconductor memory device having the same are disclosed. This data output driver includes: a rising transition slope adjuster including a plurality of first delay units cascade-connected to each other and receiving data and generating de... | 10/16/2007 |
| 7276954 | Driver for switching device A driver for a switching device has a plurality of driver circuits for driving the switching device and a control circuit. The control circuit selectively operates the driver circuits in response to a plurality of predetermined drive modes. Alternatively, a driver f... | 10/02/2007 |
| 7265591 | CMOS driver with minimum shoot-through current A CMOS driver with minimum shoot-through current is disclosed. The potential for shoot-through current may be eliminated or reduced with a break-before-make circuit driving an output stage. The break-before-make circuit may include a first logic element followed by ... | 09/04/2007 |
| 7253665 | Semiconductor device and driving method thereof The invention provides a semiconductor device which performs a write operation of a signal current rapidly to a current input type pixel. Before inputting a signal current, a precharge operation is performed by flowing a large current. After that, a signal current i... | 08/07/2007 |
| 7250794 | Voltage source converter A voltage source converter with a line-side diode rectifier, a load-side inverter with an electronic circuit, a power supply for the electronic circuit, and a slim DC link with a DC link capacitor is described. The slim DC link connects a DC output side of the line-... | 07/31/2007 |
| 7248094 | Circuit and method for supplying programming potential at voltages larger than BVDss of programming transistors A circuit for programming an antifuse coupled between a first node and a second node includes at least one transistor for supplying a programming potential VPP to the first node. A first transistor has a source coupled to a third node switchably coupleabl... | 07/24/2007 |
| 7245540 | Controller for delay locked loop circuits A method of controlling a delay locked loop (DLL) in a memory device is provided. The DLL generates an internal clock signal based on an external clock signal. The DLL constantly responds to variations in operating condition of the memory device to keep the external... | 07/17/2007 |
| 7236020 | Pulse translation method from low to high voltage level in half and full bridge application A switched bridge circuit comprises a first switch, a second switch, and a non-overlapping pulse generator. The first switch is coupled to a load. The second switch is coupled to said load. The non-overlapping pulse generator is coupled to the first switch and the s... | 06/26/2007 |
| 7236011 | High-speed differential logic buffer A circuit for a high speed digital buffer has an active load circuit connected to an output of the digital buffer. The active load circuit loads the buffer output with an active inductance to reduce the RC time constant at the buffer output. The active load circuit ... | 06/26/2007 |
| 7230457 | Programmable dual drive strength output buffer with a shared boot circuit An integrated circuit device is discussed that includes a data output driver having two modes of operation for driving a data bus. The output driver includes a circuit to produce a full drive output high signal, a partial drive output high signal, a full drive outpu... | 06/12/2007 |
| 7202702 | Output buffer slew rate control using clock signal A signal generated by circuitry for an output buffer is identified relative to a clock signal to control a slew rate of the circuitry for an output buffer. ... | 04/10/2007 |
| 7187227 | Driver circuit A driver circuit includes first and second three-terminal active elements, and first and second delay units. The first and second three-terminal active elements are series-connected. Each of the first and second three-terminal active elements has an amplification fu... | 03/06/2007 |
| 7183815 | Drive apparatus for CCD image sensor A drive apparatus that guarantees the stable operation of a CCD image sensor. The drive apparatus includes a drive circuit for supplying a pulse signal to the CCD image sensor. A power supply circuit is connected to the drive circuit to supply the drive circuit with... | 02/27/2007 |
| 7176739 | Circuit to improve data bus performance A circuit comprising an active pull-up device coupled to a level shift circuit is coupled to a one-wire bus to allow communication devices coupled to the bus to better detect digital communication signals propagating through the bus. The level shift circuit provides... | 02/13/2007 |
| 7164298 | Slew rate enhancement circuit via dynamic output stage A slew rate enhancement circuit of an operational amplifier including a main output stage, a monitoring stage and an assistant output stage is provided. An input voltage of the operational amplifier is detected by the main output stage to decide whether to output a ... | 01/16/2007 |
| 7142014 | High frequency XOR with peaked load stage An apparatus and method of the present invention includes a high frequency exclusive OR (XOR) with a peaked load stage. The peaked load stage coupled to the XOR produces a peaked response at a specified frequency of operation. The high frequency XOR comprises a mixe... | 11/28/2006 |
| 7126388 | Power MOSFET driver and method therefor In one embodiment, a power MOSFET driver uses two different voltages for the operating voltage of the two output drivers of the power MOSFET driver. ... | 10/24/2006 |
| 7119549 | Output calibrator with dynamic precision An integrated circuit device having an output driver circuit and a control circuit. The output driver circuit outputs a first signal having a signal level according to a control value. The control circuit is coupled to receive the first signal from the output driver... | 10/10/2006 |
| 7116137 | Method and system for reducing power consumption in digital circuitry using charge redistribution circuits A method and system for reducing power consumption in digital circuits using charge redistribution include a plurality of signal lines, an intermediate floating virtual source/sink, and a charge redistribution circuit connected to each signal line that isolates the ... | 10/03/2006 |
| 7116539 | Fast CMOS matched impedance DC write current driver for preamplifiers A driver circuit includes a CMOS stage and switch functionalities for performing certain tasks. One task is to selectively block exposure of the CMOS stage to reference voltage(s). Another task is to selectively protect the CMOS stage during transient operation. Yet... | 10/03/2006 |