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| Number | Title | Issue Date |
| 8013640 | Programmable ultrasound transmit beamformer integrated circuit and method An electrical waveform generating circuit has a programmable current source-driver. A digital switched current source is coupled to the programmable current source-driver and controlled by waveforms stored in the programmable current source-driver. A plurality of MO... | 09/06/2011 |
| 7952396 | AWG having arbitrary factor interpolator and fixed frequency DAC sampling clock An AWG includes a waveform memory providing a digital waveform signal at a sample rate and an arbitrary factor interpolator (AFI) coupled to receive the digital waveform signal or a processed digital waveform signal. A complex mixer for carrier modulation is coupled... | 05/31/2011 |
| 7701260 | Phase-to-sinusoid conversion Phase-to-sinusoid conversion and method for direct digital synthesis are described. At least one quadrant of values for a sinusoidal signal are real-to-finite bit resolution mapped to provide preconditioned values which are on average shifted down by half of a LSB p... | 04/20/2010 |
| 7557619 | Digital frequency synthesis Method and apparatus for digital frequency synthesis are described. A frequency synthesizer has an accumulator, an adder, and a predictive filter. The adder is configured to subtract a predicted error from a phase profile signal. A quantized version of the phase pro... | 07/07/2009 |
| 7385543 | Systems and methods for asynchronous triggering of an arbitrary waveform generator A system and method for asynchronous triggering in a waveform generator comprising a DAC sample clock for generating DAC sample clock signal. The system includes a sequencer clock for generating a sequencer clock signal having a frequency of 1/N of the DAC sample cl... | 06/10/2008 |
| 7382202 | Apparatus and method to provide a local oscillator signal from a digital representation An apparatus provides a local oscillator signal based on a selected channel of an RF input signal. For example, the apparatus can set a frequency of the local oscillator signal based on the selected channel. Digital circuitry can be used to generate the local oscill... | 06/03/2008 |
| 7345619 | Generating event signals in a radar system A radar system having a transmit signal path and a receive signal path and an event generator which is responsive to command signals provided by a digital signal processor (DSP) is described. The DSP generates command signals and provides the command signals to the ... | 03/18/2008 |
| 7340357 | Arbitrary waveform generator with configurable digital signal processing unit An arbitrary waveform generator including a digital signal procession unit and a memory. The digital signal processing unit may be configurable to interconnect a plurality of processing components in different configurations to process data received from the memory ... | 03/04/2008 |
| 7310390 | Decoding coded data streams A method of decoding, in one particular embodiment, an IEC 60958 biphase coded data stream comprising determining the maximum period in the data stream without a transition; determining a first threshold corresponding to a period of time less than the maximum period... | 12/18/2007 |
| 7294950 | Electrostatic actuator, electrostatic actuator driving method electromechanical transducer, and electromechanical transducer driving method An electrostatic actuator includes a stator having an electrode substrate, a movable unit having a movable element and an electrode arranged opposite to the electrode substrate, a plurality of first operation modules each of which issues an operation command for rea... | 11/13/2007 |
| 7284025 | DDS pulse generator architecture A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table... | 10/16/2007 |
| 7272078 | Efficient clock calibration in electronic equipment A representative measurement indicating a relative oscillation speed of a reference clock during a representative calibration period is ascertained. Multiple calibration periods are defined including first and second calibration periods. The first calibration period... | 09/18/2007 |
| 7268594 | Direct digital synthesis with low jitter An FPGA having a programmable frequency output is provided that achieves a (theoretical) M-times reduction in output jitter from a conventional direct digital synthesis (DDS) circuit, by running M accumulator circuits in parallel and combining the outputs in a time-... | 09/11/2007 |
| 7242225 | Direct digital frequency synthesizer A frequency synthesizer according to the direct digital synthesis method is provided. The frequency synthesizer includes a phase accumulator for the cyclical incrementation of a phase signal by a phase increment M present at the input of the phase accumulator, a mem... | 07/10/2007 |
| 7224884 | Design method for a video signal processing integrated circuit and integrated circuit and video signal processing apparatus thereby A video signal processing apparatus and a design method therefor are provided, and more particularly, a design method for a video signal processing integrated circuit (IC), in which to solve the shortage of pin ports caused by designing a video signal processor in a... | 05/29/2007 |
| 7215060 | Electrostatic actuator, electrostatic actuator driving method, electromechanical transducer, waveform output device and electric element An electrostatic actuator includes a waveform output register which generates waveform data having a drive time and a drive pattern on the basis of an operation request from the outside and has queues 0 and 1 to 3 holding the waveform data, a wa... | 05/08/2007 |
| 7202709 | Waveform output device and drive device A waveform output device includes a data reception unit which receives at least a part of a waveform pattern generation program transmitted from an external device connected to the data reception unit through a data line, the waveform pattern generation program bein... | 04/10/2007 |
| 7193449 | Method and apparatus for generating multi-phase signal A multi-phase signal generating apparatus is provided for readily generating multiple phase signals. The multi-phase signal generating apparatus comprises a signal data storage which stores a plurality of data segments for determining a predetermined period of one s... | 03/20/2007 |
| 7187723 | Local oscillation signal supply method and circuit therefor With the object of accurately reproducing, by means of a small-scale circuit, differences in propagation delay at antennas of received signals that are received as input by way of each of a plurality of receivers, frequency data generator 6 supplies frequency... | 03/06/2007 |
| 7158580 | Data pulse spectrum control The present invention reduces adjacent channel interference for a wireless peripheral device. A direct digital synthesizer generates a waveform having intermediate angular changes during a transition time between symbol intervals. After the transition time, the dire... | 01/02/2007 |
| 7154431 | Signal synthesizer and method therefor A digital synthesizer includes a digital radio frequency memory (DRFM) for storing phase values and corresponding digital signals. The digital synthesizer includes a digital processing circuit receiving input from the DRFM, the circuit including tapped delay lines a... | 12/26/2006 |
| 7154346 | Apparatus and method to provide a local oscillator signal An apparatus provides a local oscillator signal based on a selected channel of an RF input signal. For example, the apparatus can set a frequency of the local oscillator signal based on the selected channel. Digital circuitry can be used to generate the local oscill... | 12/26/2006 |
| 7126862 | Decoder for memory device A decoder for a memory device includes driving devices each applying a respective line voltage to a respective line of the memory device when turned on. The decoder also includes a control device coupled to the plurality of driving devices at a common node for gener... | 10/24/2006 |
| 7109808 | Polyphase numerically controlled oscillator and method for operating the same A polyphase numerically controlled oscillator (PNCO) is defined to include a plurality of sub-numerically controller oscillators (SNCO's). Each SNCO is capable of receiving a clock signal at a first clock rate and an assigned phase offset signal. Each SNCO is config... | 09/19/2006 |
| 7103622 | Direct digital synthesizer with output signal jitter reduction A method and apparatus for reducing unwanted harmonics in direct digital synthesizer (DDS) output. The method comprises the steps of providing a set of k phase-shifted clock signals, examining, in succession, each DDS accumulator state, and determining whether the D... | 09/05/2006 |
| 7098748 | Integrated CMOS high precision piezo-electrically driven clock A clock oscillator embedded in an integrated circuit, including a piezoelectric resonator formed on the integrated circuit; a clock generator coupled to the on-chip piezoelectric resonator, one or more sensors adapted to sense one or more environmental parameters af... | 08/29/2006 |
| 7079143 | Waveform drawing system and method A waveform drawing routine is disclosed that includes receiving an array of predecessor image data points, wherein the predecessor image data points form a predecessor line that has a predecessor high end point and a predecessor low end point, receiving an array of ... | 07/18/2006 |
| 7050000 | Radar based application programmable waveform generator component An exemplary radar system includes a waveform generator that generates a control waveform. An in-phase and quadrature modulator receives the control waveform from the waveform generator and in turn generates a waveform output that is amplified by a power amplifier b... | 05/23/2006 |
| 7038507 | Frequency synthesizer having PLL with an analog phase detector A frequency synthesizer is disclosed. According to one embodiment, the frequency synthesizer includes a phase locked loop (PLL) having an analog mixer phase detector and an auxiliary digital frequency detector coupled to the phase locked loop. The PLL may include a ... | 05/02/2006 |
| 7035607 | Systems and methods for providing an adjustable reference signal to RF circuitry Frequency modification circuitry may be employed as part of a crystal oscillator circuit to generate a reference signal with adjustable frequency. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally... | 04/25/2006 |
| 6993307 | Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitanc... | 01/31/2006 |
| 6985701 | Frequency synthesizer and multi-band radio apparatus using said frequency synthesizer There is disclosed a frequency synthesizer having an HF synthesizer for generating a first reference frequency signal having a variable frequency in a high-frequency band as a unit synthesizer, an LF synthesizer for generating a second reference frequency signal in ... | 01/10/2006 |
| 6965761 | Controlled oscillator circuitry for synthesizing high-frequency signals and associated method A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitanc... | 11/15/2005 |
| 6947334 | Semiconductor memory device capable of calibrating data setup time and method for driving the same There is provided a synchronous memory device, in which a data input setup timing is calibrated. The synchronous memory device includes: a data input unit for calibrating a timing of data inputted in synchronization with a data strobe signal; and a first setup time ... | 09/20/2005 |
| 6934655 | Method and apparatus for transmission line analysis A method and system for performing sequence time domain reflectometry to determine the location of line anomalies in a communication channel is disclosed. In one embodiment, the system generates a sequence signal and transmits the sequence signal over a channel that... | 08/23/2005 |
| 6933788 | Reference oscillator A receiver uses an adaptive algorithm to tune a low-cost crystal oscillator according to a temperature compensation profile so as to produce a precision master reference frequency despite temperature, initial tolerance, and aging effects. An automatic frequency cont... | 08/23/2005 |
| 6931082 | Digital phase locked loop A technique that enables the sine and cosine branches within a PLL module to be obtained relatively easily and efficiently is described. According to the technique, the computation operations requiring a computation load, such as calculation of sine and cosine funct... | 08/16/2005 |
| 6925130 | Method and system for a reduced emissions direct drive transmitter for unshielded twisted pair (UTP) applications A reduced emission transmitter may include an encoder block, which may be partitioned into a first group comprising odd encoder processing cells and a second group comprising even encoder processing cells. A DAC block may also be partitioned into a first group compr... | 08/02/2005 |
| 6922089 | Digital frequency synthesizing circuit and system thereof using interpolation and linear feedback shift register (LFSR) The present invention provides an all-digital frequency synthesizer circuit using interpolation technique and Linear Feedback Shift Register (LFSR). This synthesizer adaptively outputs two sequences stored in a bank of memory, or shift register. Using the idea of in... | 07/26/2005 |
| 6890046 | Driving waveform generator and method of generating driving waveform The present invention provides a technique that prevents a shift of a driving waveform due to accumulation of errors in a process of generating the driving waveform to drive driving elements on a print head. The technique of the present invention successively sums u... | 05/10/2005 |
