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| Number | Title | Issue Date |
| 8183883 | Integrated circuit reconfiguration techniques A memory configuration circuit is provided. The memory configuration circuit may be integrated into a programmable logic device (PLD) and as such, may be used to configure and reconfigure specific elements in the PLD. The memory configuration circuit includes a comp... | 05/22/2012 |
| 8125242 | Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics for integrated circuits and methods for designing asynchronous circuits to be implemented in the asynchronous reconfigurable logic fabrics. ... | 02/28/2012 |
| 8115511 | Method for fabrication of a semiconductor device and structure A configurable integrated circuit (IC) system comprising: a first die comprising input/output cells; and a configurable logic second die connected by a first plurality of through-silicon-vias (TSVs) to the first die. ... | 02/14/2012 |
| RE43081 | Method and device for configuration of PLDS A Programmable Logic Device provides efficient scalability for configuration memory programming while requiring reduced area for implementation. The device includes an array of configuration memory cells, a Vertical Shift Register (VSR) connected to the vertical lin... | 01/10/2012 |
| 8072238 | Programmable logic device architecture with the ability to combine adjacent logic elements for the purpose of performing high order logic functions A high efficiency PLD architecture having logic elements that can be selectively combined to perform higher order logic functions than can be performed alone by a single logic element. The programmable logic device includes a logic block having a first logic element... | 12/06/2011 |
| 8072237 | Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks Integrated circuits are provided with circuitry such as multiplexers that can be selectively configured to route different adjustable power supply voltages to different circuit blocks on the integrated circuits. The circuit blocks may contain memory elements that ar... | 12/06/2011 |
| 8058899 | Logic cell array and bus system A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for connecting two points in order to be able to minimize the number of bus... | 11/15/2011 |
| 8040153 | Method and apparatus for configuring the internal memory cells of an integrated circuit In one embodiment, a method and apparatus for configuring the internal memory cells of an integrated circuit through the logic fabric are disclosed. For example, an integrated circuit according to one embodiment includes a logic fabric and a plurality of input/outpu... | 10/18/2011 |
| 8026739 | System level interconnect with programmable switching Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by th... | 09/27/2011 |
| 7977970 | Enhanced field programmable gate array An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same integrated circuit. A circuit interface provides communication betwee... | 07/12/2011 |
| 7956640 | Digital radio frequency switch matrix A digital radio frequency switch system and method, adapted to receive a plurality of inputs, generate a plurality of outputs, and simultaneously route a plurality of inputs to any of a plurality of outputs, comprising an array comprising a plurality of inputs, havi... | 06/07/2011 |
| 7957208 | Flexible memory architectures for programmable logic devices In one embodiment, a programmable logic device includes a plurality of logic blocks; a plurality of input/output blocks; volatile configuration memory adapted to store configuration data for configuration of the logic blocks and input/output blocks; embedded block R... | 06/07/2011 |
| 7932744 | Staggered I/O groups for integrated circuits An I/O scheme for an integrated circuit includes a group layout cell. The group layout cell includes a plurality of signal I/O pads. A driver circuit is coupled to each signal I/O pad. The group layout cell also includes two I/O driver-circuit power-supply pads. ESD... | 04/26/2011 |
| 7902864 | Heterogeneous labs Disclosed is a programmable logic device (“PLD”) including at least one lookup table (“LUT”) based logic element (“LE”) of a first type and at least one LUT based LE of a second type. The first type of LE is different from the second type of LE. The term... | 03/08/2011 |
| 7880499 | Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics (302, 304) for integrated circuits and methods for designing asynchronous circuits to be implemented in the asynchronous reconfigurable logic fabrics. ... | 02/01/2011 |
| 7863930 | Programmable device, control method of device and information processing system A programmable device operates at high speed while reducing power consumption. The programmable device includes a plurality of processing tiles each including a configuration memory and a core logic unit, a configuration control unit for programming them, and a powe... | 01/04/2011 |
| 7847588 | Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performa... | 12/07/2010 |
| 7812635 | Programmable logic device architecture with the ability to combine adjacent logic elements for the purpose of performing high order logic functions A high efficiency PLD architecture having adjacent logic elements that can be selectively combined to perform higher order logic functions than can be performed alone by a single logic element. The programmable logic device includes a logic block having a first logi... | 10/12/2010 |
| 7804724 | Method and apparatus for boundary scan programming of memory devices In accordance with at least one embodiment, a method, apparatus, and article of manufacture are provided for configuring a virtual boundary register in a programmable logic device (PLD), transmitting a first user-definable-command operation code (opcode) to the PLD ... | 09/28/2010 |
| 7795909 | High speed programming of programmable logic devices A programmable logic device that receives and stores configuration data in configurable random-access-memory has differential signal input buffer circuitry for receiving the configuration data from a configuration device in differential signal form at high speeds. T... | 09/14/2010 |
| 7787326 | Programmable logic device with a multi-data rate SDRAM interface Within a programmable logic device, a multi-data rate SDRAM interface such as a DDR SDRAM interface includes in one embodiment a DQS clock tree, a slave delay circuit, and a delay-locked loop (DLL). The slave delay circuit is adapted to shift the phase of the DQS si... | 08/31/2010 |
| 7768300 | Programmable logic device providing serial peripheral interfaces In one embodiment, a programmable logic device (PLD) includes a slave port and a master port. The slave port can receive a configuration data bitstream and a slave clock signal from a master port of a first external device. The master port can provide the configurat... | 08/03/2010 |
| 7755386 | Enhanced field programmable gate array An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same integrated circuit. A circuit interface provides communication betwee... | 07/13/2010 |
| 7746108 | Compute-centric architecture for integrated circuits Integrated circuits having a compute-centric architecture. An integrated circuit may include an array of interconnected substantially similar logic blocks, each including a multiplier circuit and a lookup table circuit. The multiplier circuit has first and second in... | 06/29/2010 |
| 7746109 | Circuits for sharing self-timed logic An exemplary circuit for implementing logic sharing in self-timed circuits includes a shared logic circuit, an input circuit, an output circuit, and a pipelined routing path. The shared logic circuit has first and second self-timed inputs and first and second self-t... | 06/29/2010 |
| 7696782 | Programmable core for implementing logic change An apparatus comprising a plurality of fixed logic circuits, wherein each of the fixed logic circuits is configured to receive a plurality of input signals, perform combinational logic operations using the input signals, and produce at least one output signal, and w... | 04/13/2010 |
| 7675320 | Non-volatile memory architecture for programmable-logic-based system on a chip A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory ... | 03/09/2010 |
| 7635987 | Configuring circuitry in a parallel processing environment An integrated circuit includes a plurality of tiles. Each tile includes a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles, and reconfigurable logic that includes one o... | 12/22/2009 |
| 7626418 | Configurable interface A configurable interface for an integrated circuit is described. The integrated circuit includes a first core, where the first core is an application specific circuit version of a Peripheral Component Interconnect Express (“PCIe”) interface device. First configu... | 12/01/2009 |
| 7622949 | Transferring data in a parallel processing environment An integrated circuit includes a plurality of tiles. Each tile includes a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles, and a switch memory that stores instruction ... | 11/24/2009 |
| 7595659 | Logic cell array and bus system A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for connecting two points in order to be able to minimize the number of bus... | 09/29/2009 |
| 7570078 | Programmable logic device providing serial peripheral interfaces Systems and methods are disclosed herein to provide an improved approach to the configuration of integrated circuits such as programmable logic devices (PLDs). In one example, a method of operating a PLD includes receiving a configuration data bitstream at a slave s... | 08/04/2009 |
| 7557607 | Interface device reset Reset of an interface device of an integrated circuit is described. A Peripheral Component Interconnect Express core is instantiated as an application specific circuit block in the integrated circuit. The core has a reset block configured to be in either a hierarchi... | 07/07/2009 |
| 7554357 | Efficient configuration of daisy-chained programmable logic devices In one embodiment, a programmable logic device includes: a multiplexer adapted to select a compressed configuration bitstream from a plurality of external serial interface memories; a serial interface processor adapted to command the bitstream selection by the multi... | 06/30/2009 |
| 7550996 | Structured integrated circuit device A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration... | 06/23/2009 |
| 7535254 | Reconfiguration of a hard macro via configuration registers Reconfiguration of a hard macro via configuration registers is described. An integrated circuit includes configuration memory cells coupled to a hard macro via configuration registers. The configuration memory cells are for storing values for initializing the hard m... | 05/19/2009 |
| 7514959 | Structured integrated circuit device A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration... | 04/07/2009 |
| 7492186 | Runtime loading of configuration data in a configurable IC Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular opera... | 02/17/2009 |
| 7446561 | I/O circuitry shared between processor and programmable logic portions of an integrated circuit The present invention provides circuitry and methods for sharing I/O pins between a programmable logic portion and an embedded processor portion of a chip. The circuits in the programmable logic portion and the embedded processor portion can access data signals from... | 11/04/2008 |
| 7444454 | Systems and methods for interconnection of multiple FPGA devices Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I... | 10/28/2008 |
